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Proceedings of 1994 6th IEEE Symposium on Parallel and Distributed Processing最新文献

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The red-blue algorithm for dynamic programming on linear arrays 线性阵列动态规划的红-蓝算法
Proceedings of 1994 6th IEEE Symposium on Parallel and Distributed Processing Pub Date : 1994-10-26 DOI: 10.1109/SPDP.1994.346142
K. J. Rappoport
{"title":"The red-blue algorithm for dynamic programming on linear arrays","authors":"K. J. Rappoport","doi":"10.1109/SPDP.1994.346142","DOIUrl":"https://doi.org/10.1109/SPDP.1994.346142","url":null,"abstract":"A new algorithm for dynamic programming on linear arrays is presented which uses a single data path and runs twice as fast using less than half the memory locations of the best previously known algorithm. The algorithm employs a redundant data technique in which a permuted copy of the dynamic programming table is maintained to reduce communication costs. The simplified control structure and exclusive use of shift registers for storage (i.e. no RAM is required) make the algorithm particularly suitable for VLSI implementation.<<ETX>>","PeriodicalId":422721,"journal":{"name":"Proceedings of 1994 6th IEEE Symposium on Parallel and Distributed Processing","volume":"163 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1994-10-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127414190","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Eager combining: a coherency protocol for increasing effective network and memory bandwidth in shared-memory multiprocessors 渴望组合:在共享内存多处理器中增加有效网络和内存带宽的一致性协议
Proceedings of 1994 6th IEEE Symposium on Parallel and Distributed Processing Pub Date : 1994-10-26 DOI: 10.1109/SPDP.1994.346165
R. Bianchini, T. LeBlanc
{"title":"Eager combining: a coherency protocol for increasing effective network and memory bandwidth in shared-memory multiprocessors","authors":"R. Bianchini, T. LeBlanc","doi":"10.1109/SPDP.1994.346165","DOIUrl":"https://doi.org/10.1109/SPDP.1994.346165","url":null,"abstract":"An excessive number of remote accesses or a non-uniform distribution of remote accesses can cause even well-designed multiprocessors to exhibit severe memory and network contention. Producer/consumer data generates a particularly common sharing pattern that results in a non-uniform distribution of references. In this paper we quantify the performance impact of producer/consumer sharing as a function of memory and network bandwidth, and argue that the contention caused by this form of sharing severely impacts performance on large-scale machines. We propose a new coherency protocol, called eager combining, which is designed to alleviate this contention. We use execution-driven simulation of parallel programs on a large-scale multiprocessor to show that eager combining can improve the performance of programs with producer/consumer data by a factor of 4 or more.<<ETX>>","PeriodicalId":422721,"journal":{"name":"Proceedings of 1994 6th IEEE Symposium on Parallel and Distributed Processing","volume":"91 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1994-10-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122112768","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 14
Conflict-free data access of arrays and trees in parallel memory systems 并行存储系统中数组和树的无冲突数据访问
Proceedings of 1994 6th IEEE Symposium on Parallel and Distributed Processing Pub Date : 1994-10-26 DOI: 10.1109/SPDP.1994.346145
Sajal K. Das, F. Sarkar
{"title":"Conflict-free data access of arrays and trees in parallel memory systems","authors":"Sajal K. Das, F. Sarkar","doi":"10.1109/SPDP.1994.346145","DOIUrl":"https://doi.org/10.1109/SPDP.1994.346145","url":null,"abstract":"Mapping the nodes of a data structure to a given set of memory modules so that different sets of nodes (called templates) can be accessed in parallel without conflicts is an important problem. We consider two useful data structures, namely trees and arrays. The most commonly used templates of a tree are the subtrees of a given height or the nodes in any given level. We present a recursive memory module assignment algorithm for complete k-ary trees, allowing conflict-free access to any complete subtree of height h. Our scheme uses k/sup h-1/-1/k-1 memory modules which is the same as the number of nodes in the subtree and hence the memory utilization is optimal. The number of conflicts in accessing nodes in different levels or subtrees of different heights for these schemes are presented. For accessing arrays, the templates of interest are rows, columns, diagonals, different subblocks, distributed blocks and so on. We propose a new scheme for conflict-free access to all of these templates with the help of quasigroups. The multiplication table of a quasigroup will be used to map the array elements to different memory modules.<<ETX>>","PeriodicalId":422721,"journal":{"name":"Proceedings of 1994 6th IEEE Symposium on Parallel and Distributed Processing","volume":"33 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1994-10-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128793023","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 21
Performance of SPEC92 on prime-mapped vector cache SPEC92在质数映射矢量缓存上的性能
Proceedings of 1994 6th IEEE Symposium on Parallel and Distributed Processing Pub Date : 1994-10-26 DOI: 10.1109/SPDP.1994.346121
Tong Sun, Qing Yang
{"title":"Performance of SPEC92 on prime-mapped vector cache","authors":"Tong Sun, Qing Yang","doi":"10.1109/SPDP.1994.346121","DOIUrl":"https://doi.org/10.1109/SPDP.1994.346121","url":null,"abstract":"In this paper, we use execution-driven simulation to study and compare vector processing performances, in terms of the total execution time of an application program, of cache-based vector computers with that of uncached vector computers having a large number of interleaved memory banks. The cache memory used here is a new cache organization called prime-mapped cache. Simulation results on SPEC92 benchmarks show that the cache-based vector computers perform significantly better than the vector computers with no cache. The performance improvement is getting larger as the speed gap between processors and memories grows. Meanwhile, the cache-based vector computers are also cost-effective because of the reduction of large number of interleaved memory banks otherwise needed by vector computers with no cache.<<ETX>>","PeriodicalId":422721,"journal":{"name":"Proceedings of 1994 6th IEEE Symposium on Parallel and Distributed Processing","volume":"104 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1994-10-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124164191","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Performability analysis of non-repairable multicomponent systems using order statistics 用序统计量分析不可修复多部件系统的性能
Proceedings of 1994 6th IEEE Symposium on Parallel and Distributed Processing Pub Date : 1994-10-26 DOI: 10.1109/SPDP.1994.346112
A. Bhattacharya, R. R. Rao, Ting-Ting Y. Lin
{"title":"Performability analysis of non-repairable multicomponent systems using order statistics","authors":"A. Bhattacharya, R. R. Rao, Ting-Ting Y. Lin","doi":"10.1109/SPDP.1994.346112","DOIUrl":"https://doi.org/10.1109/SPDP.1994.346112","url":null,"abstract":"Performability, a composite measure that integrates both performance and reliability, has been deemed to be essential in evaluating systems that are capable of trading off performance for reliability under component failures. For non-repairable systems, the goal is to evaluate the distribution or moments of some accumulated reward (performance) defined on a stochastic process that characterizes the different configurations, as successive faults appear. Instead of assuming that the distributions of sojourn time at various configurations are known, we deduce them from the distributions of the individual component lifetime. We allow lifetimes to be arbitrary but assume that they are independent from one component to another. Knowledge of the reward rates in different configurations allows us to relate the sojourn times to the order statistics of the component lifetimes. We then solve for the distributions of the order statistics. The approach is illustrated in context of a parallel system made up of identical components.<<ETX>>","PeriodicalId":422721,"journal":{"name":"Proceedings of 1994 6th IEEE Symposium on Parallel and Distributed Processing","volume":"93 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1994-10-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121693373","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Combining replication and parity approaches for fault-tolerant disk arrays 为容错磁盘阵列组合复制和奇偶校验方法
Proceedings of 1994 6th IEEE Symposium on Parallel and Distributed Processing Pub Date : 1994-10-26 DOI: 10.1109/SPDP.1994.346147
Chung-Sheng Li, Ming-Syan Chen, Philip S. Yu, Hui-I Hsiao
{"title":"Combining replication and parity approaches for fault-tolerant disk arrays","authors":"Chung-Sheng Li, Ming-Syan Chen, Philip S. Yu, Hui-I Hsiao","doi":"10.1109/SPDP.1994.346147","DOIUrl":"https://doi.org/10.1109/SPDP.1994.346147","url":null,"abstract":"We explore the method of combining the replication and parity approaches to tolerate multiple disk failures in a disk array. In addition to the conventional mirrored and chained declustering methods, a method based on the hybrid of mirrored-and-chained declustering is explored. A performance study that explores the effect of combining replication and parity approaches is conducted. It is experimentally shown that the proposed approach can lead to the most cost-effective solution if the objective is to sustain the same load as before the failures.<<ETX>>","PeriodicalId":422721,"journal":{"name":"Proceedings of 1994 6th IEEE Symposium on Parallel and Distributed Processing","volume":"12 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1994-10-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129429261","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 6
An analysis of parallel synchronous and conservative asynchronous logic simulation schemes 并行同步和保守异步逻辑仿真方案分析
Proceedings of 1994 6th IEEE Symposium on Parallel and Distributed Processing Pub Date : 1994-10-26 DOI: 10.1109/SPDP.1994.346177
W. I. Baker, A. Mahmood
{"title":"An analysis of parallel synchronous and conservative asynchronous logic simulation schemes","authors":"W. I. Baker, A. Mahmood","doi":"10.1109/SPDP.1994.346177","DOIUrl":"https://doi.org/10.1109/SPDP.1994.346177","url":null,"abstract":"A recent paper by Bailey (1992) contains a theorem stating that the idealized execution times of unit-delay, synchronous and conservative asynchronous simulations are equal under the conditions that unlimited number of processors are available and the evaluation time of each logic element is equal. Further it is shown that the above conditions result in a lower bound on the execution times of both synchronous and conservative asynchronous simulations. Bailey's above important conclusions are derived under a strict assumption that the inputs to the circuit remain fixed during the entire simulation. We remove this limitation and by extending the analyses to multi-input, multi-output circuits with an arbitrary number of input events show that the conservative asynchronous simulation executes faster than synchronous simulation in general. Our conclusions are supported by a comparison of the idealized execution times of synchronous and conservative asynchronous algorithms on ISCAS combinational and sequential benchmark circuits.<<ETX>>","PeriodicalId":422721,"journal":{"name":"Proceedings of 1994 6th IEEE Symposium on Parallel and Distributed Processing","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1994-10-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129343078","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 5
Out-of-order access to vector elements in order to reduce conflicts in vector processors 为了减少向量处理器中的冲突而乱序访问向量元素
Proceedings of 1994 6th IEEE Symposium on Parallel and Distributed Processing Pub Date : 1994-10-26 DOI: 10.1109/SPDP.1994.346173
A. M. D. Corral, J. Llabería
{"title":"Out-of-order access to vector elements in order to reduce conflicts in vector processors","authors":"A. M. D. Corral, J. Llabería","doi":"10.1109/SPDP.1994.346173","DOIUrl":"https://doi.org/10.1109/SPDP.1994.346173","url":null,"abstract":"The performance of a vector processor accessing vectors is strongly dependent on the conflicts produced in the memory subsystem. These conflicts create holes in the data flow between processor and memory, delaying the task of the functional units. This paper proposes an out-of-order access to vector elements in order to reduce the average memory access time in vector processors. Previous research of out-of-order access to vector elements have attempted to increase the conflict-free access families of strides. The goal of this work is to reduce the conflicts when multiple vectors are concurrently accessed in memory.<<ETX>>","PeriodicalId":422721,"journal":{"name":"Proceedings of 1994 6th IEEE Symposium on Parallel and Distributed Processing","volume":"209 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1994-10-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121717921","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
On multicast wormhole routing in multicomputer networks 多计算机网络中的组播虫洞路由研究
Proceedings of 1994 6th IEEE Symposium on Parallel and Distributed Processing Pub Date : 1994-10-26 DOI: 10.1109/SPDP.1994.346103
R. Boppana, S. Chalasani, C. Raghavendra
{"title":"On multicast wormhole routing in multicomputer networks","authors":"R. Boppana, S. Chalasani, C. Raghavendra","doi":"10.1109/SPDP.1994.346103","DOIUrl":"https://doi.org/10.1109/SPDP.1994.346103","url":null,"abstract":"We show that deadlocks due to dependencies on consumption channels is a fundamental problem in multicast wormhole routing. This issue of deadlocks has not been addressed in many previously proposed multicast algorithms. We also show that deadlocks on consumption channels can be avoided by using multiple classes of consumption channels and restricting the use of consumption channels by multicast messages. In addition, we present a new multicast routing algorithm, column-path, which uses the well-known e-cube algorithm for multicast routing. Therefore, this algorithm could be implemented in the existing multicomputers with minimal hardware support. We present a simulation study of the performance of Hamilton-path based multicast algorithms with the proposed column-path algorithm. Our simulations indicate that the simplistic scheme of sending one copy of a multicast message to each of its destinations exhibits good performance and that the new column-path algorithm offers higher throughput compared to the Hamilton-path based algorithms.<<ETX>>","PeriodicalId":422721,"journal":{"name":"Proceedings of 1994 6th IEEE Symposium on Parallel and Distributed Processing","volume":"14 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1994-10-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122904117","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 57
Derivation and performance of a pipelined transaction processor 流水线事务处理器的派生和性能
Proceedings of 1994 6th IEEE Symposium on Parallel and Distributed Processing Pub Date : 1994-10-26 DOI: 10.1109/SPDP.1994.346168
Andrew J. Bennett, P. Kelly, R. Paterson
{"title":"Derivation and performance of a pipelined transaction processor","authors":"Andrew J. Bennett, P. Kelly, R. Paterson","doi":"10.1109/SPDP.1994.346168","DOIUrl":"https://doi.org/10.1109/SPDP.1994.346168","url":null,"abstract":"Transaction processing can be formulated as a simple functional program operating on a stream of transaction requests and a tree-structured database. In this paper we use algebraic transformation of the initial program to yield an optimistic implementation in which unnecessary synchronization is eliminated, thereby allowing concurrent processing of transactions. A detailed simulation is used to study the program's behaviour and to assess scheduling policies based on the characteristics of the target architecture. Our results show that good speedups can be achieved, and that transformation can be used to derive a highly concurrent program with better locality and grain size.<<ETX>>","PeriodicalId":422721,"journal":{"name":"Proceedings of 1994 6th IEEE Symposium on Parallel and Distributed Processing","volume":"21 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1994-10-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133793254","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
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