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2020 IEEE 50th International Symposium on Multiple-Valued Logic (ISMVL)最新文献

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Methods to Generate Multiple-valued Bent Functions of an odd Number of Variables 生成奇数变量的多值弯曲函数的方法
2020 IEEE 50th International Symposium on Multiple-Valued Logic (ISMVL) Pub Date : 2020-11-01 DOI: 10.1109/ISMVL49045.2020.00-27
C. Moraga, M. Stankovic, S. Stojkovic, R. Stankovic
{"title":"Methods to Generate Multiple-valued Bent Functions of an odd Number of Variables","authors":"C. Moraga, M. Stankovic, S. Stojkovic, R. Stankovic","doi":"10.1109/ISMVL49045.2020.00-27","DOIUrl":"https://doi.org/10.1109/ISMVL49045.2020.00-27","url":null,"abstract":"Methods to generate p-valued bent functions of an odd number of variables are addressed. An extension of the Maiorana method originally developed to generate bent functions of an even number of variables is presented. It is shown that the simplest Maiorana function may be used to generate a large number of bent functions of an odd number of variables using as parameters a 1-place bent function, a random permutation matrix and the value vector of a random p-valued function.","PeriodicalId":421588,"journal":{"name":"2020 IEEE 50th International Symposium on Multiple-Valued Logic (ISMVL)","volume":"52 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125479621","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Reducing T-count When Decomposing Many MPMCT Gates Simultaneously 同时分解多个MPMCT门时减少t计数
2020 IEEE 50th International Symposium on Multiple-Valued Logic (ISMVL) Pub Date : 2020-11-01 DOI: 10.1109/ISMVL49045.2020.00-35
Soma Esaki, S. Yamashita
{"title":"Reducing T-count When Decomposing Many MPMCT Gates Simultaneously","authors":"Soma Esaki, S. Yamashita","doi":"10.1109/ISMVL49045.2020.00-35","DOIUrl":"https://doi.org/10.1109/ISMVL49045.2020.00-35","url":null,"abstract":"To realize fault-tolerant quantum circuits, one of the important task is to reduce the number of T gates (T-count) when we decompose MPMCT (Mixed Polarity Multiple-Control Toffoli) gates into elementary gates. When we have enough auxiliary qubits, we have an efficient decomposition of a single MPMCT gate. However, it has not been studied intensively how to decompose many MPMCT gates efficiently at the same time. Thus, this paper studies what is an efficient decomposition method when we have many MPMCT gates. We consider two situations to reduce T-count when we need to decompose many MPMCT gates. Then, we propose a heuristic method to reorder MPMCT gates if possible so that we can find the two situations as much as possible. Our preliminary experiments show that our heuristic can reduce T-count drastically.","PeriodicalId":421588,"journal":{"name":"2020 IEEE 50th International Symposium on Multiple-Valued Logic (ISMVL)","volume":"13 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122204587","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Centralising groups of semiprojections and near unanimity operations 集中半投影组和接近一致操作
2020 IEEE 50th International Symposium on Multiple-Valued Logic (ISMVL) Pub Date : 2020-11-01 DOI: 10.1109/ISMVL49045.2020.00061
Mike Behrisch, R. Pöschel
{"title":"Centralising groups of semiprojections and near unanimity operations","authors":"Mike Behrisch, R. Pöschel","doi":"10.1109/ISMVL49045.2020.00061","DOIUrl":"https://doi.org/10.1109/ISMVL49045.2020.00061","url":null,"abstract":"Exploring the Galois correspondence induced by commutation between permutations and finitary operations, we study which permutation groups on finite sets arise as centralising groups of near unanimity operations and semiprojections, respectively. We derive upper and lower bounds for the Galois closures in a rather general setting and prove that, in fact, all permutation groups admit such a representation if the arity of the commuting functions is chosen high enough. Using concrete examples we also discuss limitations to such representations when the arity is (too) small.","PeriodicalId":421588,"journal":{"name":"2020 IEEE 50th International Symposium on Multiple-Valued Logic (ISMVL)","volume":"9 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114313228","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Arrays vs. Decision Diagrams: A Case Study on Quantum Circuit Simulators 阵列与决策图:量子电路模拟器的案例研究
2020 IEEE 50th International Symposium on Multiple-Valued Logic (ISMVL) Pub Date : 2020-11-01 DOI: 10.1109/ISMVL49045.2020.000-9
Thomas Grurl, Jürgen Fuß, S. Hillmich, Lukas Burgholzer, R. Wille
{"title":"Arrays vs. Decision Diagrams: A Case Study on Quantum Circuit Simulators","authors":"Thomas Grurl, Jürgen Fuß, S. Hillmich, Lukas Burgholzer, R. Wille","doi":"10.1109/ISMVL49045.2020.000-9","DOIUrl":"https://doi.org/10.1109/ISMVL49045.2020.000-9","url":null,"abstract":"Despite the recent progress in the physical implementation of quantum computers, a significant amount of research still depends on the use of quantum circuit simulators running on classical hardware. While there are several techniques for quantum circuit simulation, many state-of-the-art simulators rely on an array-based simulation approach. However, this array-based approach has exponential memory complexity with respect to the number of simulated qubits. To address this drawback, complementary approaches based on decision diagrams have been proposed. While these approaches allow simulating circuits that could not be simulated before, they come with their own drawbacks. Unfortunately, no detailed case study has been conducted to date, which compares those complementary approaches and their respective strengths and weaknesses. In this work, we are addressing this by providing a survey on both approaches as well as a detailed case study on their respective performances.","PeriodicalId":421588,"journal":{"name":"2020 IEEE 50th International Symposium on Multiple-Valued Logic (ISMVL)","volume":"15 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133248977","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 12
Automatic Uniform Quantum State Preparation Using Decision Diagrams 使用决策图自动统一量子态制备
2020 IEEE 50th International Symposium on Multiple-Valued Logic (ISMVL) Pub Date : 2020-11-01 DOI: 10.1109/ISMVL49045.2020.00-10
Fereshte Mozafari, Mathias Soeken, Heinz Riener, G. Micheli
{"title":"Automatic Uniform Quantum State Preparation Using Decision Diagrams","authors":"Fereshte Mozafari, Mathias Soeken, Heinz Riener, G. Micheli","doi":"10.1109/ISMVL49045.2020.00-10","DOIUrl":"https://doi.org/10.1109/ISMVL49045.2020.00-10","url":null,"abstract":"Most quantum algorithms assume some specific initial state in superposition of basis states before performing the desired application-specific computations. The preparation of such states itself requires a computation performed by a quantum circuit. In this paper, we investigate the automatic state preparation of a specific subset of quantum states that are uniform superpositions over a subset of basis states, called uniform quantum states. We exploit that such states can be represented using Boolean functions and present a recursive algorithm based on functional decomposition. When using binary decision diagrams as function representation, we can enable fast and scalable quantum state preparation with respect to the size of the decision diagram. We show that the algorithm can find quantum circuits for functions, where state-of-the-art algorithms cannot be applied anymore.","PeriodicalId":421588,"journal":{"name":"2020 IEEE 50th International Symposium on Multiple-Valued Logic (ISMVL)","volume":"48 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128311163","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
A New Approach to Verification of Threshold Functions in Ternary Logic 三元逻辑中门限函数验证的新方法
2020 IEEE 50th International Symposium on Multiple-Valued Logic (ISMVL) Pub Date : 2020-11-01 DOI: 10.1109/ISMVL49045.2020.00008
T. Kitahashi, Y. Hata
{"title":"A New Approach to Verification of Threshold Functions in Ternary Logic","authors":"T. Kitahashi, Y. Hata","doi":"10.1109/ISMVL49045.2020.00008","DOIUrl":"https://doi.org/10.1109/ISMVL49045.2020.00008","url":null,"abstract":"The former part of this article mentions about some properties of ternary logic by means of extending those in binary logic. The latter half indicates that the parallelism of threshold planes is necessary to identify ternary threshold function, in addition to the linear separability of input vectors. This novel property is recognized from the very definition of threshold functions. A method to deal with the problem is proposed by making use of comparing arrangements of characteristic parameters of input subset.","PeriodicalId":421588,"journal":{"name":"2020 IEEE 50th International Symposium on Multiple-Valued Logic (ISMVL)","volume":"3 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127551190","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
ECG Signal Processing Using Fuzzy Classification for Sudden Cardiac Death Prediction 基于模糊分类的心电信号处理用于心源性猝死预测
2020 IEEE 50th International Symposium on Multiple-Valued Logic (ISMVL) Pub Date : 2020-11-01 DOI: 10.1109/ISMVL49045.2020.00-20
Zainul Abidin, Lalu Arya Taruna Jaya, P. Siwindarto, K. Tanno
{"title":"ECG Signal Processing Using Fuzzy Classification for Sudden Cardiac Death Prediction","authors":"Zainul Abidin, Lalu Arya Taruna Jaya, P. Siwindarto, K. Tanno","doi":"10.1109/ISMVL49045.2020.00-20","DOIUrl":"https://doi.org/10.1109/ISMVL49045.2020.00-20","url":null,"abstract":"In this paper, we propose electrocardiogram (ECG) signal processing using mini computer Raspberry Pi 3 Model B (RasPi) for Sudden Cardiac Death (SCD) prediction. AD8232 and TL084 are ICs used for ECG signal processing until R peak was detected. Poincaré Plot of RR Interval Differences (PORRID) was used by the RasPi to process the R peak until the PORRID parameters obtained. Fuzzy classification was employed to make decision of SCD probability. The system was tested with 6 data sets of each Normal Sinus Rhythm (NSR) and SCD. The system successfully categorized the 12 data sets according to the information in the database. Furthermore, 10 persons experienced actual implementation and the highest percentage of SCD probability is 36.82%.","PeriodicalId":421588,"journal":{"name":"2020 IEEE 50th International Symposium on Multiple-Valued Logic (ISMVL)","volume":"2131 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129973504","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Effective Formal Verification for Galois-field Arithmetic Circuits with Multiple-Valued Characteristics 多值伽罗域算术电路的有效形式化验证
2020 IEEE 50th International Symposium on Multiple-Valued Logic (ISMVL) Pub Date : 2020-11-01 DOI: 10.1109/ISMVL49045.2020.00-31
Akira Ito, Rei Ueno, N. Homma
{"title":"Effective Formal Verification for Galois-field Arithmetic Circuits with Multiple-Valued Characteristics","authors":"Akira Ito, Rei Ueno, N. Homma","doi":"10.1109/ISMVL49045.2020.00-31","DOIUrl":"https://doi.org/10.1109/ISMVL49045.2020.00-31","url":null,"abstract":"This study presents a new formal verification method for Galois-field (GF) arithmetic circuits with the characteristics of more-than two. The proposed method formally verifies the correctness of circuit functionality (i.e., the inputoutput relations given as GF-polynomials) by checking the equivalence between a specification and a gate-level netlist. In the proposed method, we represent a netlist as simultaneous algebraic equations and solve them based on a new polynomial reduction method efficiently applicable to arithmetic over extension fields ${{mathbb{F}}_{{p^m}}}$, where the characteristic p is larger than two. Using reverse topological term order to derive the Gröbner basis, our method can complete the verification even when a target circuit includes bugs. Our experimental results show that the proposed method can efficiently verify practical ${{mathbb{F}}_{{p^m}}}$ arithmetic circuits, including those used in modern cryptography.","PeriodicalId":421588,"journal":{"name":"2020 IEEE 50th International Symposium on Multiple-Valued Logic (ISMVL)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130040966","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
A New Characterization of Restriction-Closed Hyperclones 限制闭超克隆的一个新性质
2020 IEEE 50th International Symposium on Multiple-Valued Logic (ISMVL) Pub Date : 2020-11-01 DOI: 10.1109/ISMVL49045.2020.00063
Victor Lagerkvist
{"title":"A New Characterization of Restriction-Closed Hyperclones","authors":"Victor Lagerkvist","doi":"10.1109/ISMVL49045.2020.00063","DOIUrl":"https://doi.org/10.1109/ISMVL49045.2020.00063","url":null,"abstract":"A hyperoperation is a mapping from a do-main to the powerset of the domain. Hyperoperations can be composed together to form new hyperoperations, and the resulting sets are called hyperclones. In this paper we study the lattice of restriction-closed hyperclones over finite domains. Such hyperclones form a natural subclass of hyperclones but have received comparably little attention. We give a complete description of restriction-closed hyperclones, relative to the clone lattice, and also outline some important open questions to resolve when studying hyperclones over partially defined operations.","PeriodicalId":421588,"journal":{"name":"2020 IEEE 50th International Symposium on Multiple-Valued Logic (ISMVL)","volume":"2 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128112409","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
[Title page] (标题页)
2020 IEEE 50th International Symposium on Multiple-Valued Logic (ISMVL) Pub Date : 2020-11-01 DOI: 10.1109/ismvl49045.2020.00001
{"title":"[Title page]","authors":"","doi":"10.1109/ismvl49045.2020.00001","DOIUrl":"https://doi.org/10.1109/ismvl49045.2020.00001","url":null,"abstract":"","PeriodicalId":421588,"journal":{"name":"2020 IEEE 50th International Symposium on Multiple-Valued Logic (ISMVL)","volume":"49 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116110422","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
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