International Symposium for Testing and Failure Analysis最新文献_第10页

Cooling System for High Performance Device Analysis 高性能设备冷却系统分析

International Symposium for Testing and Failure Analysis Pub Date : 2022-10-30 DOI: 10.31399/asm.cp.istfa2022p0058

Hirotaka Nonaka, H. Terada, A. Shimase, Junya Suzuki, A. Nakamura

引用次数: 0

FTC—A Universal Low-Overhead Fault Injection Attack Detection Solution 通用的低开销故障注入攻击检测解决方案

International Symposium for Testing and Failure Analysis Pub Date : 2022-10-30 DOI: 10.31399/asm.cp.istfa2022p0386

Md Rafid Muttaki, Brian T Barker, M. Tehranipoor, Farimah Farahmandi

{"title":"FTC—A Universal Low-Overhead Fault Injection Attack Detection Solution","authors":"Md Rafid Muttaki, Brian T Barker, M. Tehranipoor, Farimah Farahmandi","doi":"10.31399/asm.cp.istfa2022p0386","DOIUrl":"https://doi.org/10.31399/asm.cp.istfa2022p0386","url":null,"abstract":"\u0000 Fault Injection Attacks (FIAs) have become prolific and effective methods of violating the integrity and confidentiality of integrated circuits and electronic systems. FIAs can be accomplished using clock-glitch, voltage glitch, laser, optical instruments, and electromagnetic (EM) emanation. One promising solution to detect FIAs is to use on-chip sensors to capture the attacks’ impact. However, the variety of FIAs has led to numerous custom-designed sensors for each of them, challenging the feasibility of the implementation and introducing a large overhead. This paper proposes developing a universal Fault-to-Time Converter (FTC) sensor that can effectively detect all the aforementioned FIAs while requiring minimal overhead. The FTC sensor converts the effects of faults injected by an FIA method into “time” that is measurable. Then, the “time” difference can be analyzed further to identify whether an attack has been carried out successfully. The sensor design can be easily implemented in both FPGA and ASIC platforms. Our FTC sensor implementation in FPGA platforms demonstrates that the design can effectively differentiate various FIA attack scenarios with its encoded output. The FTC sensor can also be extended to cover other fault attacks that have a similar impact on the victim device (i.e., affecting circuit timing).","PeriodicalId":417175,"journal":{"name":"International Symposium for Testing and Failure Analysis","volume":"3 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-10-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130398589","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 1

Review of Scanning Probe Microscopy Methods for Failure Analysis 失效分析的扫描探针显微方法综述

International Symposium for Testing and Failure Analysis Pub Date : 2022-10-30 DOI: 10.31399/asm.cp.istfa2022tpm1

P. De Wolf

引用次数: 0

Physical Inspection for Hardware Assurance 硬件保证的物理检查

International Symposium for Testing and Failure Analysis Pub Date : 2022-10-30 DOI: 10.31399/asm.cp.istfa2022tpp1

N. Asadizanjani

引用次数: 0

An Innovative Technique for Large-Scale Delayering of Semiconductor Devices with Nanometric-Scale Surface Flatness 具有纳米级表面平面度的半导体器件大规模分层的创新技术

International Symposium for Testing and Failure Analysis Pub Date : 2022-10-30 DOI: 10.31399/asm.cp.istfa2022p0414

P. Nowakowski, J. Liu, M. Boccabella, M. Ray, P. Fischione

引用次数: 0

Defect Localization by Lock-In-Thermography 用锁定热成像技术定位缺陷

International Symposium for Testing and Failure Analysis Pub Date : 2017-11-05 DOI: 10.31399/asm.cp.istfa2022tpe1

S. Brand

引用次数: 0

Non-Destructive PCB Reverse Engineering Using X-Ray Micro Computed Tomography 使用x射线微计算机断层扫描的非破坏性PCB逆向工程

International Symposium for Testing and Failure Analysis Pub Date : 2015-11-01 DOI: 10.31399/asm.cp.istfa2015p0164

N. Asadizanjani, S. Shahbazmohamadi, M. Tehranipoor, Domenic Forte

{"title":"Non-Destructive PCB Reverse Engineering Using X-Ray Micro Computed Tomography","authors":"N. Asadizanjani, S. Shahbazmohamadi, M. Tehranipoor, Domenic Forte","doi":"10.31399/asm.cp.istfa2015p0164","DOIUrl":"https://doi.org/10.31399/asm.cp.istfa2015p0164","url":null,"abstract":"\u0000 Reverse engineering of electronics systems is performed for various reasons ranging from honest ones such as failure analysis, fault isolation, trustworthiness verification, obsolescence management, etc. to dishonest ones such as cloning, counterfeiting, identification of vulnerabilities, development of attacks, etc. Regardless of the goal, it is imperative that the research community understands the requirements, complexities, and limitations of reverse engineering. Until recently, the reverse engineering was considered as destructive, time consuming, and prohibitively expensive, thereby restricting its application to a few remote cases. However, the advents of advanced characterization and imaging tools and software have counteracted this point of view. In this paper, we show how X-ray micro-tomography imaging can be combined with advanced 3D image processing and analysis to facilitate the automation of reverse engineering, and thereby lowering the associated time and cost. In this paper, we demonstrate our proposed process on two different printed circuit boards (PCBs). The first PCB is a four-layer custom designed board while the latter is a more complex commercial system. Lessons learned from this effort can be used to both develop advanced countermeasures and establish a more efficient workflow for instances where reverse engineering is deemed necessary. Keywords: Printed circuit boards, non-destructive imaging, X-ray tomography, reverse engineering.","PeriodicalId":417175,"journal":{"name":"International Symposium for Testing and Failure Analysis","volume":"38 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122254299","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 37

X-Ray and SAM—Challenges for IC Package Inspection x射线和sam - IC封装检测的挑战

International Symposium for Testing and Failure Analysis Pub Date : 2012-11-11 DOI: 10.31399/asm.cp.istfa2022tpq1

T. M. Moore

引用次数: 1