2015 International Conference on Smart Technologies and Management for Computing, Communication, Controls, Energy and Materials (ICSTM)最新文献

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Catastrophe alert system using social networks 使用社交网络的灾难警报系统
G. Tamilmani, K. Rajathi, P. Ponnaruvi
{"title":"Catastrophe alert system using social networks","authors":"G. Tamilmani, K. Rajathi, P. Ponnaruvi","doi":"10.1109/ICSTM.2015.7225416","DOIUrl":"https://doi.org/10.1109/ICSTM.2015.7225416","url":null,"abstract":"The unbelievable growth and amount of information spread of social media helps the discovering of the new age result oriented recommender systems. Unfortunately the orthodoxies in the current system and the previous generation systems are structure oriented. For example rely mostly on the relativity of the network and the social demography. The investigative points discussed in this paper are generally based on the relative side of the communal factors. So the exploration leads naturally to the collaboration of the real time single directional social media dataset like twitter and the natural calamity events like cyclone, typhoons, earthquakes, Tsunami etc. The need for an interactive message application is higher than any other time because most of the countries are located at the geographically vulnerable point for earthquake invoked tsunami. So to probe such unfortunate event, there we require a vector backed machine of tweets which is based on the keyword, total no of words, etc. The location is estimated based on spatio-temporal pattern of events filtering. It will identify every user as a sensor and calculates. Whenever an earthquake occurs the report will be generated and forwarded to the user and the team of rescuers at the same time. So we can consider this as the fastest way when compared to the traditional JMA broadcast.","PeriodicalId":412649,"journal":{"name":"2015 International Conference on Smart Technologies and Management for Computing, Communication, Controls, Energy and Materials (ICSTM)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-05-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129540520","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
An XML based data representation model to discover infrastructure services 用于发现基础设施服务的基于XML的数据表示模型
Jyothi Shetty, DEMIAN ANTONY DMELLO
{"title":"An XML based data representation model to discover infrastructure services","authors":"Jyothi Shetty, DEMIAN ANTONY DMELLO","doi":"10.1109/ICSTM.2015.7225400","DOIUrl":"https://doi.org/10.1109/ICSTM.2015.7225400","url":null,"abstract":"Cloud is a set of services and these services are provided to the users on demand. Different providers provide their services to the users through the cloud. With the exponential growth of the cloud services, it has become very difficult for the user to search a required service. Searching becomes still more difficult when user wishes to search a service using its functional properties. The cloud service discovery methods enable users to discover the cloud services based on the user demand. Cloud service discovery is considered as one of the important research areas because of different types and features of cloud providers, their own naming conventions and descriptions. The results of the discovery process can be improved by using a well defined repository. To improve the effectiveness of the discovery, cloud repository requires a good structure to represent the information regarding a cloud service. Information stored in the repository can also be used for selecting the services. In this paper we propose a representational model to store the description of infrastructure services using XML. The proposed data representational model also includes the semantic information.","PeriodicalId":412649,"journal":{"name":"2015 International Conference on Smart Technologies and Management for Computing, Communication, Controls, Energy and Materials (ICSTM)","volume":"49 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-05-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123866449","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 12
Issues in NFC as a form of contactless communication: A comprehensive survey NFC作为一种非接触式通信形式的问题:一个全面的调查
Shirsha Ghosh, Joyeeta Goswami, Abhishek Kumar, A. Majumder
{"title":"Issues in NFC as a form of contactless communication: A comprehensive survey","authors":"Shirsha Ghosh, Joyeeta Goswami, Abhishek Kumar, A. Majumder","doi":"10.1109/ICSTM.2015.7225422","DOIUrl":"https://doi.org/10.1109/ICSTM.2015.7225422","url":null,"abstract":"Near Field Communication, being an emerging technology, has become an attractive area of research in academics as well as in industries due to its flooding growth and promising applications like short range contactless communication for mobile phone and other devices alike. In this regard, a proper understanding and direction of current research of NFC is to be perfectly maintained for the advancement of knowledge and to reduce the bridge gap between its basic theory and application practice. In this paper, we have proposed a thorough survey on NFC and discussed it in terms of our own visualization. We have found the problems available in the current technology of major industries like Apple, Google, Paypal and proposed some new thoughts to solve those. We also have analyzed the NFC business ecosystem and current / future market trends. In other words, this holistic review with the objective of bringing to state-of-the-art in NFC design provides development of knowledge in this field with future research directions.","PeriodicalId":412649,"journal":{"name":"2015 International Conference on Smart Technologies and Management for Computing, Communication, Controls, Energy and Materials (ICSTM)","volume":"172 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-05-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124209669","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 20
A novel low power and high speed Multiply-accumulate (MAC) unit design for floating-point numbers 一种新颖的低功耗、高速浮点数乘累加(MAC)单元设计
N. Babu, R. Sarma
{"title":"A novel low power and high speed Multiply-accumulate (MAC) unit design for floating-point numbers","authors":"N. Babu, R. Sarma","doi":"10.1109/ICSTM.2015.7225452","DOIUrl":"https://doi.org/10.1109/ICSTM.2015.7225452","url":null,"abstract":"At the present days, the low power designs are playing a vital role in every designs. Due to the existence of the battery designs in the integrated circuits the low power designs play a major role of operations in any circuit. In this paper our work is on a low power and high speed Multiply-accumulate unit that is the basic block in digital processing systems. Since, the basic blocks of MAC unit are multiplier, adder and accumulator. The design of these blocks should be efficient in terms of the power and speed. So our work is based on the BCD multiplication and addition and also to find the floating point numbers. Our implementation consists of multiplier, register, binary to BCD converter; Adder and BCD block which make the overall output of the MAC to be in the BCD format. First the individual blocks are designed and analyzed and the overall MAC is implemented in Cadence 0.9μm technology and power and delay analysis is done using the cadence spectre.","PeriodicalId":412649,"journal":{"name":"2015 International Conference on Smart Technologies and Management for Computing, Communication, Controls, Energy and Materials (ICSTM)","volume":"6 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-05-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124042973","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
Test power aware STUMP BIST 测试功率感知STUMP BIST
M.R. Gowthami, N. R. Kiran, G. Harish, S. Yellampalli
{"title":"Test power aware STUMP BIST","authors":"M.R. Gowthami, N. R. Kiran, G. Harish, S. Yellampalli","doi":"10.1109/ICSTM.2015.7225456","DOIUrl":"https://doi.org/10.1109/ICSTM.2015.7225456","url":null,"abstract":"The testing power is the biggest concern in modern VLSI chip testing which affects the reliability of the chip. The testing power is very greater than the functional power because during the test mode almost all the part of the chip is active which elevates the testing power problem. In this paper a low test power BIST architecture is proposed which employs clock gating and scan staggering to reduce the testing power, and scan chain segmentation to reduce the testing time. From the experiments conducted on ISCAS89 benchmark circuits, the proposed BIST architecture reduces the test power by 56% with 1% area overhead.","PeriodicalId":412649,"journal":{"name":"2015 International Conference on Smart Technologies and Management for Computing, Communication, Controls, Energy and Materials (ICSTM)","volume":"2 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-05-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126375379","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 5
Hybrid approach for identification and modelling of non linear chaotic signals 非线性混沌信号辨识与建模的混合方法
S. Sreekumar, S. Badjate
{"title":"Hybrid approach for identification and modelling of non linear chaotic signals","authors":"S. Sreekumar, S. Badjate","doi":"10.1109/ICSTM.2015.7225429","DOIUrl":"https://doi.org/10.1109/ICSTM.2015.7225429","url":null,"abstract":"Ever since independence, India has always been an economy dependent on the agricultural sector. The agricultural sector in turn has been dependent heavily on monsoons and its nature. The more accurately we decipher the predictability of rainfall, the better the agricultural produce and a better performing economy. Time series prediction finds various applications in medicine, stock market, meteorology, geology, astronomy, chemistry, biometrics and robotics also. There are various prediction models which enhance the ability to reduce the after effects of the hazards created by such uncertainty. This paper gives a neuro fuzzy approach to the modeling on weather applications particularly rainfall over a region in presence of chaos if any. In other words a prediction model for the analysis of rainfall is done. In local modeling approaches, the independent models which work on different nonlinear systems and processes are very successful in modeling, identification, and prediction applications. Chaotic time series are therefore used in our analysis. The results thus produced give a meager prediction error which is desirable to get an efficient analogy to create a much better prediction model for chaotic neuro fuzzy or adaptive neural network systems.","PeriodicalId":412649,"journal":{"name":"2015 International Conference on Smart Technologies and Management for Computing, Communication, Controls, Energy and Materials (ICSTM)","volume":"21 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-05-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134113501","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Hardware Trojan self-detector 硬件木马自检器
N. R. Kiran, M. Ritesh, G. Harish, S. Yellampalli
{"title":"Hardware Trojan self-detector","authors":"N. R. Kiran, M. Ritesh, G. Harish, S. Yellampalli","doi":"10.1109/ICSTM.2015.7225455","DOIUrl":"https://doi.org/10.1109/ICSTM.2015.7225455","url":null,"abstract":"Hardware Trojan is a severe threat to the modern integrated circuits, which is posed by the IP business model and untrusted foundries. In most of the modern SoCs several block are licensed from third party IP vendor where the chances of Trojan insertion is high and Trojan can also be inserted in foundries which are all globalized generally untrusted. In this paper a new self-Trojan detection is proposed which detects the Trojan by analyzing the circuit responses with the golden responses.","PeriodicalId":412649,"journal":{"name":"2015 International Conference on Smart Technologies and Management for Computing, Communication, Controls, Energy and Materials (ICSTM)","volume":"34 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-05-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133888807","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Implementation of metering practices in smart grid 智能电网计量实践的实施
Velhal Geeta Vilas, A. Pujara, S. Bakre, V. Muralidhara
{"title":"Implementation of metering practices in smart grid","authors":"Velhal Geeta Vilas, A. Pujara, S. Bakre, V. Muralidhara","doi":"10.1109/ICSTM.2015.7225465","DOIUrl":"https://doi.org/10.1109/ICSTM.2015.7225465","url":null,"abstract":"Smart grid concept promises a reliable and efficient supply of electricity. It recognizes the growing importance of Information and Communication Technologies (ICTs). By incorporating ICT in the existing electrical network, it will transform into the smart or intelligent grid. A vivid study of components of the smart grid i.e. smart meter, TOD meter, ICT, Advanced Metering Infrastructure (AMI) is illustrated which is based on the visits at different places like Lavasa, Kalkhairewadi and Bhigwan in Pune district in Maharashtra state of India. Application of smart meters for fault location is focused in this paper. The efforts have been taken to highlight the issues in the traditional fault locating techniques for Transmission and Distribution network.","PeriodicalId":412649,"journal":{"name":"2015 International Conference on Smart Technologies and Management for Computing, Communication, Controls, Energy and Materials (ICSTM)","volume":"16 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-05-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131477872","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 10
A web-based monitoring and control of DC motor using LabVIEW environment 利用LabVIEW环境实现了基于web的直流电机监测与控制
Harshatej K. Rane, S. K. Parchandekar
{"title":"A web-based monitoring and control of DC motor using LabVIEW environment","authors":"Harshatej K. Rane, S. K. Parchandekar","doi":"10.1109/ICSTM.2015.7225476","DOIUrl":"https://doi.org/10.1109/ICSTM.2015.7225476","url":null,"abstract":"Digital world and modern technology makes sharing of real laboratories on the internet and creating a virtual on-line laboratory possible. Many educational institutes do not afford expensive Laboratory equipment's or they don't want to spend time in building experiments which are less useful for them. Using laboratory experiments virtually may be helpful for such situations. LabVIEW (Laboratory of Virtual Instrumentation Environment Workbench) is a software which provides virtual instrumentation environment very well. Integration with NI (National Instruments) Hardware and web services feature of this software makes monitoring and controlling of experiments through web very simple. DC motor control is one of the laboratory experiments which can be done virtually by using LABVIEW, NI Hardware's and custom built Hardware. By using thyristor based full wave convertor, speed control of the DC motor can be done by varying the firing angle of pulse given to the thyristor.","PeriodicalId":412649,"journal":{"name":"2015 International Conference on Smart Technologies and Management for Computing, Communication, Controls, Energy and Materials (ICSTM)","volume":"34 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-05-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133384350","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
Stepped segment LFSR for low test power BIST 用于低测试功率BIST的阶梯式分段LFSR
B. Ram, G. Harish, Shiva Yelampalli
{"title":"Stepped segment LFSR for low test power BIST","authors":"B. Ram, G. Harish, Shiva Yelampalli","doi":"10.1109/ICSTM.2015.7225454","DOIUrl":"https://doi.org/10.1109/ICSTM.2015.7225454","url":null,"abstract":"The power during testing is very greater than the functional power in the BIST which affects the reliability of the chip and it is due to the less correlation between the test patterns generated by TPG. In this paper a new low transition TPG is proposed which allows maximum 2 transitions between the consecutive test patterns by stepped segment activation of LFSR. From the experiments conducted on ISCAS'89 benchmark circuits the proposed LFSR reduces the testing power averagely by 19.63% with little reduction in fault coverage.","PeriodicalId":412649,"journal":{"name":"2015 International Conference on Smart Technologies and Management for Computing, Communication, Controls, Energy and Materials (ICSTM)","volume":"75 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-05-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115913333","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
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