2013 IEEE 31st International Conference on Computer Design (ICCD)最新文献_第8页

A TCAM generator for packet classification 一个用于分组分类的TCAM生成器

2013 IEEE 31st International Conference on Computer Design (ICCD) Pub Date : 2013-10-01 DOI: 10.1109/ICCD.2013.6657060

Infall Syafalni, Tsutomu Sasao

引用次数: 4

Exploiting dynamic phase distance mapping for phase-based tuning of embedded systems 利用动态相位距离映射实现嵌入式系统的相位调优

2013 IEEE 31st International Conference on Computer Design (ICCD) Pub Date : 2013-10-01 DOI: 10.1109/ICCD.2013.6657066

Tosiron Adegbija, A. Gordon-Ross

引用次数: 3

Towards efficient dynamic data placement in NoC-based multicores 在基于noc的多核中实现高效的动态数据放置

2013 IEEE 31st International Conference on Computer Design (ICCD) Pub Date : 2013-10-01 DOI: 10.1109/ICCD.2013.6657067

Qingchuan Shi, Farrukh Hijaz, O. Khan

引用次数: 7

Resource allocation algorithms for guaranteed service in application-specific NoCs 特定应用noc中保证服务的资源分配算法

2013 IEEE 31st International Conference on Computer Design (ICCD) Pub Date : 2013-10-01 DOI: 10.1109/ICCD.2013.6657088

Gongmin Yang, Hao He, Jiang Hu

引用次数: 1

Lazy Precharge: An overhead-free method to reduce precharge overhead for memory parallelism improvement of DRAM system 惰性预充:一种减少预充开销以提高DRAM系统内存并行性的无开销方法

2013 IEEE 31st International Conference on Computer Design (ICCD) Pub Date : 2013-10-01 DOI: 10.1109/ICCD.2013.6657036

Zhang Tao, Cong Xu, Yuan Xie, Guangyu Sun

引用次数: 2

Equivalence checking for compiler transformations in behavioral synthesis 行为综合中编译器转换的等价性检查

2013 IEEE 31st International Conference on Computer Design (ICCD) Pub Date : 2013-10-01 DOI: 10.1109/ICCD.2013.6657090

Zhenkun Yang, K. Hao, Kai Cong, S. Ray, Fei Xie

引用次数: 10

Optimizing post-silicon conformance checking 优化后硅一致性检查

2013 IEEE 31st International Conference on Computer Design (ICCD) Pub Date : 2013-10-01 DOI: 10.1109/ICCD.2013.6657092

Li Lei, Kai Cong, Fei Xie

引用次数: 7

CG-Resync: Conversion-guided resynchronization for a SSD-based RAID array CG-Resync: ssd RAID的转换引导重同步

2013 IEEE 31st International Conference on Computer Design (ICCD) Pub Date : 2013-10-01 DOI: 10.1109/ICCD.2013.6657081

Letian Yi, J. Shu, Jiaxin Ou, Weimin Zheng

{"title":"CG-Resync: Conversion-guided resynchronization for a SSD-based RAID array","authors":"Letian Yi, J. Shu, Jiaxin Ou, Weimin Zheng","doi":"10.1109/ICCD.2013.6657081","DOIUrl":"https://doi.org/10.1109/ICCD.2013.6657081","url":null,"abstract":"SSD-based RAID arrays have been widely adopted in large-scale systems. One requirement on a RAID is to provide data consistency, which can be an issue during serving write requests. While using NVRAM or on-storage logging can ensure the consistency, the approaches can either be very expensive or substantially compromise performance. For SSD-based RAID, scanning the entire storage space during rebooting after a crash can recover the consistency. However, it takes a long resychronization time. To address the issue efficiently and cost-effectively, we propose CG-Resync, a scheme providing consistency assurance for SSD-based RAIDs by leveraging logging mechanism readily available in almost all SSDs for accommodating flash's out-of-place-write requirement. To identify uncompleted writes resulting in inconsistent stripes, we use guided conversion in managing SSD's internal logs. In particular, only when a stripe becomes consistent does CG-Resync allow the updated data on the stripe to be removed from the log. We evaluate CG-Resync and experiments show that it provides improved RAID reliability and availability upon a crash with little performance loss during regular I/O operations.","PeriodicalId":398811,"journal":{"name":"2013 IEEE 31st International Conference on Computer Design (ICCD)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129280478","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 2

FastLanes: An FPGA accelerated GPU microarchitecture simulator FastLanes: FPGA加速GPU微架构模拟器

2013 IEEE 31st International Conference on Computer Design (ICCD) Pub Date : 2013-10-01 DOI: 10.1109/ICCD.2013.6657049

Kuan Fang, Yufei Ni, Jiayuan He, Zonghui Li, Shuai Mu, Yangdong Deng

{"title":"FastLanes: An FPGA accelerated GPU microarchitecture simulator","authors":"Kuan Fang, Yufei Ni, Jiayuan He, Zonghui Li, Shuai Mu, Yangdong Deng","doi":"10.1109/ICCD.2013.6657049","DOIUrl":"https://doi.org/10.1109/ICCD.2013.6657049","url":null,"abstract":"Graphic Processing Units (GPUs) have emerged as a new general purpose computing platform that attracts significant research efforts. Currently, GPU architecture research resorts to time-consuming software simulations to evaluate microarchitecture innovations. In this paper, we propose FastLanes, an FPGA based simulator for a generic GPU microarchitecture, to enable hardware-accelerated simulation. FastLanes consists of a function model and a timing model, both implemented on FPGA. The functional model implements the full functionality of a multiprocessor of GPU and emulates multiple multiprocessors via time-division multiplexing. We develop a hybrid implementation strategy in which certain GPU logic is directly mapped to FPGA while the other logic is simulated by reusing the same FPGA logic. A corresponding context shifting mechanism is proposed to store execution states of threads from FPGA to external on-board memory, and vice versa. Such a mechanism makes it possible to simulate hundreds of GPU cores on a single FPGA evaluation board. Driven by the functional simulation results, the timing model considers the detailed configuration of GPU microarchitecture to derive the performance evaluation. A compiler tool-chain is also developed to allow the execution of NVIDIA GPU binary on FastLanes. Experimental results prove that FastLanes outperforms its software equivalent by up to 2 orders of magnitude.","PeriodicalId":398811,"journal":{"name":"2013 IEEE 31st International Conference on Computer Design (ICCD)","volume":"13 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114665791","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 4