{"title":"14. Literaturverzeichnis","authors":"D. Brötz, M. Weller","doi":"10.1515/9783110849479-016","DOIUrl":"https://doi.org/10.1515/9783110849479-016","url":null,"abstract":"","PeriodicalId":377878,"journal":{"name":"VHDL-Simulation und -Synthese","volume":"876 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-10-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121027874","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Frontmatter","authors":"","doi":"10.1515/9783110673463-fm","DOIUrl":"https://doi.org/10.1515/9783110673463-fm","url":null,"abstract":"","PeriodicalId":377878,"journal":{"name":"VHDL-Simulation und -Synthese","volume":"48 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-10-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132700594","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"12. Erweiterungen durch den Standard VHDL-2008","authors":"","doi":"10.1515/9783110673463-012","DOIUrl":"https://doi.org/10.1515/9783110673463-012","url":null,"abstract":"","PeriodicalId":377878,"journal":{"name":"VHDL-Simulation und -Synthese","volume":"74 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-10-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134369765","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"5. Arithmetik und Synchronzähler","authors":"","doi":"10.1515/9783110673463-005","DOIUrl":"https://doi.org/10.1515/9783110673463-005","url":null,"abstract":"","PeriodicalId":377878,"journal":{"name":"VHDL-Simulation und -Synthese","volume":"26 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-10-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130210010","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"11. Zustandsdifferenzengleichungen für Beobachter","authors":"","doi":"10.1515/9783110673463-011","DOIUrl":"https://doi.org/10.1515/9783110673463-011","url":null,"abstract":"","PeriodicalId":377878,"journal":{"name":"VHDL-Simulation und -Synthese","volume":"21 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-10-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132250351","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"4. Tri-State- und Don’t-Care-Modellierung","authors":"","doi":"10.1515/9783110673463-004","DOIUrl":"https://doi.org/10.1515/9783110673463-004","url":null,"abstract":"","PeriodicalId":377878,"journal":{"name":"VHDL-Simulation und -Synthese","volume":"4 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-10-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121080817","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"3. Entwurf digitaler Funktionselemente mit Prozessen","authors":"","doi":"10.1515/9783110673463-003","DOIUrl":"https://doi.org/10.1515/9783110673463-003","url":null,"abstract":"","PeriodicalId":377878,"journal":{"name":"VHDL-Simulation und -Synthese","volume":"78 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-10-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126316752","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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