{"title":"Using pass/fail limits as a diagnostic tool","authors":"H. Dill","doi":"10.1109/AUTEST.1998.713460","DOIUrl":"https://doi.org/10.1109/AUTEST.1998.713460","url":null,"abstract":"This paper addresses the improvement of diagnostic resolution by judicious selection of pass/fail limits. Emphasis is placed on the use of pass/fail limits to discriminate among suspected failures in a known faulty circuit and increase test outcome confidence. Analog circuit simulations serve to illustrate the relationship between failed circuit behavior, pass/fail limits and the associated diagnostic inferences. Interim findings included here were presented at the IEEE International Workshop on System Test and Diagnosis. These findings have been updated to include results from application to a large scale project.","PeriodicalId":367253,"journal":{"name":"1998 IEEE AUTOTESTCON Proceedings. IEEE Systems Readiness Technology Conference. Test Technology for the 21st Century (Cat. No.98CH36179)","volume":"21 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1998-08-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114961106","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
W.R. Dearborn, E.G. Perkins, J.J. Wong, D. Rolince
{"title":"The Virtual Test program (VTest)","authors":"W.R. Dearborn, E.G. Perkins, J.J. Wong, D. Rolince","doi":"10.1109/AUTEST.1998.713435","DOIUrl":"https://doi.org/10.1109/AUTEST.1998.713435","url":null,"abstract":"The purpose of the USAF's Research Laboratory's Virtual Test (VTest) Program is to develop methodologies and software tools that permit the design, capture, and simulation of tester independent test requirements, Unit Under Test(UUT) models, and tester resource description information for the purpose of virtual testing. The program has resulted in a set of Integrated Commercial Off-The-Shelf(COTS) tools that reuse design simulation models developed for Electronic Design Automation (EDA) tools for test simulation on new digital Printed Circuit Boards (PCBs) and Assemblies (PCAs) and to significantly reduce model development on current digital PCAs. EDA derived tools are used to lay out and simulate a virtual test schematic (includes models of the UUT and tester environment) for the development of fully simulated analog/mixed signal Test Program Sets (TPSs), thereby significantly reducing analog/mixed signal TPS test integration times. Observed savings for various portions of the TPS development process vary from 24% for New Design Digital TPSs to 85% for Rehost of Analog TPSs.","PeriodicalId":367253,"journal":{"name":"1998 IEEE AUTOTESTCON Proceedings. IEEE Systems Readiness Technology Conference. Test Technology for the 21st Century (Cat. No.98CH36179)","volume":"41 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1998-08-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123404553","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Wireless communications between system under test and portable maintenance aids","authors":"L. Su, V. Love","doi":"10.1109/AUTEST.1998.713475","DOIUrl":"https://doi.org/10.1109/AUTEST.1998.713475","url":null,"abstract":"As the Department of Defense (DOD) downsizes there is a great need to reduce the maintenance burden. Currently systems in the DOD inventory utilize numerous hardware, interconnecting devices, and data and protocol to communicate diagnostics and maintenance information to external systems or maintainers. These communication devices always end up to be a big burden to the systems' maintainers, in terms of weight and volume. Moreover, these interconnecting devices require the portable maintenance aide to be tethered to the weapon systems. This greatly confines the maintainers' mobility and hence wastes maintenance manpower. The Advanced Technology Office (ATO), US Army Test, Measurement, and Diagnostic Equipment Activity (USATA), in Sep 1996, initiated proof-of-concept that a wireless remote-controllable communication device could be developed to untether maintainers with maintenance aides and systems or weapon systems. This paper provides a report on the development and design of this wireless remote-controllable communication device.","PeriodicalId":367253,"journal":{"name":"1998 IEEE AUTOTESTCON Proceedings. IEEE Systems Readiness Technology Conference. Test Technology for the 21st Century (Cat. No.98CH36179)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1998-08-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128967211","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Backup generator control and monitoring system for KSL TV","authors":"P.W. Boyden","doi":"10.1109/AUTEST.1998.713518","DOIUrl":"https://doi.org/10.1109/AUTEST.1998.713518","url":null,"abstract":"Summary form only given, as follows. This is a backup generator monitoring and control system designed to meet the demands stipulated by KSL Television in Salt Lake City, Utah. The system must monitor 28 (up to 32) inputs including, but not limited to, voltages, currents, and frequency of all three phases at three different points, as well as engine conditions, and enunciate any problems. Analog normalization, A/D conversion and processing occurs at the generator site. The system uses an interactive remote display with \"softkeys\" and a simple back-lit LCD readout through use of an EIA-422 transmission line. Control is simple, and hardware-based in order to ensure absolute functionality and reliability. It is important to make the design of the monitoring station robust, but its operation must be simple to accommodate all skill levels of operators.","PeriodicalId":367253,"journal":{"name":"1998 IEEE AUTOTESTCON Proceedings. IEEE Systems Readiness Technology Conference. Test Technology for the 21st Century (Cat. No.98CH36179)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1998-08-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130821221","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Delay fault analysis using discrete event system approach","authors":"G. Westerman, C. Stroud, J. Heath, R. Kumar","doi":"10.1109/AUTEST.1998.713415","DOIUrl":"https://doi.org/10.1109/AUTEST.1998.713415","url":null,"abstract":"An important goal of combinational logic design is that all possible delay faults are detectable with a set of robust delay fault tests. Discrete event system (DES) is a dynamical system that evolves according to asynchronous occurrence of certain discrete changes, called events. Any combinational logic circuit can be considered a discrete event system. In this paper, a formal verification method based on DES modeling techniques is developed for delay fault testability analysis. DES logic delay gate models and circuit path delay models are constructed such that this formal verification method evaluates robust delay fault testability and provides robust delay fault test patterns.","PeriodicalId":367253,"journal":{"name":"1998 IEEE AUTOTESTCON Proceedings. IEEE Systems Readiness Technology Conference. Test Technology for the 21st Century (Cat. No.98CH36179)","volume":"141 2 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1998-08-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128811393","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
T. Maudie, T. Miller, R. Nielsen, D. Wallace, T. Ruehs, D. Zehrbach
{"title":"Challenges of MEMS device characterization in engineering development and final manufacturing","authors":"T. Maudie, T. Miller, R. Nielsen, D. Wallace, T. Ruehs, D. Zehrbach","doi":"10.1109/AUTEST.1998.713439","DOIUrl":"https://doi.org/10.1109/AUTEST.1998.713439","url":null,"abstract":"Testing of microelectromechanical systems (MEMS) devices is rapidly progressing to the point that high volume, cost effective, and accurate measurement systems are necessary. This area of automatic test is very challenging compared to a normal semiconductor portfolio. Besides the typical electrical and thermal stimulus, a MEMS measurement system requires control of the quantity, property, or condition to be measured. Information on MEMS related testing issue including input stimuli and output responses are presented. A definition for a MEMS characterization system is proposed. Additionally, future demands based on a expanding product portfolio are discussed.","PeriodicalId":367253,"journal":{"name":"1998 IEEE AUTOTESTCON Proceedings. IEEE Systems Readiness Technology Conference. Test Technology for the 21st Century (Cat. No.98CH36179)","volume":"103 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1998-08-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123283937","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Automatic BIST design tool for mixed-signal circuits","authors":"Chujen Lin, L. Haynes, P. Mandava, P. Prasad","doi":"10.1109/AUTEST.1998.713427","DOIUrl":"https://doi.org/10.1109/AUTEST.1998.713427","url":null,"abstract":"This paper describes the development of a software tool for automating the design process of built-in self-test (BIST) circuits for mixed-signal circuit cards. The purpose of this tool is to generate a complete design of microcontroller-based BIST circuits including hardware and firmware. A typical BIST system generated by this tool consists of a microcontroller, A/D, D/A converters, digital I/Os, digital/analog multiplexers, and a programmable logic device. Several heuristic-based algorithms were developed in this work to optimize the configuration of multiplexers so that the required number of input and output ports is minimized, and the size and number of multiplexers are also reduced. The design tool reported here can greatly simplify the time-consuming procedure of designing BIST circuits and optimize the BIST circuits for mixed-signal circuit cards. A demonstration board is currently under development to evaluate the usability of this tool. The paper focuses on the overall theory and application of the tool, and also describes how if interfaces to the larger tool set we have developed. This larger tool set includes tools to help the designer define the level of built-in test required to meet the system maintainability goals.","PeriodicalId":367253,"journal":{"name":"1998 IEEE AUTOTESTCON Proceedings. IEEE Systems Readiness Technology Conference. Test Technology for the 21st Century (Cat. No.98CH36179)","volume":"44 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1998-08-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121333031","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Reducing the cost of test through reuse","authors":"D.D. Lonngren","doi":"10.1109/AUTEST.1998.713419","DOIUrl":"https://doi.org/10.1109/AUTEST.1998.713419","url":null,"abstract":"As the length of time between design and production decreases, the demand for timely and cost effective testing increases. One way to reduce the cost of test development is through the reuse of applications and components. This approach includes designing and implementing reusable components as well as leveraging off of existing tools and utilities. This paper describes a set of test applications that were designed for reuse and that, in turn, facilitate the creation of reusable components. These applications provide a common set of runtime services to a test system. In addition, their open architecture supports variety of test development environments and integration with third party or custom utilities. Descriptions of the applications are augmented by design discussions and implementation details.","PeriodicalId":367253,"journal":{"name":"1998 IEEE AUTOTESTCON Proceedings. IEEE Systems Readiness Technology Conference. Test Technology for the 21st Century (Cat. No.98CH36179)","volume":"48 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1998-08-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127680532","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"VXI plug'n pray","authors":"M. Gooding","doi":"10.1109/AUTEST.1998.713483","DOIUrl":"https://doi.org/10.1109/AUTEST.1998.713483","url":null,"abstract":"VXI has grown substantially in applications from testing in the lab to field support of weapon systems. While the hardware interfaces have been well defined for some time, the software is still struggling. Industry hype infers that integrating VXI resources is just a \"plug and play\" affair that anyone should be able to do. This paper explores some of the pitfalls of integrating VXI resources from different (and sometimes the same) suppliers that make this more of a challenge than you might think.","PeriodicalId":367253,"journal":{"name":"1998 IEEE AUTOTESTCON Proceedings. IEEE Systems Readiness Technology Conference. Test Technology for the 21st Century (Cat. No.98CH36179)","volume":"5 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1998-08-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134075423","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"VXI-based data acquisition system allows re-use of application software [in aircraft engine testing]","authors":"R. Cleary, M.P. Zayac","doi":"10.1109/AUTEST.1998.713482","DOIUrl":"https://doi.org/10.1109/AUTEST.1998.713482","url":null,"abstract":"This paper describes a data acquisition system that was developed to allow a major jet aircraft engine manufacturer to move to VXI-based data acquisition systems for their engine development test cells while preserving the hundreds of man-years of application software that they had developed over a long period of time. In order to meet their requirements, a system was developed based upon the VXIbus open standard. A combination of hardware and software in the data subsystem emulates the original data front-end and allows the \"drop-in\" replacement of the existing system. This approach is not limited to aircraft engine testing. It can be applied in other industries to preserve existing application software.","PeriodicalId":367253,"journal":{"name":"1998 IEEE AUTOTESTCON Proceedings. IEEE Systems Readiness Technology Conference. Test Technology for the 21st Century (Cat. No.98CH36179)","volume":"386 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1998-08-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132174412","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}