{"title":"Spectrum sensing for cognitive radio based on flexible RF filtering","authors":"J. Dabrowski, Fahad Qazi","doi":"10.1109/ICSES.2016.7593865","DOIUrl":"https://doi.org/10.1109/ICSES.2016.7593865","url":null,"abstract":"In this paper we investigate a spectrum sensing technique suitable for cognitive radio (CR) considered a means to mitigate congestion in the future multiple access communication systems. The ultimate objective is opportunistic use of unoccupied frequency bands called spectrum holes or white spaces, which belong to another system. For this purpose, first, we identify the spectrum sensor (SS) nonlinearities and scan the available spectrum in wideband mode where the primary task is to identify strong interference. Next, by a complementary analysis we pick up channels which are likely to be spectrum holes. In the second stage the SS is tuned to a selected sub-band by making use of a built-in flexible RF filter which largely attenuates interference and the related intermodulation distortions (IMD). The scan process carried out in this stage is aimed at detection of a vacant channel, i.e. containing only noise that must be distinguished from a possible weak signal that usually requires a significant computation overhead, but as the scan is narrowband and the S/N ratio can be high, the related overhead is largely reduced compared to the wideband sensing approach. The strength of this technique is in the flexible RF filter eliminating IMD which typically tend to obscure the spectrum holes.","PeriodicalId":360432,"journal":{"name":"2016 International Conference on Signals and Electronic Systems (ICSES)","volume":"6 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131486028","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
N. Prokopenko, N. Butyrlagin, A. Bugakova, I. Pakhomov
{"title":"The multifunctional programmable multiplexer of potential signals of sensors","authors":"N. Prokopenko, N. Butyrlagin, A. Bugakova, I. Pakhomov","doi":"10.1109/ICSES.2016.7593863","DOIUrl":"https://doi.org/10.1109/ICSES.2016.7593863","url":null,"abstract":"The article suggests an architecture of the analog signals multiplexer (AM), realized on the base of multichannel differential difference op amp (DDA) with N (N=2, 3...) input deferential stages (DSs). Each of DSs is transferred to the working conditions or to the current saving mode by the digital signal from the corresponding RS-trigger. The state pre-setting of AM RS-triggers determines the main operating conditions of the multiplexer. The considered AM is a programmable multifunctional analog-digital processor. It provides multiplexing of the input differential voltages; noninverting multiplexing of the input nondifferential voltages; inverting multiplexing of the input nondifferential voltages; multiplexing of the input differential and nondifferential signals; algebraic summation of the chosen differential and nondifferential signals. The above-mentioned operating conditions of AM are formed due to the state pre-setting of the corresponding RS-triggers (or other memory elements), determining the operating conditions of the differential stages of DDAs. The results of computer simulation of AM are given in the mode of analog signal adder.","PeriodicalId":360432,"journal":{"name":"2016 International Conference on Signals and Electronic Systems (ICSES)","volume":"275 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133865209","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"FPGA-based two-processor CPU for PLC","authors":"M. Chmiel, Wojciech Kloska, D. Polok, J. Mocha","doi":"10.1109/ICSES.2016.7593860","DOIUrl":"https://doi.org/10.1109/ICSES.2016.7593860","url":null,"abstract":"The paper reveals a two-processor Central Processing Unit (CPU) designed for Programmable Logic Controllers (PLC). The CPU is made up of a 1-bit (bit-type) processor and a 32-bit (word-type) processor. The both processors are operated totally independently from one another and information between them is exchanged via a exchange memory module. The 1-bit processor collaborates with edge detectors whilst the 32-bit processor is dedicated for implementation of timers and counters as well as enables execution of arithmetic operations on 32-bit integers and floating point variables. The both processors have been developed as specialized structures capable of executing control routines developed in the Instruction List (IL) programming language in line with requirements of the EN 61131-3 standard. The study presents a new approach to development of the exchange memory module and edge detectors as well as implementation of timers and counters. It is the approach that combines both software and hardware solutions, which makes them more efficient in terms of time performance as compared to already known solutions. Finally the CPU was designed with use of the hardware description language and then implemented in FPGA resources. This paper discloses results of the synthesis and execution times achieved for both individual instructions and benchmarks routines running on the newly designed CPU. The accomplished results make it possible to conclude that the CPU can be considered as an alternative solution to other units available from the market whilst the capability to execute algorithms developed in strict conformity to EN 61131-3 standard is its advantage.","PeriodicalId":360432,"journal":{"name":"2016 International Conference on Signals and Electronic Systems (ICSES)","volume":"2007 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123770687","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
P. Sniatala, A. Handkiewicz, J. Goes, N. Paulino, J. Oliveira
{"title":"Fully differential sigma-delta modulator structure for current-mode sensors","authors":"P. Sniatala, A. Handkiewicz, J. Goes, N. Paulino, J. Oliveira","doi":"10.1109/ICSES.2016.7593816","DOIUrl":"https://doi.org/10.1109/ICSES.2016.7593816","url":null,"abstract":"Many emerging systems, such as smart sensor interfaces for cyber-physical systems (CpS), require energy efficient analog-to-digital converters (ADCs). Low-order, continuous-time (CT), current-mode (CM) sigma-delta modulators (SDMs) can be an attractive solution due to their intrinsic ability to operate with ultra-low voltage signal swings, without requiring any voltage-mode amplifiers, whilst providing significant energy savings. A first-order, continuous-time, current-mode Sigma-Delta modulator (SDM) with high energy efficiency is proposed. The SDM, designed in a 65 nm CMOS technology.","PeriodicalId":360432,"journal":{"name":"2016 International Conference on Signals and Electronic Systems (ICSES)","volume":"116 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124844924","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"A new idea of effective cooling of integrated circuits","authors":"A. Samake, Piotr Kocanda, A. Kos","doi":"10.1109/ICSES.2016.7593847","DOIUrl":"https://doi.org/10.1109/ICSES.2016.7593847","url":null,"abstract":"The purpose of this paper is the thermal analysis of the structure consisting of integrated circuit, heat sink, additional temperature sensor and active fan in which the power dissipation is used as the control parameter to get both maximum throughput of a microprocessor and energy saving. It focuses on adjustment of convection coefficient (in other word adjustment of fan rotation speed) at heat sink level with respect to the amount of power dissipated by the chip and environmental circumstances. The duality between electrical and thermal parameters enables to model the RC thermal network of the structure. Therefore, the dynamic thermal behaviour of the integrated system is investigated by utilizing the RC compact model, which is implemented in Spice environment. The simulation result indicates the case of short temperature peak whenever the power dissipation changes. The benefit of this approach is the rapid removal of internal chip energy accumulation due to the adjustment of fan speed. Consequently the cooling system's energy consumption can be minimized, what enhances reliability and efficiency of integrated circuit.","PeriodicalId":360432,"journal":{"name":"2016 International Conference on Signals and Electronic Systems (ICSES)","volume":"2 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130350838","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
N. Prokopenko, I. Pakhomov, A. Bugakova, N. Butyrlagin
{"title":"Zero level of BiJFet-differential difference operational amplifiers and methods of its decrease in conditions of low temperatures and radiation effect","authors":"N. Prokopenko, I. Pakhomov, A. Bugakova, N. Butyrlagin","doi":"10.1109/ICSES.2016.7593836","DOIUrl":"https://doi.org/10.1109/ICSES.2016.7593836","url":null,"abstract":"The article suggests an evaluation method of offset voltage of BiJFet differential difference operational amplifiers (DDAs), based on the theory of autonomous multiport circuit. The static error of DDA, connected with the offset voltage (Vio), can be presented by the current autonomous parameter Ip connected with the highimpedance node, entered into its classical equivalent circuit. The parameter Ip is determined by the DDA circuitry and ideally it must have zero value. The conditions for the synthesis of the main functional nodes of DDA are obtained, whereby Vio≈0 is provided in the range of low temperatures and radiation effect. An example of construction of BiJFet-DDA with small Vio and its drift is given.","PeriodicalId":360432,"journal":{"name":"2016 International Conference on Signals and Electronic Systems (ICSES)","volume":"20 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130203613","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Cancellation of common-mode output signal in Class-BD audio amplifiers","authors":"J. Jasielski, W. Kołodziejski, S. Kuta","doi":"10.1109/ICSES.2016.7593844","DOIUrl":"https://doi.org/10.1109/ICSES.2016.7593844","url":null,"abstract":"In the paper new topologies of the Class-BD amplifiers with Common-Mode (CM) free outputs have been presented. They are composed of the typical H-bridge output stage with four MOSFETs controlled by the optimal NBDD PWM signals and two additional switches separating the H-bridge from the power supply during the time intervals in which either high-side or low-side MOSFETs of the H-bridge are closed at the same time. The proposed amplifiers have been compared to the Class-BD configuration using the optimal NBDD modulation with respect to audio performance of the differential and CM outputs. Experimental models of the presented in the paper Class-BD audio amplifiers have been realized using digital audio MOSFETs IRF6775MTRPbF, single-output gate drivers with self-boost charge pump bias supply and with capacitor-based signal isolation for floating single-output gate drivers. Intensive SPICE simulations of the real output stage circuits of the proposed Class-BD amplifiers have pointed out that proposed new configurations have similar audio performance as the prototype using optimal NBDD modulation, besides keep the CM outputs constant, thereby removing a major contributor to radiated emissions.","PeriodicalId":360432,"journal":{"name":"2016 International Conference on Signals and Electronic Systems (ICSES)","volume":"99 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125018962","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Design of the mutually cancelling narrow passband and stopband filters — A case study","authors":"P. Korohoda, R. Rumian","doi":"10.1109/ICSES.2016.7593820","DOIUrl":"https://doi.org/10.1109/ICSES.2016.7593820","url":null,"abstract":"Design of narrowband digital filters taking into account time-frequency properties of input signals and the requirements of real-time application which sets heavy constrains for their dynamic characteristics is not easy task in practice. This article presents design and detailed analysis of the complementary pairs of notch-peak filters used in case of audio signals.","PeriodicalId":360432,"journal":{"name":"2016 International Conference on Signals and Electronic Systems (ICSES)","volume":"128 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132470283","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Wavelet detectors for extraction of characteristic features of induction motor rotor faults","authors":"M. Zajac, M. Sułowicz","doi":"10.1109/ICSES.2016.7593853","DOIUrl":"https://doi.org/10.1109/ICSES.2016.7593853","url":null,"abstract":"The paper describes the issue of the generation of low bandwidth detection wavelet filters for the purpose of induction machines diagnostics. The solution for this problem should be characterized by good resolution both in frequency and in time domain - this is because sudden and very short lasting load changes or sudden changes of control signals dictated by technology demands, cause effects in currents, voltages, vibrations of others diagnostic signal of damage machines which are of short duration. In the time domain, these effects are similar to the effects of variations of machine parameters or variation of supply system parameters which impede or even prevent an the assessment of the machine's condition. In the frequency domain, a non-stationary signal from the machine or the inverter's transient state usually becomes fuzzy in the spectrum. The approach proposed by the authors is based on time-frequency analysis of signals with non-parametric analysis of the faults' identification. Wavelet decomposition has been used, with mother wavelet active generation and choosing the optimal level of decomposition. It has been proven that a proper selection of mother wavelet for a particular signal corresponding to a specific machine's fault increases the effectiveness of fault detection. Inappropriate choice of a mother wavelet and decomposition level results in fuzzification of the spectrum or can cause its nonlinear deformation, which impedes or even prevents achieving a proper diagnosis.","PeriodicalId":360432,"journal":{"name":"2016 International Conference on Signals and Electronic Systems (ICSES)","volume":"14 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122202460","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
J. Kołodziej, J. Stepien, R. Golanski, W. Machowski, J. Godek
{"title":"Recovery synchronization in ANS-DM demodulator","authors":"J. Kołodziej, J. Stepien, R. Golanski, W. Machowski, J. Godek","doi":"10.1109/ICSES.2016.7593823","DOIUrl":"https://doi.org/10.1109/ICSES.2016.7593823","url":null,"abstract":"Adaptive Non-uniform Sampling Delta Modulation (ANS-DM) is one of the waveform coding techniques, where a sampling instant and a quantization step size are adopted. The ANS-DM modulator produces an output binary stream, that caries information about signal and includes necessary information of coder parameters (sampling instant and quantization step). In demodulator this values have to be recovered for proper signal reconstruction. To date, no systematic investigation that considered signal decoding of the delta systems with sampling instant and step size adaptation were extensively analyzed. In the paper the analytical analysis of a parasitic signal oscillations in the reconstructed signal, as a consequence of the recovery synchronization process in ANS-DM demodulator, have been discussed. Drowned conclusions allow improving the quality of received signal transmitted over ANS-DM system in presence of noises in transmission channels.","PeriodicalId":360432,"journal":{"name":"2016 International Conference on Signals and Electronic Systems (ICSES)","volume":"65 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123920037","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}