{"title":"MBMW-201: The next generation multi-beam mask writer (Conference Presentation) (Withdrawal Notice)","authors":"C. Klein, H. Loeschner, E. Platzgummer","doi":"10.1117/12.2516033","DOIUrl":"https://doi.org/10.1117/12.2516033","url":null,"abstract":"Publisher’s Note: This video, originally published on 16 August 2019, was withdrawn per author request.","PeriodicalId":360316,"journal":{"name":"Novel Patterning Technologies for Semiconductors, MEMS/NEMS, and MOEMS 2019","volume":"35 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-12-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126478397","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Neuromorphic computing and directed self-assembly: a new pairing for old technologies (Conference Presentation)","authors":"B. Hoskins, J. McClelland","doi":"10.1117/12.2515168","DOIUrl":"https://doi.org/10.1117/12.2515168","url":null,"abstract":"","PeriodicalId":360316,"journal":{"name":"Novel Patterning Technologies for Semiconductors, MEMS/NEMS, and MOEMS 2019","volume":"29 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-08-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127231999","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"How Carbon’s digital light synthesis is enabling digital manufacturing of polymeric products (Conference Presentation)","authors":"Matthew S. Menyo","doi":"10.1117/12.2518189","DOIUrl":"https://doi.org/10.1117/12.2518189","url":null,"abstract":"","PeriodicalId":360316,"journal":{"name":"Novel Patterning Technologies for Semiconductors, MEMS/NEMS, and MOEMS 2019","volume":"113 1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-08-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122372667","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
H. Tsai, S. Ambrogio, P. Narayanan, R. Shelby, C. Mackin, G. Burr
{"title":"Analog memory-based techniques for accelerating the training of fully-connected deep neural networks (Conference Presentation)","authors":"H. Tsai, S. Ambrogio, P. Narayanan, R. Shelby, C. Mackin, G. Burr","doi":"10.1117/12.2515630","DOIUrl":"https://doi.org/10.1117/12.2515630","url":null,"abstract":"Crossbar arrays of resistive non-volatile memories (NVMs) offer a novel and innovative solution for deep learning tasks which are typically implemented on GPUs [1]. The highly parallel structure employed in these architectures enables fast and energy-efficient multiply-accumulate computations, which is the workhorse of most deep learning algorithms. More specifically, we are developing analog hardware platforms for acceleration of large Fully Connected (FC) Deep Neural Networks (DNNs) [1,2], where training is performed using the backpropagation algorithm. This algorithm is a supervised form of learning based on three steps: forward propagation of input data through the network (a.k.a. forward inference), comparison of the inference results with ground truth labels and backpropagation of the errors from the output to the input layer, and then in-situ weight updates. This type of supervised training has been shown to succeed even in the presence of a substantial number of faulty NVMs, relaxing yield requirements vis-a-vis conventional memory, where near 100% yield may be required [2]. \u0000We recently surveyed the use of analog memory devices for DNN hardware accelerators based on crossbar array structures and discussed design choices, device and circuit readiness, and the most promising opportunities compared digital accelerators [3]. In this presentation, we will focus on our implementation of an analog memory cell based on Phase-Change Memory (PCM) and 3-Transistor 1-Capacitor (3T1C) [4]. Software-equivalent accuracy on various datasets (MNIST, MNIST with noise, CIFAR-10, CIFAR-100) was achieved in a mixed software-hardware demonstration with DNN weights stored in real PCM device arrays as analog conductances. We will discuss how limitations from real-world non-volatile memory (NVM), such as conductance linearity and variability affects DNN training and how using two pairs of analog weights with varying significance relaxes device requirements [5, 6, 7]. Finally, we summarize all pieces needed to build an analog accelerator chip [8] and how lithography plays a role in future development of novel NVM devices.\u0000\u0000References:\u0000[1] G. W. Burr et al., “Experimental demonstration and tolerancing of a large-scale neural network (165,000 synapses), using phase-change memory as the synaptic weight element” IEDM Tech. Digest, 29.5 (2014). \u0000[2] G. W. Burr et al., “Experimental demonstration and tolerancing of a large-scale neural network (165,000 synapses) using phase-change memory as the synaptic weight element”, IEEE Trans. Elec. Dev, 62(11), pp. 3498 (2015).\u0000[3] H. Tsai et al., “Recent progress in analog memory-based accelerators for deep learning”, Journal of Physics D: Applied Physics, 51 (28), 283001 (2018)\u0000[4] S. Ambrogio et al., “Equivalent-Accuracy Accelerated Neural Network Training using Analog Memory”, Nature, 558 (7708), 60 (2018).\u0000[5] T. Gokmen et al., “Acceleration of deep neural network training with resistive cross-point devices: design considera","PeriodicalId":360316,"journal":{"name":"Novel Patterning Technologies for Semiconductors, MEMS/NEMS, and MOEMS 2019","volume":"40 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-08-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125395861","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
R. Tiron, M. Marmiesse, G. Thomas, H. Teyssèdre, X. Baillin
{"title":"Sub 10nm patterning using DNA origami (Conference Presentation)","authors":"R. Tiron, M. Marmiesse, G. Thomas, H. Teyssèdre, X. Baillin","doi":"10.1117/12.2515811","DOIUrl":"https://doi.org/10.1117/12.2515811","url":null,"abstract":"Patterning surface with structural DNA origami mask presents a major interest for nanolithography due to its modularity and high ability to achieve a high resolution with 3-5 nm.\u0000In this paper, we demonstrate a sub-ten-nanometer lithography process using anhydrous HF vapor into a SiO2 substrate (figure 1). After optimizing rinsing conditions on SiO2 substrate and HF etching process, we reach a high density (<20 nm pitch) and high resolution (~10 nm CD) patterned surface with a fast etching rate of 0.2 nm.s-1. The resulting SiO2 patterns are used as hard mask in HBr/O2 plasma of Si substrate. Origami pattern features are conserved: lateral dimensions, morphology and structure. For the first time, we developed a high resolution (~10 nm) and high contrast (~65 nm) transfer of patterns into Si substrate. \u0000We will highlight the challenges brought by this new technology and demonstrate the feasibility to control this patterning technique. AFM technique has been previously tested to confirm the pattern fidelity. Using all the available imaging capabilities on the CDSEM, we will establish the best method for each layer to achieve the precision required for the targeted nodes of this technology.\u0000Beyond the resolution capabilities, the precise placement of the DNA pattern on the substrate is investigated. Based on a pre-patterning step using the nanoimprint technology, the affinity of the DNA with respect to the substrate is locally modified and its influence is analyzed. \u0000Thus, DNA origami appears like a promising approach for emerging and engineering of hard mask for patterning.","PeriodicalId":360316,"journal":{"name":"Novel Patterning Technologies for Semiconductors, MEMS/NEMS, and MOEMS 2019","volume":"24 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-08-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128578375","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
M. Wieland, J. Pradelles, S. Landis, L. Pain, G. Rademaker, I. Servin, Guido De Boer, P. Brandt, R. Jager, S. Steenbrink
{"title":"Performance validation of Mapper’s FLX-1200 (Conference Presentation)","authors":"M. Wieland, J. Pradelles, S. Landis, L. Pain, G. Rademaker, I. Servin, Guido De Boer, P. Brandt, R. Jager, S. Steenbrink","doi":"10.1117/12.2514920","DOIUrl":"https://doi.org/10.1117/12.2514920","url":null,"abstract":"Mapper has installed its first product, the FLX–1200, at CEA-Leti in Grenoble (France). This is a maskless lithography system, based on massively parallel electron-beam writing with high-speed optical data transport for switching the electron beams. The FLX-1200, containing 65,000 parallel electron beams, has a 1 wph throughput at 300 mm wafers and is capable of patterning any resolution and any different type of structure all the way down to 28 nm node patterns. The system has an optical alignment system enabling mix-and-match with optical 193 nm immersion system using standard NVSM marks. Mapper Lithography and CEA-Leti are collaborating to develop turnkey solution for specific applications.\u0000\u0000In figure 1 the basic operation principle of the Mapper technology is shown. The electron optics have no central crossovers making them intrinsically insensitive to Coulomb forces (electron repulsion). The electron optics are modular and much cheaper than high-NA DUV optics, and can be replaced or upgraded in the field. The wafer exposure happens one column of fields at a time and always in the same direction. There is no need to meander. The focus and leveling is performed during stage fly-back to reduce metrology overhead. Each column of fields is aligned separately, with dedicated alignment targets.\u0000 \u0000Figure 1, Basic operation of the Mapper technology.\u0000In figure 2 the way the beams are distributed over the electron optics slit is shown. The writing strategy is as follows: \u0000- There are up to 5 slits, staggered in X direction for reasons of wafer coverage. The approach is roughly analogous to an inkjet printer\u0000- Each slit area consists of 204 x 13 individual groups of beamlets, organized in a hexagonal array.\u0000- All beamlets are simultaneously horizontally deflected over a range of 2µm while the wafer is scanned vertically. \u0000- Each group comprises 49 individual beamlets (7x7). Each of the 49 beamlets can independently be switched on and off during exposure. \u0000- Each beamlet results in a Gaussian spot on the wafer with 25 nm FW50 diameter (10.6nm 1).\u0000- Total beamlet count will therefore equal 5 x 204x13 x 49 = 649,740. In the FLX-1200 and FLX-1300 the central 10% are used (one half slit area): 65,000 \u0000A more detailed description of the principles of operation is given in [2].\u0000 \u0000Figure 2,Distribution of the beams over the electron optics slit.\u0000The focus of presentation will be the reporting of the performance achieved of the tool installed at CEA-Leti during endurance runs in full tool configuration. This includes status of:\u0000- Exposure throughput\u0000- Achieved resolution and CD uniformity\u0000- Stitching performance\u0000- Matched Machine Overlay\u0000- Tool availability and uptime\u0000Also the different application areas for such a maskless system are discussed.\u0000\u0000In figure 3 a preview of a CD uniformity measurement result is shown. On a 300 mm wafer fields of 5mm x 5mm have been exposed containing 60nm dense lines and spaces. The main source of CD variation is caused by differe","PeriodicalId":360316,"journal":{"name":"Novel Patterning Technologies for Semiconductors, MEMS/NEMS, and MOEMS 2019","volume":"78 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-08-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122889343","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Single digit nanofabrication for photonics at nanoscale (Conference Presentation)","authors":"S. Cabrini","doi":"10.1117/12.2517931","DOIUrl":"https://doi.org/10.1117/12.2517931","url":null,"abstract":"","PeriodicalId":360316,"journal":{"name":"Novel Patterning Technologies for Semiconductors, MEMS/NEMS, and MOEMS 2019","volume":"5 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-08-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128042737","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Integration of metasurfaces onto micro electro mechanical systems for active control of visible and IR light (Conference Presentation)","authors":"D. López","doi":"10.1117/12.2300298","DOIUrl":"https://doi.org/10.1117/12.2300298","url":null,"abstract":"The design and implementation of flat optical photonic devices have come to the forefront of ongoing scientific research and technology development. These novel photonic devices use sub-wavelength metal or dielectric resonators spaced on a specific two-dimensional pattern that mimic the phase profile of conventional bulk optical elements. However, most of these structures, known as “metasurfaces”, have so far been passive with its optical performance determined only by the spatial configuration of the metasurface constitutive elements. The development of dynamic metasurfaces is currently a growing area of research directed to obtain real-time tunable operation of metasurfaces and new physical phenomena not feasible with static metasurfaces.\u0000In this presentation, I will describe the fundamentals and advantages of incorporating metallic and dielectric metasurfaces onto MEMS devices. The MEMS platform enables electrostatic control of curvature, tilt angle and deformation of metasurfaces, enabling flat and agile optical elements with msec reconfiguration time. Faster reconfigurable metasurfaces can be achieved using MEMS based spatial light modulators in which individual pixels are patterned with nanostructures having different optical response, e.g. we could pre program fixed phase shifts onto each pixel, so the device works as a curved mirror with aberration correction on top. By actuating specific sub-set of pixels, the far-field response of the adaptive metasurfaces can be manipulated. These unique dynamic metasurfaces may provide new opportunities for information optics and imaging by performing complex signal processing directly in the optical domain.","PeriodicalId":360316,"journal":{"name":"Novel Patterning Technologies for Semiconductors, MEMS/NEMS, and MOEMS 2019","volume":"36 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-03-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124675425","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}