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2009 15th IEEE Pacific Rim International Symposium on Dependable Computing最新文献

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Flip-Flop Selection for Transition Test Pattern Reduction Using Partial Enhanced Scan 部分增强扫描转换测试模式还原的触发器选择
2009 15th IEEE Pacific Rim International Symposium on Dependable Computing Pub Date : 2009-11-16 DOI: 10.1109/PRDC.2009.20
Songwei Pei, Huawei Li, Xiaowei Li
{"title":"Flip-Flop Selection for Transition Test Pattern Reduction Using Partial Enhanced Scan","authors":"Songwei Pei, Huawei Li, Xiaowei Li","doi":"10.1109/PRDC.2009.20","DOIUrl":"https://doi.org/10.1109/PRDC.2009.20","url":null,"abstract":"Enhanced scan delay testing approach can achieve high transition delay fault coverage by a small size of test pattern set but with significant hardware overhead. Although the implementation cost of launch on capture (LOC) approach is relatively low, the generated pattern set for testing delay faults is typically very large. In this paper, we present a novel flip-flop selection method to combine the respective advantages of the two approaches, by replacing a small number of selected regular scan cells with enhanced scan cells, thus to reduce the overall volume of transition delay test patterns effectively. Moreover, higher fault coverage can also be obtained by this approach compared to the standard LOC approach. Experimental results on larger ISCAS-89 and ITC-99 benchmark circuits using a commercial test generation tool show that the volume of test patterns can be reduced by over 70% and the transition delay fault coverage can be improved by up to 8.7%.","PeriodicalId":356141,"journal":{"name":"2009 15th IEEE Pacific Rim International Symposium on Dependable Computing","volume":"105 2","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-11-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114025449","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
A Novel Generation Algorithm of Pair-Wise Testing Cases 一种新的成对测试用例生成算法
2009 15th IEEE Pacific Rim International Symposium on Dependable Computing Pub Date : 2009-11-16 DOI: 10.1109/PRDC.2009.16
Jianhua Gao, Yuefeng Hu
{"title":"A Novel Generation Algorithm of Pair-Wise Testing Cases","authors":"Jianhua Gao, Yuefeng Hu","doi":"10.1109/PRDC.2009.16","DOIUrl":"https://doi.org/10.1109/PRDC.2009.16","url":null,"abstract":"Pair-wise testing is a practical and effective method which has already been used in the software testing. Extensive research has been made on the generation of pair-wise testing. In order to make it easy to analyze the current generation methods, we propose a method to ease the process. That is we transform the problem of pair-wise testing to a graphic one. The IPO algorithm is based on parameters and can ensure the optimization of test cases in each expansion. Though it has many advantages, it is still not sustainable enough because of its flexibility. We studied the three elements which affect its sustainability. The three elements are the horizontal growth of pair-wise testing, the combination of pair-wise testing cases and the extension sequence of the parameters to be extended. Thus we propose a HIPO algorithm based on IPO algorithm to solve those problems. The HIPO algorithm inherits the merits of high extension of IPO algorithm and introduces a new concept of contribution extent. It adopts the methods of preferential sequence as well as minimization algorithm to optimize the problems above. We develop the test case generation tool based on the HIPO algorithm by means of .Net technology. And we also prove its effectiveness in our experiment.","PeriodicalId":356141,"journal":{"name":"2009 15th IEEE Pacific Rim International Symposium on Dependable Computing","volume":"283 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-11-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116399700","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Quantitative Analysis of Long-Latency Failures in System Software 系统软件中长延迟故障的定量分析
2009 15th IEEE Pacific Rim International Symposium on Dependable Computing Pub Date : 2009-11-16 DOI: 10.1109/PRDC.2009.13
Keun Soo YIM, Z. Kalbarczyk, R. Iyer
{"title":"Quantitative Analysis of Long-Latency Failures in System Software","authors":"Keun Soo YIM, Z. Kalbarczyk, R. Iyer","doi":"10.1109/PRDC.2009.13","DOIUrl":"https://doi.org/10.1109/PRDC.2009.13","url":null,"abstract":"This paper presents a study on long latency failures using accelerated fault injection. The data collected from the experiments are used to analyze the significance, causes, and characteristics of long latency failures caused by soft errors in the processor and the memory. The results indicate that a non-negligible portion of soft errors in the code and data memory lead to long latency failures. The long latency failures are caused by errors with long fault activation times and errors causing failures only under certain runtime conditions. On the other hand, less than 0.5% of soft errors in the processor registers used in kernel mode lead to a failure with latency longer than a thousand seconds. This is due to a strong temporal locality of the register values. The study shows also that the obtained insight can be used to guide design and placement (in the application code and/or system) of application-specific error detectors.","PeriodicalId":356141,"journal":{"name":"2009 15th IEEE Pacific Rim International Symposium on Dependable Computing","volume":"75 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-11-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131142391","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 12
A Reliable Non-volatile Memory System: Exploiting File-System Characteristics 可靠的非易失性存储系统:利用文件系统特性
2009 15th IEEE Pacific Rim International Symposium on Dependable Computing Pub Date : 2009-11-16 DOI: 10.1109/PRDC.2009.40
Chin-Hsien Wu, Wen-Yen Chang, Zeng-Wei Hong
{"title":"A Reliable Non-volatile Memory System: Exploiting File-System Characteristics","authors":"Chin-Hsien Wu, Wen-Yen Chang, Zeng-Wei Hong","doi":"10.1109/PRDC.2009.40","DOIUrl":"https://doi.org/10.1109/PRDC.2009.40","url":null,"abstract":"Flash memory has become a popular non-volatile memory technology and is widely used in mobile electronics devices and consumer applications. A flash-memory device is different from typical hard-disk devices and requires sophisticated management to improve the lifetime and the performance. As a result, when a file system is executed on these flash-memory devices, the endurance problem will be an important issue. This is because flash memory could suffer from access errors due to unevenly erase operations on specific locations. In this paper, we will propose a reliable non-volatile memory system by exploiting file-system characteristics. The proposed method can help quick identification of hot and cold files and evenly distribute erase operations over flash-memory devices.When compared to other methods, the proposed method can provide reliable endurance and a more practical solution according to the experimental results.","PeriodicalId":356141,"journal":{"name":"2009 15th IEEE Pacific Rim International Symposium on Dependable Computing","volume":"3 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-11-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129453002","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 5
Fault Injection Scheme for Embedded Systems at Machine Code Level and Verification 嵌入式系统的机器码级故障注入方案及验证
2009 15th IEEE Pacific Rim International Symposium on Dependable Computing Pub Date : 2009-11-16 DOI: 10.1109/PRDC.2009.68
Ang Jin, Jianhui Jiang
{"title":"Fault Injection Scheme for Embedded Systems at Machine Code Level and Verification","authors":"Ang Jin, Jianhui Jiang","doi":"10.1109/PRDC.2009.68","DOIUrl":"https://doi.org/10.1109/PRDC.2009.68","url":null,"abstract":"In order to evaluate software from the third party whose source codes are not available, after a careful analysis of the statistic data sorted by Orthogonal Defect Classification, and the corresponding relation between patterns of high level language programs and machine codes, we propose a fault injection scheme at machine code level suitable respectively to the IA32 ARM and MIPS architecture, which takes advantage of mutating machine code. To prove the feasibility and validity of this scheme, two sets of programs are chosen as our experimental target: Set I consists of two different versions of triangle testing algorithms, and Set II is a subset of the Mibench which is a collection of performance benchmark programs designed for embedded systems; we inject both high level faults into the source code written in C language and the corresponding machine code level faults directly into the executables, and monitor their running on Linux. The results from experiments show that at least 96% of total similarity degree is obtained. Therefore, we conclude that the effect of injecting corresponding faults on both the source code level and machine code level are mostly the same. Therefore, our scheme is rather useful in analyzing system behavior under faults.","PeriodicalId":356141,"journal":{"name":"2009 15th IEEE Pacific Rim International Symposium on Dependable Computing","volume":"123 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-11-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127427764","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 9
A GA-Based Method for High-Quality X-Filling to Reduce Launch Switching Activity in At-speed Scan Testing 一种基于ga的高质量x填充方法，以减少高速扫描测试中的发射切换活动
2009 15th IEEE Pacific Rim International Symposium on Dependable Computing Pub Date : 2009-11-16 DOI: 10.1109/PRDC.2009.21
Yuta Yamato, X. Wen, K. Miyase, H. Furukawa, S. Kajihara
{"title":"A GA-Based Method for High-Quality X-Filling to Reduce Launch Switching Activity in At-speed Scan Testing","authors":"Yuta Yamato, X. Wen, K. Miyase, H. Furukawa, S. Kajihara","doi":"10.1109/PRDC.2009.21","DOIUrl":"https://doi.org/10.1109/PRDC.2009.21","url":null,"abstract":"Power-aware X-filling is a preferable approach to avoiding IR-drop-induced yield loss in at-speed scan testing. However, the quality of previous X-filling methods for reducing launch switching activity may be unsatisfactory, due to low effect (insufficient and global-only reduction) and/or low scalability (long CPU time). This paper addresses this quality problem with a novel, GA (Genetic Algorithm) based X-filling method, called GA-fill. Its goals are (1) to achieve both effectiveness and scalability in a more balanced manner, and (2) to make the reduction effect of launch switching activity more concentrated on critical areas that have higher impact on IR-drop-induced yield loss.Evaluation experiments are being conducted on benchmark and industrial circuits, and initial results have demonstrated the usefulness of GA-fill.","PeriodicalId":356141,"journal":{"name":"2009 15th IEEE Pacific Rim International Symposium on Dependable Computing","volume":"19 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-11-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115139048","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 9
Prioritized Test Generation Strategy for Pair-Wise Testing 成对测试的优先级测试生成策略
2009 15th IEEE Pacific Rim International Symposium on Dependable Computing Pub Date : 2009-11-16 DOI: 10.1109/PRDC.2009.24
Jianhua Gao, Jie Zhu
{"title":"Prioritized Test Generation Strategy for Pair-Wise Testing","authors":"Jianhua Gao, Jie Zhu","doi":"10.1109/PRDC.2009.24","DOIUrl":"https://doi.org/10.1109/PRDC.2009.24","url":null,"abstract":"Pair-wise testing is widely used to detect faults in software systems. In many applications where pair-wise testing is needed, the whole test set can not be run completely due to time or budget constraints. In these situations, it is essential to prioritize the tests. In this paper, we drive weight for each value of each parameter, and adapt UWA algorithm to generate an ordered pair-wise coverage test suite. UWA algorithm is to accord weights set for each value of each parameter of the system, then produce ordered pair-wise coverage test set for having generated but unordered one. Finally, a greedy algorithm is adopted to prioritize generated pair-wise coverage test set with driven weights, so that whenever the testing is interrupted, interactions deemed, most important are tested.","PeriodicalId":356141,"journal":{"name":"2009 15th IEEE Pacific Rim International Symposium on Dependable Computing","volume":"549 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-11-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123129686","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Evaluating the Impact of Irrecoverable Read Errors on Disk Array Reliability 不可恢复读错误对阵列可靠性的影响评估
2009 15th IEEE Pacific Rim International Symposium on Dependable Computing Pub Date : 2009-11-16 DOI: 10.1109/PRDC.2009.66
Jehan-Francois Pâris, A. Amer, D. Long, T. Schwarz
{"title":"Evaluating the Impact of Irrecoverable Read Errors on Disk Array Reliability","authors":"Jehan-Francois Pâris, A. Amer, D. Long, T. Schwarz","doi":"10.1109/PRDC.2009.66","DOIUrl":"https://doi.org/10.1109/PRDC.2009.66","url":null,"abstract":"We investigate the impact of irrecoverable read errors--also known as bad blocks--on the MTTDL of mirrored disks, RAID level 5 arrays and RAID level 6 arrays. Our study is based on the data collected by Bairavasundaram et al. from a population of 1.53 million disks over a period of 32 months. Our study indicates that irrecoverable read errors can reduce the mean time to data loss (MTTDL) of the three arrays by up to 99 percent, effectively canceling most of the benefits of fast disk repairs. It also shows the benefits of frequent scrubbing scans that map out bad blocks thus preventing future irrecoverable read errors. As an example, once-a-month scrubbing scans were found to improve the MTTDL of the three arrays by at least 300 percent compared to once-a-year scrubbing scans.","PeriodicalId":356141,"journal":{"name":"2009 15th IEEE Pacific Rim International Symposium on Dependable Computing","volume":"25 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-11-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128338698","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 11
Performance and Reliability of a Revocation Method Utilizing Encrypted Backup Data 利用加密备份数据的撤销方法的性能和可靠性
2009 15th IEEE Pacific Rim International Symposium on Dependable Computing Pub Date : 2009-11-16 DOI: 10.1109/PRDC.2009.32
Kazuki Takayama, H. Yokota
{"title":"Performance and Reliability of a Revocation Method Utilizing Encrypted Backup Data","authors":"Kazuki Takayama, H. Yokota","doi":"10.1109/PRDC.2009.32","DOIUrl":"https://doi.org/10.1109/PRDC.2009.32","url":null,"abstract":"When multiple users access a network storage system for cloud computing, security becomes a key factor in the service, as well as performance and reliability. The \"encrypt-on-disk'' scheme effectively protects transmitted and stored data in network storage. However, this scheme has the problem of revocation for shared files. Active revocation is safe but has denial periods to allow immediate reencryption, while lazy revocation has no denial period but is unsafe during the delay. We propose intelligent storage nodes capable of handling active revocation in storage without the denial period by adopting a primary--backup configuration. This approach provides a good combination of security and availability by replication. However, the reencryption process negatively affects the update performance. Delaying the reencryption process and disk write on the backup node improves performance with no ill effect on security and a small decrease of MTTDL for the simple primary-backup configuration. We evaluate the performance of the proposed approaches by experiments, and the reliability by estimation.","PeriodicalId":356141,"journal":{"name":"2009 15th IEEE Pacific Rim International Symposium on Dependable Computing","volume":"4 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-11-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132040162","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
String-Wise Information Flow Tracking against Script Injection Attacks 针对脚本注入攻击的字符串明智信息流跟踪
2009 15th IEEE Pacific Rim International Symposium on Dependable Computing Pub Date : 2009-11-16 DOI: 10.1109/PRDC.2009.35
Kunbo Li, Ryota Shioya, M. Goshima, S. Sakai
{"title":"String-Wise Information Flow Tracking against Script Injection Attacks","authors":"Kunbo Li, Ryota Shioya, M. Goshima, S. Sakai","doi":"10.1109/PRDC.2009.35","DOIUrl":"https://doi.org/10.1109/PRDC.2009.35","url":null,"abstract":"Nowadays, security of web applications faces a threat of script injection attacks. DTP (Dynamic Taint Propagation) and DIFT (Dynamic Information Flow Tracking) have been established as powerful techniques to detect script injection attacks. However current DTP/DIFT systems still suffer from tradeoff between false positives and negatives.This paper proposes String-Wise Information Flow Tracking, SWIFT. SWIFT traces memory access of program execution, detects string access and distinguishes string operations from other memory access. Current DTP/DIFT systems propagate taint from source to destination operands. Instead of that, SWIFT propagates taint information under string operations. This makes SWIFT provide a better accuracy on detection of script injection attacks than current DTP/DIFT systems.We implemented SWIFT on an IA-32 emulator Bochs, executed typical string operations and made injection attacks to some real-world web applications with known vulnerabilities. As a result, SWIFT shows a high precision in our security experiments.","PeriodicalId":356141,"journal":{"name":"2009 15th IEEE Pacific Rim International Symposium on Dependable Computing","volume":"90 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-11-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132499445","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
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