2009 15th IEEE Pacific Rim International Symposium on Dependable Computing最新文献

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Dependability Benchmarking Using Software Faults: How to Create Practical and Representative Faultloads 使用软件故障进行可靠性基准测试:如何创建实用且具有代表性的故障负载
2009 15th IEEE Pacific Rim International Symposium on Dependable Computing Pub Date : 2009-11-01 DOI: 10.1109/PRDC.2009.52
Pedro Costa, J. G. Silva, H. Madeira
{"title":"Dependability Benchmarking Using Software Faults: How to Create Practical and Representative Faultloads","authors":"Pedro Costa, J. G. Silva, H. Madeira","doi":"10.1109/PRDC.2009.52","DOIUrl":"https://doi.org/10.1109/PRDC.2009.52","url":null,"abstract":"The faultload is one of the most critical components of a dependability benchmark. It should embody a repeatable, portable, representative and generally accepted fault set. Concerning software faults, the definition of that kind of faultloads is particularly difficult, as it requires a much more complex emulation method than the traditional stuck-at or bit-flip used for hardware faults. Although faultloads based on software faults have already been proposed, the choice of adequate fault injection targets (i.e., actual software components where the faults are injected) is still an open and crucial issue. Furthermore, knowing that the number of possible software faults that can be injected in a given system is potentially very large, the problem of defining a faultload made of a small number of representative faults is of utmost importance. This paper proposes a strategy to guide the fault injection target selection and reduce the number of faults required for the faultload and exemplifies the proposed approach with a real web-server dependability benchmark and a large-scale integer vector sort application.","PeriodicalId":356141,"journal":{"name":"2009 15th IEEE Pacific Rim International Symposium on Dependable Computing","volume":"11 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124631467","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 7
Representing X-Code Using Latin Squares 用拉丁方块表示x码
2009 15th IEEE Pacific Rim International Symposium on Dependable Computing Pub Date : 2009-11-01 DOI: 10.1109/PRDC.2009.36
G. Wang, Sheng Lin, X. Liu, Jing Liu
{"title":"Representing X-Code Using Latin Squares","authors":"G. Wang, Sheng Lin, X. Liu, Jing Liu","doi":"10.1109/PRDC.2009.36","DOIUrl":"https://doi.org/10.1109/PRDC.2009.36","url":null,"abstract":"X-Code is an important 2-erasure correcting vertical array code. In this paper, we present a combinatorial representation for X-Code. It is based on graph representation of binary linear/array codes. We represent X-Code by Cayley tables of the cyclic groups of prime order - a special column-Hamiltonian Latin squares (CHLS). This representation is helpful to comprehend X-Code's 2-erasure correcting ability. We also show the inner relationship between X-Code and the Liberation codes though the former is a vertical code and the latter is a horizontal code. A possible way to construct the 2-erasure vertical codes like X-Code using common CHLS is also proposed.","PeriodicalId":356141,"journal":{"name":"2009 15th IEEE Pacific Rim International Symposium on Dependable Computing","volume":"503 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134032664","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
Reliability & Performance Modeling to Speed-Up the NoC Design 可靠性与性能建模加速NoC设计
2009 15th IEEE Pacific Rim International Symposium on Dependable Computing Pub Date : 2009-11-01 DOI: 10.1109/PRDC.2009.5497860
A. Patooghy, Seyed Miremnadi
{"title":"Reliability & Performance Modeling to Speed-Up the NoC Design","authors":"A. Patooghy, Seyed Miremnadi","doi":"10.1109/PRDC.2009.5497860","DOIUrl":"https://doi.org/10.1109/PRDC.2009.5497860","url":null,"abstract":"Flow-control methods are effective ways to enhance the reliability of Network-on-Chips against transients occurring in deep sub-micron chips. This paper proposes an analytical model to predict the reliability and performance of mesh-based NoCs equipped with flowcontrol methods. In this model, mesh-based NoCs are considered as a network of M/G/1 queues. The iterative solution of the network of queues makes accurate predictions about (1) the probability of correct packet delivery in the presence of bit flip errors and (2) the average packet delivery time of NoCs. To validate the model, the performance predictions are compared with the results extracted from an event-based NoC simulator. Comparisons are done for different traffic generation rates and different error rates. The comparisons show that the proposed model accelerates the evaluation phase of an NoC design by at least three orders of magnitude.","PeriodicalId":356141,"journal":{"name":"2009 15th IEEE Pacific Rim International Symposium on Dependable Computing","volume":"33 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126242811","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 6
Evaluating the Use of Reference Run Models in Fault Injection Analysis 评价参考运行模型在故障注入分析中的应用
2009 15th IEEE Pacific Rim International Symposium on Dependable Computing Pub Date : 2009-07-06 DOI: 10.1109/PRDC.2009.28
Matthew Leeke, A. Jhumka
{"title":"Evaluating the Use of Reference Run Models in Fault Injection Analysis","authors":"Matthew Leeke, A. Jhumka","doi":"10.1109/PRDC.2009.28","DOIUrl":"https://doi.org/10.1109/PRDC.2009.28","url":null,"abstract":"Fault injection (FI) has been shown to be an effective approach to assessing the dependability of software systems. To determine the impact of faults injected during FI, a given oracle is needed. Oracles can take a variety of forms, including (i) specifications, (ii) error detection mechanisms and (iii) golden runs. Focusing on golden runs, in this paper we show that there are classes of software which a golden run based approach can not be used to analyse. Specifically, we demonstrate that a golden run based approach can not be used in the analysis of systems which employ a main control loop with an irregular period. Further, we show how a simple model, which has been refined using FI experiments, can be employed as an oracle in the analysis of such a system.","PeriodicalId":356141,"journal":{"name":"2009 15th IEEE Pacific Rim International Symposium on Dependable Computing","volume":"16 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-07-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128306681","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 16
Availability Modeling and Analysis of a Virtualized System 虚拟化系统的可用性建模与分析
Dong Seong Kim, Jin B. Hong, T. Nguyen, F. Machida, Jong Sou Park, Kishor S. Trivedi
{"title":"Availability Modeling and Analysis of a Virtualized System","authors":"Dong Seong Kim, Jin B. Hong, T. Nguyen, F. Machida, Jong Sou Park, Kishor S. Trivedi","doi":"10.1109/CIT.2016.97","DOIUrl":"https://doi.org/10.1109/CIT.2016.97","url":null,"abstract":"This paper develops an availability model of a virtualized system. We construct non-virtualized and virtualized two hosts system models using a two-level hierarchical approach in which fault trees are used in the upper level and homogeneous continuous time Markov chains (CTMC) are used to represent sub-models in lower level. In the models, we incorporate not only hardware failures (e.g., CPU, memory, power, etc) but also software failures including Virtual Machine Monitor (VMM), Virtual Machine (VM), and application failures. We also incorporate high availability (HA) service and VM live migration in the virtualized system. Metrics we use are system steady state availability, downtime in minutes per year and capacity oriented availability.","PeriodicalId":356141,"journal":{"name":"2009 15th IEEE Pacific Rim International Symposium on Dependable Computing","volume":"132 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116829090","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 186
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