{"title":"AT2-Optimal Galois Field Multiplier for VLSI","authors":"Martin Fürer, K. Mehlhorn","doi":"10.1007/3-540-16766-8_19","DOIUrl":"https://doi.org/10.1007/3-540-16766-8_19","url":null,"abstract":"","PeriodicalId":340382,"journal":{"name":"Aegean Workshop on Computing","volume":"16 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1986-07-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121471079","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Generalized River Routing - Algorithms and Performance Bounds (Extended Abstract)","authors":"J. Blair, E. Lloyd","doi":"10.1007/3-540-16766-8_29","DOIUrl":"https://doi.org/10.1007/3-540-16766-8_29","url":null,"abstract":"","PeriodicalId":340382,"journal":{"name":"Aegean Workshop on Computing","volume":"97 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1986-07-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115803059","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"A High-Performance Single-Chip VLSI Signal Processor Architecture","authors":"N. Kanopoulos, P. Marinos","doi":"10.1007/3-540-16766-8_15","DOIUrl":"https://doi.org/10.1007/3-540-16766-8_15","url":null,"abstract":"","PeriodicalId":340382,"journal":{"name":"Aegean Workshop on Computing","volume":"17 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1986-07-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125659898","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"VLSI Algorithms and Pipelined Architectures for Solving Structured Linear System","authors":"I. Jou, Y. Hu, T. Parng","doi":"10.1007/3-540-16766-8_14","DOIUrl":"https://doi.org/10.1007/3-540-16766-8_14","url":null,"abstract":"","PeriodicalId":340382,"journal":{"name":"Aegean Workshop on Computing","volume":"19 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1986-07-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132778100","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Fast and Efficient Parallel Linear Programming and Linear Least Squares Computations","authors":"V. Pan, J. Reif","doi":"10.1007/3-540-16766-8_26","DOIUrl":"https://doi.org/10.1007/3-540-16766-8_26","url":null,"abstract":"","PeriodicalId":340382,"journal":{"name":"Aegean Workshop on Computing","volume":"48 2 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1986-07-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132655724","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}