{"title":"A High-Performance Single-Chip VLSI Signal Processor Architecture","authors":"N. Kanopoulos, P. Marinos","doi":"10.1007/3-540-16766-8_15","DOIUrl":null,"url":null,"abstract":"","PeriodicalId":340382,"journal":{"name":"Aegean Workshop on Computing","volume":"17 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1986-07-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Aegean Workshop on Computing","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1007/3-540-16766-8_15","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
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