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2007 IEEE Workshop on Microelectronics and Electron Devices最新文献

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Poster Presentation 5 : Image Quality Assessment Error Visibility Using Gradual Modulation Statistics 海报展示5:使用渐变调制统计的图像质量评估误差可见性
2007 IEEE Workshop on Microelectronics and Electron Devices Pub Date : 2007-04-20 DOI: 10.1109/WMED.2007.368066
V. Sukumar, D. Warner, P. Doherty, H. Hess, K. Noren, S. Krone
{"title":"Poster Presentation 5 : Image Quality Assessment Error Visibility Using Gradual Modulation Statistics","authors":"V. Sukumar, D. Warner, P. Doherty, H. Hess, K. Noren, S. Krone","doi":"10.1109/WMED.2007.368066","DOIUrl":"https://doi.org/10.1109/WMED.2007.368066","url":null,"abstract":"Measurement of visual quality if of fundamental importance to design algorithms that can automatically assess the quality of images or videos in a perceptually consistent manner. In this paper we do an extensive subjective study using varying modulation thresholds in an attempt to capture physiological and psychovisual features of a human visual system (HVS).","PeriodicalId":337793,"journal":{"name":"2007 IEEE Workshop on Microelectronics and Electron Devices","volume":"25 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-04-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122853251","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Modeling the stress-induced leakage current origin from antisite defects in MOSFETs mosfet中反位缺陷应力诱发泄漏电流源的建模
2007 IEEE Workshop on Microelectronics and Electron Devices Pub Date : 2007-04-20 DOI: 10.1109/WMED.2007.368050
L. Mao
{"title":"Modeling the stress-induced leakage current origin from antisite defects in MOSFETs","authors":"L. Mao","doi":"10.1109/WMED.2007.368050","DOIUrl":"https://doi.org/10.1109/WMED.2007.368050","url":null,"abstract":"First-principles electronic structure simulations shows that the formation energy of the antisite defects in SiO2 is less than that of oxygen vacancy. On the basis of the analysis of the electronic structure, the defect assisted tunneling was calculated and it results show that such defects could be an origin of the stress-induced leakage current in MOSFETs.","PeriodicalId":337793,"journal":{"name":"2007 IEEE Workshop on Microelectronics and Electron Devices","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-04-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124037695","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Process Variation Study for Silicon Nanowire Transistors 硅纳米线晶体管工艺变化研究
2007 IEEE Workshop on Microelectronics and Electron Devices Pub Date : 2007-04-20 DOI: 10.1109/WMED.2007.368055
S. Mehrotra, K. Roenker
{"title":"Process Variation Study for Silicon Nanowire Transistors","authors":"S. Mehrotra, K. Roenker","doi":"10.1109/WMED.2007.368055","DOIUrl":"https://doi.org/10.1109/WMED.2007.368055","url":null,"abstract":"This paper examines the sensitivity of silicon nanowire transistors to process variations. Silicon nanowire MOSFETs are effective in controlling short channel effects, but at the same time suffer from threshold voltage degradation due to the quantum confinement effect. In this study we have investigated the effects on the device characteristics of process variations due to body thickness, gate length and gate dielectric thickness. The results have been compared with previous results for the FinFET and the differences quantified. The nanowire MOSFET is found to exhibit significantly less short channel effects relative to a comparable FinFET structure, but to have a larger threshold voltage variation with the diameter at a diameter less than 4 nm.","PeriodicalId":337793,"journal":{"name":"2007 IEEE Workshop on Microelectronics and Electron Devices","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-04-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124397940","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 5
Poster Presentation 3 : Metal-Doped Chalcogenide Glasses as Phase-Change Memory Materials 海报展示3:作为相变记忆材料的掺杂金属硫系玻璃
2007 IEEE Workshop on Microelectronics and Electron Devices Pub Date : 2007-04-20 DOI: 10.1109/WMED.2007.368064
Morgan G. Davis, K. Campbell
{"title":"Poster Presentation 3 : Metal-Doped Chalcogenide Glasses as Phase-Change Memory Materials","authors":"Morgan G. Davis, K. Campbell","doi":"10.1109/WMED.2007.368064","DOIUrl":"https://doi.org/10.1109/WMED.2007.368064","url":null,"abstract":"Phase-change memory is one of the most promising candidates for future electronic memory [1]. Phase-change memories define the state of the bit through the resistance of the material in at least two different phases. The most well-known example of a phase-change material under study for electronic memory applications is Ge2Sb2Te5 (GST) [1]. This material is switched between an amorphous state and a crystalline state to a high resistance 'o' state and a low resistance '1' state. Switching between the resistance states of a phase change material is achieved by Joule heating [2] through the application of an electrical current large enough to heat the material and subsequently alter its phase. In some materials, more than one crystalline phase is possible, making these materials candidates for a multi-state memory.","PeriodicalId":337793,"journal":{"name":"2007 IEEE Workshop on Microelectronics and Electron Devices","volume":"44 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-04-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128542617","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Pre-Metal Dielectric Impact on Field Transistor Vt Shift in an 80V Technology 金属前介电对80V技术场晶体管Vt移的影响
2007 IEEE Workshop on Microelectronics and Electron Devices Pub Date : 2007-04-20 DOI: 10.1109/WMED.2007.368053
B. Williams, T. Haskett, B. Sorenson, J. Giraud, T. Corsetti
{"title":"Pre-Metal Dielectric Impact on Field Transistor Vt Shift in an 80V Technology","authors":"B. Williams, T. Haskett, B. Sorenson, J. Giraud, T. Corsetti","doi":"10.1109/WMED.2007.368053","DOIUrl":"https://doi.org/10.1109/WMED.2007.368053","url":null,"abstract":"The I3T80 technology being developed at AMI Semiconductor, Inc. uses lateral extended-drain MOS transistors (DMOS) [1] in a 0.35¿m base technology. The base technology was developed using 3.3V signals on the gate, and the metal field transistor test results did not show a significant threshold voltage (vt) shift. This paper discusses the impact on the parasitic NMOS metal field transistor threshold voltage when a high voltage is applied to the gate over an extended time at an elevated temperature. This Vt shift is shown to vary widely with various pre-metal dielectric stacks.","PeriodicalId":337793,"journal":{"name":"2007 IEEE Workshop on Microelectronics and Electron Devices","volume":"6 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-04-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134358776","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Poster Presentation 4 : The Influence of Deposition Method on the Morphology of Thin Films of TCNQ for Potential Application as Ion-Conducting Memory 海报展示4:沉积方法对离子传导存储器TCNQ薄膜形貌的影响
2007 IEEE Workshop on Microelectronics and Electron Devices Pub Date : 2007-04-20 DOI: 10.1109/WMED.2007.368065
B. Muñoz, K. Campbell
{"title":"Poster Presentation 4 : The Influence of Deposition Method on the Morphology of Thin Films of TCNQ for Potential Application as Ion-Conducting Memory","authors":"B. Muñoz, K. Campbell","doi":"10.1109/WMED.2007.368065","DOIUrl":"https://doi.org/10.1109/WMED.2007.368065","url":null,"abstract":"Metal-organic complexes formed from 7,7,8,8-tetracyanoquinodimethane (TCNQ) and silver or copper show promise for a wide range of electronic technology applications, including non-volatile memory [1-4]. Our research involves preparing two-terminal electronic devices using TCNQ and derivatives of TCNQ, along with silver, in order to develop ion-conducting, resistance-variable memories. We have discovered a significant dependence on the method of deposition of the organic complex on the electrical properties of the device. In this poster, we present SEM images of the TCNQ films deposited via either wet chemical methods or thermal evaporation and discuss the resultant electrical characteristics of these films. In the wet chemical methods employed, TCNQ in various solvents (acetone, acetonitrile, and acetone/acetonitrile), was deposited onto a silver electrode through a spontaneous electrolytic reaction. The oxidation-reduction reaction between the electron acceptor, TCNQ, and the electron donor properties of silver allows for easy growth of the metalorganic complex. Two thermal evaporation methods were used to deposit TCNQ. In the first, TCNQ was evaporated directly onto a silver film. In the second method, TCNQ and silver were co-evaporated in a 1:1 ratio onto a nickel film. For each deposition method, a shadow masking technique was employed to create a twoterminal device. In shadow masking, it is necessary for a small portion of the bottom electrode not be subjected to any depositing materials, so this area is covered during deposition. In addition, when the top electrode is deposited, it must not come into contact with the bottom electrode, but is important for the top electrode to come in contact with the silicon substrate.","PeriodicalId":337793,"journal":{"name":"2007 IEEE Workshop on Microelectronics and Electron Devices","volume":"12 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-04-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121862420","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Modeling the Reliability of Metal-Insulator-Metal Capacitors (MIMC) in Analog Devices 模拟器件中金属绝缘体-金属电容器 (MIMC) 的可靠性建模
2007 IEEE Workshop on Microelectronics and Electron Devices Pub Date : 2007-04-20 DOI: 10.1109/WMED.2007.368838
B. Greenwood, J. Prasad
{"title":"Modeling the Reliability of Metal-Insulator-Metal Capacitors (MIMC) in Analog Devices","authors":"B. Greenwood, J. Prasad","doi":"10.1109/WMED.2007.368838","DOIUrl":"https://doi.org/10.1109/WMED.2007.368838","url":null,"abstract":"Metal-Insulator-Metal (MIM) capacitors are used in many modern analog circuits due to its high capacitance per unit area, low parasitic capacitance and low 1st and 2nd order coefficients [1]. These products require high reliability that is determined by MIMC area, applied voltage and operating temperature. It has been reported [2] that dielectric film thinning is an important mechanism for MIMC breakdown and thus the reliability of the capacitors. In this paper, we will present the modeling results of MIMC reliability in analog circuits. In this study MIMC reliability has been assessed using Vbd distributions to determine parameters for a `dielectric thinning' model. Expected failures over 10-year of life are determined for several products with MIM capacitors. The effectiveness of burn in is evaluated in reducing failures. Design practices to reduce MIMC failures are proposed, such as minimizing application voltage and ensuring stability at V-stress for MIMCs.","PeriodicalId":337793,"journal":{"name":"2007 IEEE Workshop on Microelectronics and Electron Devices","volume":"14 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-04-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131484392","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Study of Digital Video Interface (DVI) Hardware Design In Multimedia System 多媒体系统中数字视频接口(DVI)硬件设计研究
2007 IEEE Workshop on Microelectronics and Electron Devices Pub Date : 2007-04-20 DOI: 10.1109/WMED.2007.368054
B. Xiaoping, Z. Hongwei
{"title":"Study of Digital Video Interface (DVI) Hardware Design In Multimedia System","authors":"B. Xiaoping, Z. Hongwei","doi":"10.1109/WMED.2007.368054","DOIUrl":"https://doi.org/10.1109/WMED.2007.368054","url":null,"abstract":"In multimedia system, some digital display devices often are adopted. At this time if still select conventional analog interface, digital signal from person computer (PC) need be switched twice by D/A and A/D, lost of video signal will emerge, so a kind of new interface, DVI technology often need be studied. Combining with real project, this paper introduces the detailed development methods of Digital Video Interface (DVI) transmitter and receiver in multimedia systems. These include the arranging of the architecture of Digital Video Interface (DVI) transmitter and receiver, the design of encoder and decoder circuit, clock recovery circuits, and etc. in addition selecting and designing of all kinds phase locked loop in hardware system were discussed in detail. These can offer a kind of reference method for developing of Digital Video Interface (DVI) transmitter and receiver video processing hardware in multimedia Systems.","PeriodicalId":337793,"journal":{"name":"2007 IEEE Workshop on Microelectronics and Electron Devices","volume":"19 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-04-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125197254","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Poster Presentation 1 : Low Power Intrusion Detection 海报展示1:低功耗入侵检测
2007 IEEE Workshop on Microelectronics and Electron Devices Pub Date : 2007-04-20 DOI: 10.1109/WMED.2007.368062
P. Ransom, Aaron Erbe, Ben Fox, Joshua Nekl, B. State, Jacob Baker
{"title":"Poster Presentation 1 : Low Power Intrusion Detection","authors":"P. Ransom, Aaron Erbe, Ben Fox, Joshua Nekl, B. State, Jacob Baker","doi":"10.1109/WMED.2007.368062","DOIUrl":"https://doi.org/10.1109/WMED.2007.368062","url":null,"abstract":"A mesh covers critical circuit components to prevent physical access. Intrusion which causes a short or break in the conductors of the mesh is detected using a battery operated sigma delta sensor. Once intrusion is detected, control circuitry will erase sensitive information in memory.","PeriodicalId":337793,"journal":{"name":"2007 IEEE Workshop on Microelectronics and Electron Devices","volume":"35 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-04-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128899809","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
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