{"title":"A Contrast and Motion-Sensitive Silicon Retina","authors":"A. Mhani, G. Bouvier, J. Hérault","doi":"10.1117/12.262517","DOIUrl":"https://doi.org/10.1117/12.262517","url":null,"abstract":"This paper presents an analogue VLSI implementation of a model of retina. The retinal model includes the main synaptic interactions in the outer plexiform layer (OPL) of the vertebrate retina, namely the coupling between horizontals and cones cells. Using the signal processing tools, our model has been theoretically studied. Thereby the resulting chip is a contrast and motion-sensitive silicon retina with better signal-to-noise ratio. Analogue processing provides a continuous temporal processing, a low power dissipation, and height functionality. The chips has been fabricated in 1 ¿m CMOS technology, However the VLSI implementation is highly constraint by size.","PeriodicalId":333302,"journal":{"name":"ESSCIRC '95: Twenty-first European Solid-State Circuits Conference","volume":"25 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124168600","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
W. Serdijn, A. C. van der Woerd, J. Davidse, A. V. van Roermund
{"title":"A Low-Voltage Low-Power Fully-Integratable Front-End for Hearing Instruments","authors":"W. Serdijn, A. C. van der Woerd, J. Davidse, A. V. van Roermund","doi":"10.1109/81.477203","DOIUrl":"https://doi.org/10.1109/81.477203","url":null,"abstract":"In this paper, the core of a universally applicable analog integrated circuit for hearing instruments is presented: a microphone preamplifier and an input-controlled automatic gain control with an adjustable knee level. The test chip demonstrates operation down to 1.05 V and a current consumption between 80 and 125 ¿A. The full-custom chip area in a 2.5¿m BiCMOS process (using only vertical NPNs and lateral PNPs) amounts to 0.56 mm2.","PeriodicalId":333302,"journal":{"name":"ESSCIRC '95: Twenty-first European Solid-State Circuits Conference","volume":"10 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125670467","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"A fully tuneable micropower log-domain filter","authors":"J. Ngarmnil, C. Toumazou, T. Lande","doi":"10.1049/IC:19950796","DOIUrl":"https://doi.org/10.1049/IC:19950796","url":null,"abstract":"We present a section of a second-order low distortion continuous-time filter employing MOSFETs operating in weak inversion. The idea is based upon the recently proposed log-domain filter approach used in bipolar technology. Measured results from a test chip fabricated in 0.8¿ Bicmos process are presented. Chip power consumption is 1¿W and the tuneable frequency range is 100-10kHz.","PeriodicalId":333302,"journal":{"name":"ESSCIRC '95: Twenty-first European Solid-State Circuits Conference","volume":"36 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-06-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122880411","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}