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IEEE Compound Semiconductor Integrated Circuit Symposium, 2004.最新文献

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A frequency doubler MMIC with a small 2-band elimination filter 带小2波段消除滤波器的倍频MMIC
IEEE Compound Semiconductor Integrated Circuit Symposium, 2004. Pub Date : 1900-01-01 DOI: 10.1109/CSICS.2004.1392559
T. Yamaguchi, T. Nakagawa, K. Araki
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引用次数: 8
A low power (45mW/latch) static 150GHz CML divider 低功率(45mW/latch)静态150GHz CML分压器
IEEE Compound Semiconductor Integrated Circuit Symposium, 2004. Pub Date : 1900-01-01 DOI: 10.1109/CSICS.2004.1392523
D. Hitko, T. Hussain, J. Jensen, Y. Royter, S. L. Morton, D. S. Matthews, R. Rajavel, I. Milosavljevlc, C. Fields, S. Thomas, A. Kurdoghllan, Z. Lao, K. Elliott, M. Sokolich
{"title":"A low power (45mW/latch) static 150GHz CML divider","authors":"D. Hitko, T. Hussain, J. Jensen, Y. Royter, S. L. Morton, D. S. Matthews, R. Rajavel, I. Milosavljevlc, C. Fields, S. Thomas, A. Kurdoghllan, Z. Lao, K. Elliott, M. Sokolich","doi":"10.1109/CSICS.2004.1392523","DOIUrl":"https://doi.org/10.1109/CSICS.2004.1392523","url":null,"abstract":"Operation of a static, current mode logic (CML) frequency divider to clock frequencies exceeding 150GHz is reported. The divide-by-8 circuit described here has been realized in a highly scaled 0.4/spl mu/m InP/InGaAs/InP DHBT technology, dissipates only 45mW per latch, and achieves this using purely resistive loads. Thermal limitations in device performance are observed to play a key role, demonstrating the need for aggressive heat management in high speed technologies. On a full thickness wafer in a 27/spl deg/C ambient, the maximum operating frequency of the divider was 143.6GHz; this range extended to 151.2GHz when an air flow at -30/spl deg/C was established across the wafer.","PeriodicalId":330585,"journal":{"name":"IEEE Compound Semiconductor Integrated Circuit Symposium, 2004.","volume":"37 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116681093","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 26
Venture investing in semiconductors 半导体风险投资
IEEE Compound Semiconductor Integrated Circuit Symposium, 2004. Pub Date : 1900-01-01 DOI: 10.1109/CSICS.2004.1392470
A. Prabhakar
{"title":"Venture investing in semiconductors","authors":"A. Prabhakar","doi":"10.1109/CSICS.2004.1392470","DOIUrl":"https://doi.org/10.1109/CSICS.2004.1392470","url":null,"abstract":"Many of today's great semiconductor companies started life as venture-capital-backed startups, and hundreds of private semiconductor companies are driving hard to be next. Over $1 billion a year of venture investment goes into semiconductor companies. This presentation will take a look at today's venture capital landscape from the perspective of semiconductor companies. It will discuss the overall venture investing climate, current venture investing activity in semiconductor companies, what differentiates successful semiconductor startups, and pathways from research to business. It will also offer perspectives on the emerging opportunities in semiconductors.","PeriodicalId":330585,"journal":{"name":"IEEE Compound Semiconductor Integrated Circuit Symposium, 2004.","volume":"79 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132743573","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A 20 GHz low noise amplifier with active balun in a 0.25 um SiGe BICMOS technology 采用0.25 μ m SiGe BICMOS技术的20 GHz低噪声有源平衡放大器
IEEE Compound Semiconductor Integrated Circuit Symposium, 2004. Pub Date : 1900-01-01 DOI: 10.1109/csics.2004.1392515
B. Welch, K. Kornegay, HyunMook Park, J. Laskar
{"title":"A 20 GHz low noise amplifier with active balun in a 0.25 um SiGe BICMOS technology","authors":"B. Welch, K. Kornegay, HyunMook Park, J. Laskar","doi":"10.1109/csics.2004.1392515","DOIUrl":"https://doi.org/10.1109/csics.2004.1392515","url":null,"abstract":"A 20 GHz low noise amplifier (LNA) with an active balun fabricated in a 0.25um SiGe BICMOS (f/sub t/ = 47 GHz) technology is presented The LNA achieves 7 dB of gain and a noise figure of 4.9 dB with all ports simultaneously matched with better than -16 dB of return loss. The amplifier is highly linear with an IP1dB of 0 dBm and IIP3 of 9 dBm, while consuming 14 mA of DC current from a 3.3v rail. To the authors knowledge, the LNA delivers the lowest reported noise figure and highest linearity for a silicon implementation of an (active balun /LNA) at 20 GHz.","PeriodicalId":330585,"journal":{"name":"IEEE Compound Semiconductor Integrated Circuit Symposium, 2004.","volume":"106 7 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122643633","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 27
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