{"title":"Universal 2-State 24-Neighborhood Asynchronous Cellular Automaton with Inner-Independent Open Rule","authors":"Susumu Adachi, Jia Lee, F. Peper, H. Umeo","doi":"10.1109/CANDAR.2016.0044","DOIUrl":"https://doi.org/10.1109/CANDAR.2016.0044","url":null,"abstract":"This paper proposes a computationally universal two-dimensional square-lattice asynchronous cellular automaton, in which cells have merely two states. The transition rule of a cell is specified by the pattern of the cells or its rotation-symmetric or reflection-symmetric rules included in distances 1 and 2 Moore neighborhood, which does not include its own cell (inner-independent). In a former model, we defined only the rules where the neighboring patterns are taken into account in computation. In the current model, the transition rule is an open rule, which is defined completely in terms of updating 0 or 1. Universality of the model is proven through the construction of a glider and three circuit primitives on the cell space, which are universal for the class of Delay-Insensitive circuits. Correct operation of the circuit is proven through a validity check algorithm which checks all generated patterns from an initial configuration to a final configuration of the operation. As a result, the number of rules to update to 1 is found to be 1618, not including the rotation-symmetric and reflection-symmetric versions of the rules. We show how to determine the open rules of the model, and how to define the energy function to obtain an energy evolution during the operation of the circuit.","PeriodicalId":322499,"journal":{"name":"2016 Fourth International Symposium on Computing and Networking (CANDAR)","volume":"35 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125040691","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Shintaro Hamanaka, S. Kurihara, S. Fukuda, M. Oguchi, Saneyasu Yamaguchi
{"title":"A Study on Object Lifetime in GC of Android Applications","authors":"Shintaro Hamanaka, S. Kurihara, S. Fukuda, M. Oguchi, Saneyasu Yamaguchi","doi":"10.1109/CANDAR.2016.0126","DOIUrl":"https://doi.org/10.1109/CANDAR.2016.0126","url":null,"abstract":"Android operating system has become one of the most popular smartphone platforms. A large number of applications are developed for Android Runtime (ART). Garbage Collection (GC) is an essential function of ART for Java-based applications. GC suspends all the application threads, called Stop The World (STW), and sacrifices application's performance. For reducing pauses to check heap, generational GC was proposed. It separates objects into two groups, the objects which probably die in the next GC and the others. Then, it tries to reduce search space and time to check. With this GC, accurate estimation of object lifetime is important. In this paper, we investigate objects' lifetime trend in modern Java-based applications of Android, and discuss a method for improving GC based on this trend. First, we introduce our monitoring system for object creations and collections in ART. Second, we present the monitoring results of recent popular Android applications and reveal the relations between lifetimes and object sizes.","PeriodicalId":322499,"journal":{"name":"2016 Fourth International Symposium on Computing and Networking (CANDAR)","volume":"36 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114373183","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Performance Evaluation of Multiuser Digital Color Shift Keying Using Pseudo-Noise Code with On-Off Signaling","authors":"Fuminori Sato, Y. Kozawa, Y. Umeda","doi":"10.1109/CANDAR.2016.0036","DOIUrl":"https://doi.org/10.1109/CANDAR.2016.0036","url":null,"abstract":"In this paper, a digital color shift keying with code division multiplexing (DCSK/CDM) is proposed as a multiple access technique in visible light communications. Multiple multicolor LEDs were used in DCSK/CDM where only one color is activated in each multicolor LED at a single time. Therefore the information is encoded in the combinations of activated colors. The main advantage of DCSK/CDM over conventional CSK/CDM is avoiding the need of any digital-to-analog converters. Moreover, two type of pseudo noise codes for DCSK/CDM were considered; generalized modified prime sequence code (GMPSC) and Hadamard code with on-off signaling (HC). In particular, DCSK/CDM with HC improves the data transmission rate by employing sequence inversion keying (SIK) technique. In this paper, the symbol error rate (SER) and bit error rate (BER) performance of the DCSK/CDM systems using multiple RGB-LEDs (i.e., TLED: trichromatic LED) are evaluated through theoretical analysis in the multi-user case. It is shown that BER of DCSK/SIK can be improved by about 1 dBm compared with the DCSK/DS systems when the spectral efficiency over VLC network is 1.3 bit/sec/Hz. In addition, when the spectral efficiency per TLED is the same as 0.063 bit/sec/Hz/LED.","PeriodicalId":322499,"journal":{"name":"2016 Fourth International Symposium on Computing and Networking (CANDAR)","volume":"4 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115823493","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Xevdriver: A Software System Supporting XML-based Source-to-Source Code Transformations on Fortran Programs","authors":"R. Suda, H. Takizawa","doi":"10.1109/CANDAR.2016.0096","DOIUrl":"https://doi.org/10.1109/CANDAR.2016.0096","url":null,"abstract":"The Xevolver framework is a code transformation framework for supporting evolutional modifications of high performance computing codes. This paper introduces a set of software modules that facilitates administrative tasks about multiple code transformations on multiple source codes. We call this set of software modules the xevdriver, because it drives transformations using Xevolver framework. First, xevdriver provides an abstract view of temporary files. Parsing and unparsing between Fortran and XML are done automatically, and the user do not have to keep track of temporary file names during a series of applications of code transformations. Second, xevdriver also provides an abstract view of combinations of transformations. Xevdriver provides a script language, in which users can define combinations of code transformations as procedures. Third, the logging functions and a log-viewer are provided in accordance with the above abstractions. Users can check how the source codes are transformed on the log-viewer from the high level abstractions of code transformation procedures, and can inspect the intermediate results down into an arbitrary level of concreteness of the implementations of transformations. Our toolset will help development, management and applications of complex code transformations based on Xevolver framework.","PeriodicalId":322499,"journal":{"name":"2016 Fourth International Symposium on Computing and Networking (CANDAR)","volume":"48 2","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"120893592","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"On the Performance Evaluation of Multi-channel MAC Protocols","authors":"Marcos F. Caetano, J. Bordim","doi":"10.1109/CANDAR.2016.0120","DOIUrl":"https://doi.org/10.1109/CANDAR.2016.0120","url":null,"abstract":"The number of devices enhanced with wireless communication capabilities is increasing at a fast pace. Such increase has exacerbated the quest for efficient medium access control protocols. In fact, the possibility of providing concurrent access to multiple channels, thus increasing throughput and reducing channel access delays, has been widely investigated. Among the alternatives for providing multi-channel access is the dedicated control channel (DCC), the single rendezvous (SR) and the parallel rendezvous (PR) protocols. The goal of these protocols is to provide the means for managing channel access to multi, orthogonal, channels. These protocols are often evaluated in ideal settings where they have shown to provide significant improvements in terms of throughput. However, when confronted with a realistic setting, the performance of such protocols is unknown. The main contribution of this work is to present an evaluation of multi-channel access control protocols. The performance evaluation focuses on identifying the key benefits and limitations of the DCC, SR and PR strategies. These strategies have been implemented in the OMNET++ simulator using the MiXiM framework. The simulation results show that the PR strategy obtains higher throughput when source-destination pairs are confined to the same channel sequence. However, due to missing receiver problems, which occurs when source and destination nodes do not know about each other's whereabouts, the throughput of the PR strategy decays considerably. In fact, with a limited number of channels, the performance of the SR and DCC strategies provide similar results as that of the PR strategy.","PeriodicalId":322499,"journal":{"name":"2016 Fourth International Symposium on Computing and Networking (CANDAR)","volume":"47 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127063193","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Taiki Sowa, Suguru Sunada, Y. Yamazaki, Takeru Miyazaki
{"title":"Biometric Bit String Generation from Handwritten Signatures on Smart Device","authors":"Taiki Sowa, Suguru Sunada, Y. Yamazaki, Takeru Miyazaki","doi":"10.1109/CANDAR.2016.0118","DOIUrl":"https://doi.org/10.1109/CANDAR.2016.0118","url":null,"abstract":"Recently, with the rapid spread of smart devices, such as smart-phones and tablet PCs, biometric authentication using handwritten signatures on such devices has been attracting much interest. However, little research has been reported on biometric-bit-string generation from handwritten signatures, which is indispensable for biometric-template protection on smart devices. Therefore, for designing a more secure template-protection method for smart devices, we propose a biometric-bit-string-generation method from handwritten signatures collected on such devices. The simulation results confirmed the effectiveness of the proposed method.","PeriodicalId":322499,"journal":{"name":"2016 Fourth International Symposium on Computing and Networking (CANDAR)","volume":"69 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121711455","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Memory Access Monitoring and Disguising of Process Information to Avoid Attacks to Essential Services","authors":"Masaya Sato, Toshihiro Yamauchi, H. Taniguchi","doi":"10.1109/CANDAR.2016.0114","DOIUrl":"https://doi.org/10.1109/CANDAR.2016.0114","url":null,"abstract":"To prevent attacks on essential software and to mitigate damage, an attack avoiding method that complicates process identification from attackers is proposed. This method complicates the identification of essential services by replacing process information with dummy information. However, this method allows attackers to identify essential processes by detecting changes in process information. To address this problems and provide more complexity to process identification, this paper proposes a memory access monitoring by using a virtual machine monitor. By manipulating the page access permission, a virtual machine monitor detects page access, which includes process information, and replaces it with dummy information. This paper presents the design, implementation, and evaluation of the proposed method.","PeriodicalId":322499,"journal":{"name":"2016 Fourth International Symposium on Computing and Networking (CANDAR)","volume":"45 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127930615","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Isomorphic Mapping for Ate-Based Pairing over KSS Curve of Embedding Degree 18","authors":"Md. Al-Amin Khandaker, Y. Nogami","doi":"10.1109/CANDAR.2016.0113","DOIUrl":"https://doi.org/10.1109/CANDAR.2016.0113","url":null,"abstract":"Pairing based cryptography is considered as the next generation of security for which it attracts many researcher to work on faster and efficient pairing to make it practical. Among the several challenges of efficient pairing; efficient scalar multiplication of rational point defined over extension field of degree k ≥ 12 is important. However, there exists isomorphic rational point group defined over relatively lower degree extension field. Exploiting such property, this paper has showed a mapping technique between isomorphic rational point groups in the context of Ate-based pairing with Kachisa-Schaefer-Scott (KSS) pairing friendly curve of embedding degree k = 18. In the case of KSS curve, there exists sub-field sextic twisted curve that includes sextic twisted isomorphic rational point group defined over Fp3. This paper has showed the mapping procedure from certain Fp18 rational point group to its sub-field isomorphic rational point group in Fp3 and vice versa. This paper has also showed that scalar multiplication is about 20 times faster after applying the proposed mapping which in-turns resembles that the impact of this mapping will greatly enhance the pairing operation in KSS curve.","PeriodicalId":322499,"journal":{"name":"2016 Fourth International Symposium on Computing and Networking (CANDAR)","volume":"29 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125973539","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Toward a Database Refactoring Support Tool","authors":"Kohei Hamaji, Y. Nakamoto","doi":"10.1109/CANDAR.2016.0082","DOIUrl":"https://doi.org/10.1109/CANDAR.2016.0082","url":null,"abstract":"Database schema changes in system development cannot be avoidable. We need refactoring for the schema. Refactoring criteria for the schema, however, has not been clear and the refactoring depends on the skill of database designers. To solve the problems, we consider to finding out refactoring target columns and recommending them as refactoring targets by using clustering techniques with features of database schema and data in the table and implement it as a support tool. We describe the method and the support tool using the method.","PeriodicalId":322499,"journal":{"name":"2016 Fourth International Symposium on Computing and Networking (CANDAR)","volume":"13 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131933163","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
T. Isokawa, F. Peper, Shoji Ishibashi, Toshifumi Minemoto, N. Matsui
{"title":"An Asynchronous Updating Scheme for a Cellular Logic Memory Array","authors":"T. Isokawa, F. Peper, Shoji Ishibashi, Toshifumi Minemoto, N. Matsui","doi":"10.1109/CANDAR.2016.0052","DOIUrl":"https://doi.org/10.1109/CANDAR.2016.0052","url":null,"abstract":"The Cellular Logic Memory Array (CLMA) is a parallel computing paradigm based on an array of memory elements. Each of the memory elements can be configured as a binary logic element or a piece of wiring depending on the contents written in the element. Together these memory elements form a logic circuit that is able to conduct logic operations by sending signals along the elements. The CLMA is originally designed as a synchronous system with clock signals, but it should be operated without clock signals to achieve low-power consumption and efficient computation. As a first step towards an asynchronous CLMA, we present an asynchronous updating scheme in CLMA. Binary signals in the original CLMA are extended to eight-level signals that contain temporal information, so that the resulting functions of logic and wiring resemble that of a synchronously timed scheme. We show that the presented CLMA can operate the same function as in the original CLMA, though some overhead is sustained.","PeriodicalId":322499,"journal":{"name":"2016 Fourth International Symposium on Computing and Networking (CANDAR)","volume":"51 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134181919","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}