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Proceedings the First Aizu International Symposium on Parallel Algorithms/Architecture Synthesis最新文献

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Dynamic randomized simulation of hierarchical PRAMs on meshes 网格上分层pram的动态随机化仿真
Proceedings the First Aizu International Symposium on Parallel Algorithms/Architecture Synthesis Pub Date : 1995-03-15 DOI: 10.1109/AISPAS.1995.401331
T. Heywood, C. Leopold
{"title":"Dynamic randomized simulation of hierarchical PRAMs on meshes","authors":"T. Heywood, C. Leopold","doi":"10.1109/AISPAS.1995.401331","DOIUrl":"https://doi.org/10.1109/AISPAS.1995.401331","url":null,"abstract":"The Hierarchical PRAM (H-PRAM) (T. Heywood, S. Ranka, 1992) model is a dynamically partitionable PRAM, which charges for communication and synchronization, and allows parallel algorithms to abstractly represent general locality. We show that the H-PRAM can be implemented efficiently on a two dimensional mesh. We use the Peano indexing scheme to hierarchically partition the mesh. Multiple subPRAMs of the H-PRAM are simulated on irregular submeshes. For an H-PRAM program of cost T, the overall CRCW H-PRAM simulation runs in time constant in T with high probability. The simulation is dynamic, i.e. it does not depend on prior knowledge of a program's specific hierarchical configuration, which may be data dependent.<<ETX>>","PeriodicalId":321580,"journal":{"name":"Proceedings the First Aizu International Symposium on Parallel Algorithms/Architecture Synthesis","volume":"80 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-03-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133450119","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
Massively parallel processing project of the Japanese Ministry of Education 日本文部省大规模并行处理项目
Proceedings the First Aizu International Symposium on Parallel Algorithms/Architecture Synthesis Pub Date : 1995-03-15 DOI: 10.1109/AISPAS.1995.401358
H. Tanaka
{"title":"Massively parallel processing project of the Japanese Ministry of Education","authors":"H. Tanaka","doi":"10.1109/AISPAS.1995.401358","DOIUrl":"https://doi.org/10.1109/AISPAS.1995.401358","url":null,"abstract":"The Massively Parallel Processing Project started in 1992 as a priority area of research for the Ministry of Education in Japan. The objective of this research project is to establish the basic technology of massively parallel processing which is expected to be the fundamental tool to develop the high-level technologies of the 21st century. The main goal of this project is to build up a system prototype of a massively parallel processing system. This paper describes the organization of this project and discusses the research results up to this time.<<ETX>>","PeriodicalId":321580,"journal":{"name":"Proceedings the First Aizu International Symposium on Parallel Algorithms/Architecture Synthesis","volume":"119 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-03-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116379681","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Visualization and sonification of methods 可视化和超声方法
Proceedings the First Aizu International Symposium on Parallel Algorithms/Architecture Synthesis Pub Date : 1995-03-15 DOI: 10.1109/AISPAS.1995.401354
N. Mirenkov
{"title":"Visualization and sonification of methods","authors":"N. Mirenkov","doi":"10.1109/AISPAS.1995.401354","DOIUrl":"https://doi.org/10.1109/AISPAS.1995.401354","url":null,"abstract":"An approach supporting a new programming philosophy and a way of developing the corresponding technology are presented. The idea behind the approach is making use of animation films as communication units for computer-human dialog. These films have their own sets of figures, sounds, colors and their own \"shape\" of the movement. Users recognize the units due to a combination of all these features. Each film is related to series of frames (computational steps) and reflects some knowledge about data processing. Each frame highlights a substructure of data for which operations should be specified. As a rule, this substructure is a set of points and/or moving objects in a multidimensional space-time. To specify a problem a user employs: modification of the system films, composition of these films, seeing a film being created, etc. The corresponding program (sequential or parallel) is generated automatically.<<ETX>>","PeriodicalId":321580,"journal":{"name":"Proceedings the First Aizu International Symposium on Parallel Algorithms/Architecture Synthesis","volume":"33 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-03-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127333362","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 9
Analysis of communication data: compression network 分析通信数据:压缩网络
Proceedings the First Aizu International Symposium on Parallel Algorithms/Architecture Synthesis Pub Date : 1995-03-15 DOI: 10.1109/AISPAS.1995.401337
Y. Nakano
{"title":"Analysis of communication data: compression network","authors":"Y. Nakano","doi":"10.1109/AISPAS.1995.401337","DOIUrl":"https://doi.org/10.1109/AISPAS.1995.401337","url":null,"abstract":"The paper reports the effect of compressed message delivery (a compression network) on a parallel processing system such as workstation clusters. Compression network is simulated on a massively parallel processor, the Thinking Machines CM-5, using the parallel language Split-C. To examine the benefit of data compression to the system, profiles, including message pattern, number of messages, and message size, are measured by simulation. The results indicate that compression increases the network bandwidth. A theoretical compression ratio of about a half was estimated for almost all messages. Network bandwidth can be efficiently doubled using data compression.<<ETX>>","PeriodicalId":321580,"journal":{"name":"Proceedings the First Aizu International Symposium on Parallel Algorithms/Architecture Synthesis","volume":"67 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-03-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123204245","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Software engineering techniques and tools for high performance parallel systems 高性能并行系统的软件工程技术和工具
Proceedings the First Aizu International Symposium on Parallel Algorithms/Architecture Synthesis Pub Date : 1995-03-15 DOI: 10.1109/AISPAS.1995.401351
P. Croll, I. Jelly, I. Gorton
{"title":"Software engineering techniques and tools for high performance parallel systems","authors":"P. Croll, I. Jelly, I. Gorton","doi":"10.1109/AISPAS.1995.401351","DOIUrl":"https://doi.org/10.1109/AISPAS.1995.401351","url":null,"abstract":"This paper considers the current state of software engineering for parallel systems. A review of existing approaches and techniques identifies inadequacies. Recent work on design, verification and automated support is outlined. The next generation of embedded and distributed technologies will compound the problems through increased demand and diversity. This paper discusses the implications for the progression of current techniques into new methods for future software engineering of parallel systems.<<ETX>>","PeriodicalId":321580,"journal":{"name":"Proceedings the First Aizu International Symposium on Parallel Algorithms/Architecture Synthesis","volume":"10 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-03-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125515221","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Towards Petri net calculi based on synchronization via places 基于位置同步的Petri网演算
Proceedings the First Aizu International Symposium on Parallel Algorithms/Architecture Synthesis Pub Date : 1995-03-15 DOI: 10.1109/AISPAS.1995.401330
N. Anisimov, A. Kovalenko
{"title":"Towards Petri net calculi based on synchronization via places","authors":"N. Anisimov, A. Kovalenko","doi":"10.1109/AISPAS.1995.401330","DOIUrl":"https://doi.org/10.1109/AISPAS.1995.401330","url":null,"abstract":"The paper addresses the problem of designing Petri net based calculi. It is pointed out that almost all existing problem oriented Petri net calculi have been developed in an ad hoc fashion, and the need for a basic formal tool which will help their design is stressed. We introduce a series of place synchronization operations ranging from primitive place synchronization to the general synchronization via place access points. We consider some examples where the place synchronization operation can be successfully used to model place merging, sequentialization and disabling.<<ETX>>","PeriodicalId":321580,"journal":{"name":"Proceedings the First Aizu International Symposium on Parallel Algorithms/Architecture Synthesis","volume":"151 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-03-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116442457","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Modified mesh-connected computers for image processing applications 用于图像处理应用的改进的网格连接计算机
Proceedings the First Aizu International Symposium on Parallel Algorithms/Architecture Synthesis Pub Date : 1995-03-15 DOI: 10.1109/AISPAS.1995.401344
M. Hamdi
{"title":"Modified mesh-connected computers for image processing applications","authors":"M. Hamdi","doi":"10.1109/AISPAS.1995.401344","DOIUrl":"https://doi.org/10.1109/AISPAS.1995.401344","url":null,"abstract":"The paper proposes a new architecture, which has the potential to support low-level image processing as well as intermediate and high-level vision analysis efficiently. The integrated architecture consists of a mesh of processors enhanced with an efficient recursive network. Low-level image processing is performed on the mesh processor, while intermediate and high-level vision analysis is performed on the recursive network. The interaction between the two levels is supported by parallel data and control paths. To illustrate the power of such a two-level system, we present efficient parallel algorithms for a variety of problems from low-level image processing to high-level vision. Representative applications include image component labeling convexity problems, and histogram-type operations. Through time complexity analysis, we show that the integrated architecture meets the requirements of many image understanding tasks.<<ETX>>","PeriodicalId":321580,"journal":{"name":"Proceedings the First Aizu International Symposium on Parallel Algorithms/Architecture Synthesis","volume":"262 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-03-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133849948","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Constructing parallel implementations with algebraic programming tools 用代数编程工具构造并行实现
Proceedings the First Aizu International Symposium on Parallel Algorithms/Architecture Synthesis Pub Date : 1995-03-15 DOI: 10.1109/AISPAS.1995.401329
A. E. Doroshenko, A. Godlevsky
{"title":"Constructing parallel implementations with algebraic programming tools","authors":"A. E. Doroshenko, A. Godlevsky","doi":"10.1109/AISPAS.1995.401329","DOIUrl":"https://doi.org/10.1109/AISPAS.1995.401329","url":null,"abstract":"An approach to declarative construction of parallel implementations (dynamical parallelizers) for a general class of sequential imperative programs by means of the algebraic programming system APS is considered. It gives advantages of rapid prototyping and evolutionary development of efficient parallelizers. An operational model of a dynamical parallelizer in the form of transition system is constructed and major parts of its declarative implementation are described as systems of relations. Techniques for designing efficient parallelizers are presented and exemplified.<<ETX>>","PeriodicalId":321580,"journal":{"name":"Proceedings the First Aizu International Symposium on Parallel Algorithms/Architecture Synthesis","volume":"108 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-03-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133177750","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Parallel algorithm for solving systems of linear equations with dynamically changed length of operands 求解操作数长度动态变化线性方程组的并行算法
Proceedings the First Aizu International Symposium on Parallel Algorithms/Architecture Synthesis Pub Date : 1995-03-15 DOI: 10.1109/AISPAS.1995.401349
A.P. Vazhenin
{"title":"Parallel algorithm for solving systems of linear equations with dynamically changed length of operands","authors":"A.P. Vazhenin","doi":"10.1109/AISPAS.1995.401349","DOIUrl":"https://doi.org/10.1109/AISPAS.1995.401349","url":null,"abstract":"Peculiarity of the most direct algorithms for solving system of linear equations is the use of divisions for the elimination of unknowns. Division requires great time for its execution, when the multiprecision arithmetic is used because in this case it is realized by special programs. In this paper a parallel algorithm is described implementing the elimination procedure without divisions. Some results are presented of execution time, speedup, and accuracy. Measurements were taken for a system supporting massively parallel high-accuracy SIMD-computations by dynamically changed length of operands.<<ETX>>","PeriodicalId":321580,"journal":{"name":"Proceedings the First Aizu International Symposium on Parallel Algorithms/Architecture Synthesis","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-03-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130772101","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Supercompilers for massively parallel architectures 用于大规模并行架构的超级编译器
Proceedings the First Aizu International Symposium on Parallel Algorithms/Architecture Synthesis Pub Date : 1995-03-15 DOI: 10.1109/AISPAS.1995.401323
B. Chapman, M. Pantano, H. Zima
{"title":"Supercompilers for massively parallel architectures","authors":"B. Chapman, M. Pantano, H. Zima","doi":"10.1109/AISPAS.1995.401323","DOIUrl":"https://doi.org/10.1109/AISPAS.1995.401323","url":null,"abstract":"We describe the design of a compilation system, which translates Fortran programs automatically into explicitly parallel programs for a massively parallel architecture. Such a compiler must automatically generate data distributions and derive program transformation strategies based on a combination of heuristics and analysis features. Programs are subjected to an iterative tuning process, involving three major components: a restructuring system, a performance analysts subsystem, and a parallelization support environment. Many of the components in this environment have already been implemented in the framework of the Vienna Fortran compilation system.<<ETX>>","PeriodicalId":321580,"journal":{"name":"Proceedings the First Aizu International Symposium on Parallel Algorithms/Architecture Synthesis","volume":"74 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-03-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127753085","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
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