2009 International Conference on Advances in Computational Tools for Engineering Applications最新文献

A high speed 12-bit pipelined ADC using Switched Capacitor and fat tree encoder 一个高速12位流水线ADC使用开关电容和胖树编码器

2009 International Conference on Advances in Computational Tools for Engineering Applications Pub Date : 2009-07-15 DOI: 10.1109/ACTEA.2009.5227844

M. Ramalatha, A. Karthick, S. Karthick, K. Muralikrishnan

{"title":"A high speed 12-bit pipelined ADC using Switched Capacitor and fat tree encoder","authors":"M. Ramalatha, A. Karthick, S. Karthick, K. Muralikrishnan","doi":"10.1109/ACTEA.2009.5227844","DOIUrl":"https://doi.org/10.1109/ACTEA.2009.5227844","url":null,"abstract":"The parameters like speed and resolution of an Analog to Digital Converter (ADC) characterizes the performance of any control system in the real world. Among available ADC architectures Flash, Pipeline, Sigma-Delta and Successive Approximation Register (SAR) have been frequently used to satisfy different requirements like speed, resolution and power. A flash architecture is conceptually the simplest and the easiest to design, but requires a large number of transistors and significant power because, an n-bit ADC requires 2n-1 comparators (one comparator for each threshold), which also present a significant capacitive load to the circuitry driving the ADC. Though Flash ADC is preferred for its high speed, this speed decreases with increase in resolution. In order to achieve higher resolution, SAR ADC is preferred, but the speed of the ADC is very limited. Therefore for better trade-off between resolution and speed, the pipeline architecture is used. The concurrent operation of the pipelined stages is responsible for its increased efficiency. Each stage processes a new sample as soon as its residue is sampled by the following stage, which leads to a high throughput of one sample per clock cycle. The Pipeline ADC is constructed by using Switched Capacitor (SC) circuit, which exploits the charge storing abilities of CMOS to achieve precision signal processing and is preferred in mixed-signal, A/D interfaces. A Fat Tree Encoder (FTE) used in Flash ADC of each pipeline stage improves speed, reduces the latency, power consumption and area.","PeriodicalId":308909,"journal":{"name":"2009 International Conference on Advances in Computational Tools for Engineering Applications","volume":"107 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-07-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125128310","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 6

A low-cost microstrip antenna for 3G/WLAN/WiMAX and UWB applications 用于3G/WLAN/WiMAX和UWB应用的低成本微带天线

2009 International Conference on Advances in Computational Tools for Engineering Applications Pub Date : 2009-07-15 DOI: 10.1109/ACTEA.2009.5227857

M. Al‐Husseini, Y. Tawk, A. El-Hajj, K. Kabalan

引用次数: 37

A new DTC of six phase induction machines using matrix converter 采用矩阵变换器的新型六相感应电机直接转矩控制

2009 International Conference on Advances in Computational Tools for Engineering Applications Pub Date : 2009-07-15 DOI: 10.1109/ACTEA.2009.5227862

R. Kianinezhad, S. G. Seyfossadat, V. Talaeizadeh, A. Hasani

引用次数: 7

Visualizing the underlying trends of component latencies affecting Service Operation Performance 可视化影响服务操作性能的组件延迟的潜在趋势

2009 International Conference on Advances in Computational Tools for Engineering Applications Pub Date : 2009-07-15 DOI: 10.1109/ACTEA.2009.5227946

Sid Kargupta, S. Black

引用次数: 2

Phoneme-viseme mapping for Modern, Classical Arabic language 现代、古典阿拉伯语的音素-视素映射

2009 International Conference on Advances in Computational Tools for Engineering Applications Pub Date : 2009-07-15 DOI: 10.1109/ACTEA.2009.5227875

Pascal Damien, Nagi Wakim, Marcel Egea

引用次数: 10

Fault tolerant reversible logic synthesis: Carry look-ahead and carry-skip adders 容错可逆逻辑综合:进位前瞻和进位跳加器

2009 International Conference on Advances in Computational Tools for Engineering Applications Pub Date : 2009-07-15 DOI: 10.1109/ACTEA.2009.5227871

Md. Saiful Islam, Muhammad Mahbubur Rahman, Zerina Begum, M. Hafiz

{"title":"Fault tolerant reversible logic synthesis: Carry look-ahead and carry-skip adders","authors":"Md. Saiful Islam, Muhammad Mahbubur Rahman, Zerina Begum, M. Hafiz","doi":"10.1109/ACTEA.2009.5227871","DOIUrl":"https://doi.org/10.1109/ACTEA.2009.5227871","url":null,"abstract":"Irreversible logic circuits dissipate heat for every bit of information that is lost. Information is lost when the input vector cannot be recovered from its corresponding output vector. Reversible logic circuit naturally takes care of heating because it implements only the functions that have one-to-one mapping between its input and output vectors. Therefore reversible logic design becomes one of the promising research directions in low power dissipating circuit design in the past few years and has found its application in low power CMOS design, digital signal processing and nanotechnology. This paper presents the efficient approaches for designing reversible fast adders that implement carry look-ahead and carry-skip logic. The proposed 16-bit high speed reversible adder will include IG gates for the realization of its basic building block. The IG gate is universal in the sense that it can be used to synthesize any arbitrary Boolean-functions. The IG gate is parity preserving, that is, the parity of the inputs matches the parity of the outputs. It allows any fault that affects no more than a single signal readily detectable at the circuit's primary outputs. Therefore, the proposed high speed adders will have the inherent opportunity of detecting errors in its output side. It has also been demonstrated that the proposed design offers less hardware complexity and is efficient in terms of gate count, garbage outputs and constant inputs than the existing counterparts.","PeriodicalId":308909,"journal":{"name":"2009 International Conference on Advances in Computational Tools for Engineering Applications","volume":"47 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-07-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131387232","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 74

Building simulation tools and their role in improving existing building designs 建筑模拟工具及其在改善现有建筑设计中的作用

2009 International Conference on Advances in Computational Tools for Engineering Applications Pub Date : 2009-07-15 DOI: 10.1109/ACTEA.2009.5227889

Sylvie Melki, Michael Hayek

引用次数: 12

Electromagnetic Time-Reversal for reverberation chamber applications using FDTD FDTD混响室应用的电磁时间反转

2009 International Conference on Advances in Computational Tools for Engineering Applications Pub Date : 2009-07-15 DOI: 10.1109/ACTEA.2009.5227872

I. El Baba, S. Lalléchère, P. Bonnet

{"title":"Electromagnetic Time-Reversal for reverberation chamber applications using FDTD","authors":"I. El Baba, S. Lalléchère, P. Bonnet","doi":"10.1109/ACTEA.2009.5227872","DOIUrl":"https://doi.org/10.1109/ACTEA.2009.5227872","url":null,"abstract":"This paper deals with the use of Time-Reversal (TR) method in electromagnetism and its applications in ElectroMagnetic Compatibility (EMC) in a reverberating environment. The proposed study leans on Mode Stirred Reverberation Chamber (MSRC) of the EMC team, LASMEA (LAboratoire des Sciences et Matériaux pour l'Électronique et d'Automatique, Clermont University), France. Based upon the equivalence between backward propagation and reversibility of the wave equation, many TR experiments were led successfully in acoustics [1]. In this paper, an original way of using TR in electromagnetics is detailed (principally concerning the ability of the technique to focus a signal in time and space). First, the theoretical principles of TR are described and illustrated using Finite Difference in Time Domain (FDTD, [2]) computing of Maxwell's equations. Then, the aim is to accurately describe the influence of various parameters (from FDTD numerical experiments) above focusing. Thus, particular interests rely on the numbers and locations of TR sensors, directivity of source, presence of scatterers, impact of MSRC. Finally, considering characteristics of EMC applications in MSRC, a closer look will be set to the advantages of TR numerical tools for innovating studies in reverberation chambers.","PeriodicalId":308909,"journal":{"name":"2009 International Conference on Advances in Computational Tools for Engineering Applications","volume":"14 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-07-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131741951","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 12

SIFT-based ear recognition by fusion of detected keypoints from color similarity slice regions 基于sift的人耳识别，融合颜色相似切片区域检测到的关键点

2009 International Conference on Advances in Computational Tools for Engineering Applications Pub Date : 2009-07-15 DOI: 10.1109/ACTEA.2009.5227958

D. Kisku, H. Mehrotra, Phalguni Gupta, J. Sing

{"title":"SIFT-based ear recognition by fusion of detected keypoints from color similarity slice regions","authors":"D. Kisku, H. Mehrotra, Phalguni Gupta, J. Sing","doi":"10.1109/ACTEA.2009.5227958","DOIUrl":"https://doi.org/10.1109/ACTEA.2009.5227958","url":null,"abstract":"Ear biometric is considered as one of the most reliable and invariant biometrics characteristics in line with iris and fingerprint characteristics. In many cases, ear biometrics can be compared with face biometrics regarding many physiological and texture characteristics. In this paper, a robust and efficient ear recognition system is presented, which uses Scale Invariant Feature Transform (SIFT) as feature descriptor for structural representation of ear images. In order to make it more robust to user authentication, only the regions having color probabilities in a certain ranges are considered for invariant SIFT feature extraction, where the K-L divergence is used for keeping color consistency. Ear skin color model is formed by Gaussian mixture model and clustering the ear color pattern using vector quantization. Finally, K-L divergence is applied to the GMM framework for recording the color similarity in the specified ranges by comparing color similarity between a pair of reference model and probe ear images. After segmentation of ear images in some color slice regions, SIFT keypoints are extracted and an augmented vector of extracted SIFT features are created for matching, which is accomplished between a pair of reference model and probe ear images. The proposed technique has been tested on the IITK Ear database and the experimental results show improvements in recognition accuracy while invariant features are extracted from color slice regions to maintain the robustness of the system.","PeriodicalId":308909,"journal":{"name":"2009 International Conference on Advances in Computational Tools for Engineering Applications","volume":"29 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-07-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114447622","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 51

Study analysis on the excitation of a switched reluctance generator for wind energy conversion 风能转换用开关磁阻发电机励磁的研究分析

2009 International Conference on Advances in Computational Tools for Engineering Applications Pub Date : 2009-07-15 DOI: 10.1109/ACTEA.2009.5227943

M. Nassereddine, J. Rizk, M. Nagrial, A. Hellany

引用次数: 2