Carpathian Journal of Electronic and Computer Engineering最新文献_第3页

Low Power Full Adder Design Using PTM Transistor Model 基于PTM晶体管模型的低功耗全加器设计

Carpathian Journal of Electronic and Computer Engineering Pub Date : 2019-12-01 DOI: 10.2478/cjece-2019-0011

Bappy Chandra Devnath, S. Biswas

{"title":"Low Power Full Adder Design Using PTM Transistor Model","authors":"Bappy Chandra Devnath, S. Biswas","doi":"10.2478/cjece-2019-0011","DOIUrl":"https://doi.org/10.2478/cjece-2019-0011","url":null,"abstract":"Abstract At present the processing power of the digital electronic chip is enormous and that has been possible because of the continuous improvement of the design methodology and fabrication technology. So, the data processing capability of the chip is increased significantly. Data processing in the electronic chip means the arithmetic operation on that data. For that reason, ALU is present in any processor. Full adder is one of the critical components of arithmetic unit. Improvement of the full adder is necessary for improving the computational performance of a chip. In order to design an efficient full adder, designer should choose an appropriate logic style. In this research, two new model of full-adder circuits are designed and analyzed using Pass Transistor logic in order to reduce power consumption and increase operational speed. The first proposed adder consists of 8 transistors and the second one consists of 10 transistors. LTSPICE is employed for simulating the proposed circuits using16nm low power high-k strained silicon transistor model. The overall performance of the proposed adder circuits and comparative results demonstrate the superiority of the proposed model.","PeriodicalId":30888,"journal":{"name":"Carpathian Journal of Electronic and Computer Engineering","volume":"12 1","pages":"15 - 20"},"PeriodicalIF":0.0,"publicationDate":"2019-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"45700485","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 2

Analytical formulas and measurement technique for the built-in potential of practical semiconductor junctions 实用半导体结内电势的分析公式和测量技术

Carpathian Journal of Electronic and Computer Engineering Pub Date : 2019-12-01 DOI: 10.2478/cjece-2019-0010

M. Cristea

引用次数: 0

Digital Controller Design of an Industrial Sewing Station using Evolutionary Algorithms 基于进化算法的工业缝纫站数字控制器设计

Carpathian Journal of Electronic and Computer Engineering Pub Date : 2019-12-01 DOI: 10.2478/cjece-2019-0018

E. Moretti, Gustavo Gonçalves Coelho, J. Coelho

{"title":"Digital Controller Design of an Industrial Sewing Station using Evolutionary Algorithms","authors":"E. Moretti, Gustavo Gonçalves Coelho, J. Coelho","doi":"10.2478/cjece-2019-0018","DOIUrl":"https://doi.org/10.2478/cjece-2019-0018","url":null,"abstract":"Abstract Development of increasingly efficient production methods is a competiveness driving factor for any company. Today, many of these improvements include the integration of technology-based solutions into processes traditionally operated by humans. In this context, the present work aims to report the controller performance of a prototype developed for semi-automatic sewing stations. This project was fostered by “Factory Play”, a Portuguese company that produces inflatable structures, under the technical supervision of the Polytechnic Institute of Bragança. At the present time, the sewing station travel speed is regulated by an embedded PID controller that has been previously tuned using classical methods. However, even if the overall performance is currently acceptable, additional experiments were made regarding the use of evolutionary based algorithms to attain a better dynamic response and flexibility. This article present the results obtained using those methods where it is possible to confirm that the use of evolutionary algorithm will simplify the design process while consistently leading to a suitable solution.","PeriodicalId":30888,"journal":{"name":"Carpathian Journal of Electronic and Computer Engineering","volume":"12 1","pages":"54 - 59"},"PeriodicalIF":0.0,"publicationDate":"2019-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"46358501","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

RFID Antenna for UHF Band 超高频射频识别天线

Carpathian Journal of Electronic and Computer Engineering Pub Date : 2019-12-01 DOI: 10.2478/cjece-2019-0013

N. Crisan

引用次数: 2

A Reconfigurable High-Q Antenna for Automotive Applications 汽车用可重构高q天线

Carpathian Journal of Electronic and Computer Engineering Pub Date : 2019-12-01 DOI: 10.2478/cjece-2019-0015

N. Crisan

引用次数: 1

Comparison study between SVPWM and FSVPWM strategy in fuzzy second order sliding mode control of a DFIG-based wind turbine 基于DFIG的风力发电机模糊二阶滑模控制中SVPWM和FSVPWM策略的比较研究

Carpathian Journal of Electronic and Computer Engineering Pub Date : 2019-12-01 DOI: 10.2478/cjece-2019-0009

H. Benbouhenni

引用次数: 11

Modeling and Electrical Characterization of Josephson Junction Using Approximation in the sense of Least Squares 用最小二乘法逼近约瑟夫森结的建模和电特性

Carpathian Journal of Electronic and Computer Engineering Pub Date : 2019-12-01 DOI: 10.2478/cjece-2019-0017

A. Mostefai

引用次数: 0

EEG data processing with neural network 脑电数据的神经网络处理

Carpathian Journal of Electronic and Computer Engineering Pub Date : 2019-12-01 DOI: 10.2478/cjece-2019-0014

T. Majoros, B. Ujvari, S. Oniga

引用次数: 4

A survey in the design and control of automated guided vehicle systems 自动导引车系统设计与控制综述

Carpathian Journal of Electronic and Computer Engineering Pub Date : 2019-11-08 DOI: 10.2478/cjece-2019-0016

Alexandru Vancea, I. Orha

{"title":"A survey in the design and control of automated guided vehicle systems","authors":"Alexandru Vancea, I. Orha","doi":"10.2478/cjece-2019-0016","DOIUrl":"https://doi.org/10.2478/cjece-2019-0016","url":null,"abstract":"Abstract Automatic guided vehicles (AGVs) play an important role in the small-scale industry as well as the largescale industry in handling materials inside factories from one place to another. In the last days, the materials to be handled are more numerous and as production and demand increase, it strongly influences the transport of materials in desperate need of a vehicle to distribute, position the materials within the industry. AGVs are generally installed with wires at ground level and signals are transmitted through them to be controlled. Due to the emergence of the AGV, the workload of the human being gradually decreased and the production efficiency increased. Thus, the need for an AGV has become more technologically important in the advanced robotic world. Normally, these systems are integrated into a global production system, where is a need to make direct changes in the design and planning of the floor store to get most of them. But in the rapidly changing production system and the adaptable floor store, the implementation of AGV has become very important and difficult, because it depends on many systems, such as wires, frequency, total production, etc. Therefore, it is necessary to develop an independent AGV, which can operate on its own and make decisions based on changes in the environment.","PeriodicalId":30888,"journal":{"name":"Carpathian Journal of Electronic and Computer Engineering","volume":"12 1","pages":"41 - 49"},"PeriodicalIF":0.0,"publicationDate":"2019-11-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"46360219","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 10

Characterization of Novel 8T SRAM with Low Leakage and Optimized Area 新型低泄漏、优化面积8T SRAM的表征

Carpathian Journal of Electronic and Computer Engineering Pub Date : 2019-09-01 DOI: 10.2478/cjece-2019-0006

Kazi Fatima Sharif, S. Biswas

引用次数: 3