Proceedings of the 47th International Conference on Parallel Processing最新文献_第8页

Optimization of the Spherical Harmonics Transform based Tree Traversals in the Helmholtz FMM Algorithm Helmholtz FMM算法中基于球面谐波变换的树遍历优化

Proceedings of the 47th International Conference on Parallel Processing Pub Date : 2018-08-13 DOI: 10.1145/3225058.3225147

Michael P. Lingg, S. Hughey, H. Aktulga

引用次数: 1

Optimizing for KNL Usage Modes When Data Doesn't Fit in MCDRAM 数据不适合MCDRAM时KNL使用模式的优化

Proceedings of the 47th International Conference on Parallel Processing Pub Date : 2018-08-13 DOI: 10.1145/3225058.3225116

Neil A. Butcher, Stephen L. Olivier, Jonathan W. Berry, S. Hammond, P. Kogge

引用次数: 11

GLP4NN

Proceedings of the 47th International Conference on Parallel Processing Pub Date : 2018-08-13 DOI: 10.1145/3225058.3225077

Hao Fu, Shanjian Tang, B. He, Ce Yu, Ji-zhou Sun

引用次数: 4

An Empirical Comparison of k-Shortest Simple Path Algorithms on Multicores 多核上k-最短简单路径算法的经验比较

Proceedings of the 47th International Conference on Parallel Processing Pub Date : 2018-08-13 DOI: 10.1145/3225058.3225075

Deepak Ajwani, Erika Duriakova, N. Hurley, U. Meyer, A. Schickedanz

{"title":"An Empirical Comparison of k-Shortest Simple Path Algorithms on Multicores","authors":"Deepak Ajwani, Erika Duriakova, N. Hurley, U. Meyer, A. Schickedanz","doi":"10.1145/3225058.3225075","DOIUrl":"https://doi.org/10.1145/3225058.3225075","url":null,"abstract":"We consider the loop less k-shortest path (KSP) problem. Although this problem has been studied in the sequential setting for at least the last two decades, no good parallel implementations are known. In this paper, we provide (i) a first systematic empirical comparison of various KSP algorithms and heuristic optimisations, (ii) carefully engineer various parallel implementations of these sequential algorithms and (iii) perform an extensive study of these parallel implementations on a range of graph classes and multicore architectures to determine the best algorithm and parallelization strategy for different graph classes. We find that even though the worst-case complexity of the best undirected KSP algorithm O(k(m + n log n)) is significantly better than that of the popular and considerably simpler directed KSP algorithm O(kn(m + n log n)), the two algorithms are fairly competitive in terms of their empirical performance on small diameter graphs. Furthermore, we show that a few simple optimisations help to bridge the gap between these KSP algorithms even more. However, on moderate to large diameter graphs, the undirected KSP algorithm is considerably faster than the directed algorithms, both in sequential and parallel settings. In terms of the parallelisation strategy, simply replacing the shortest path subroutine by parallel Δ-stepping algorithm can provide a good speed-up for many KSP algorithms on random graphs. In contrast, for graphs with skewed degree distribution, a more complex strategy of parallelizing the different deviations and then parallelizing the shortest path computation inside the deviations with the remaining threads, provides a better performance.","PeriodicalId":307809,"journal":{"name":"Proceedings of the 47th International Conference on Parallel Processing","volume":"113 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-08-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133593207","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 5

Joint Optimization of MapReduce Scheduling and Network Policy in Hierarchical Clouds 分层云中MapReduce调度与网络策略的联合优化

Proceedings of the 47th International Conference on Parallel Processing Pub Date : 2018-08-13 DOI: 10.1145/3225058.3225099

Donglin Yang, Wei Rang, Dazhao Cheng

{"title":"Joint Optimization of MapReduce Scheduling and Network Policy in Hierarchical Clouds","authors":"Donglin Yang, Wei Rang, Dazhao Cheng","doi":"10.1145/3225058.3225099","DOIUrl":"https://doi.org/10.1145/3225058.3225099","url":null,"abstract":"As MapReduce is becoming increasingly popular in large-scale data analysis, there is a growing need for moving MapReduce into multi-tenant clouds. However, there is an important challenge that the performance of MapReduce applications can be significantly influenced by the time-varying network bandwidth in a shared cluster. Although a few recent studies improve MapReduce performance by dynamic scheduling to reduce the shuffle traffic, most of them do not consider the impact by widely existing hierarchical network architectures in data centers. In this paper, we propose and design a Hierarchical topology (Hit) aware MapReduce scheduler to minimize overall data traffic cost and hence to reduce job execution time. We first formulate the problem as a Topology Aware Assignment (TAA) optimization problem while considering dynamic computing and communication resources in the cloud with hierarchical network architecture. We further develop a synergistic strategy to solve the TAA problem by using the stable matching theory, which ensures the preference of both individual tasks and hosting machines. Finally, we implement the proposed scheduler as a pluggable module on Hadoop YARN and evaluate its performance by testbed experiments and simulations. The experimental results show Hit-scheduler can improve job completion time by 28% and 11% compared to Capacity Scheduler and Probabilistic Network-Aware scheduler, respectively. Our simulations further demonstrate that Hit-scheduler can gain the traffic cost by 38% at most and improve the average shuffle flow traffic time by 32% compared to Capacity scheduler.","PeriodicalId":307809,"journal":{"name":"Proceedings of the 47th International Conference on Parallel Processing","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-08-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127074624","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 5

MND-MST: A Multi-Node Multi-Device Parallel Boruvka's MST Algorithm MND-MST:一种多节点多设备并行Boruvka的MST算法

Proceedings of the 47th International Conference on Parallel Processing Pub Date : 2018-08-13 DOI: 10.1145/3225058.3225146

Rintu Panja, Sathish S. Vadhiyar

{"title":"MND-MST: A Multi-Node Multi-Device Parallel Boruvka's MST Algorithm","authors":"Rintu Panja, Sathish S. Vadhiyar","doi":"10.1145/3225058.3225146","DOIUrl":"https://doi.org/10.1145/3225058.3225146","url":null,"abstract":"Efficient processing of large-scale graph applications on heterogeneous CPU-GPU systems require effectively harnessing the combined power of both the CPU and GPU devices. Finding minimum spanning tree (MST) is an important graph application and is used in different domains. When applying MST algorithms for large-scale graphs across multiple nodes (or machines), the existing approaches use BSP (bulk synchronous parallel) model involving large-scale communications. In this paper, we propose a multi-node multi-device algorithm for MST, MND-MST, that uses a divide-and-conquer approach by partitioning the input graph across multiple nodes and devices and performing independent Boruvka's MST computations on the devices. The results from the different nodes are merged using a novel hybrid merging algorithm that ensures that the combined results on a node never exceeds it memory capacity. The algorithm also simultaneously harnesses both CPU and GPU devices. In our experiments, we show that our proposed algorithm shows 24-88% performance improvements over an existing BSP approach. We also show that the algorithm exhibits almost linear scalability, and the use of GPUs result in upto 23% improvement in performance over multi-node CPU-only performance.","PeriodicalId":307809,"journal":{"name":"Proceedings of the 47th International Conference on Parallel Processing","volume":"110 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-08-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134590381","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 8

Varbench

Proceedings of the 47th International Conference on Parallel Processing Pub Date : 2018-08-13 DOI: 10.1145/3225058.3225125

Brian Kocoloski, John Lange

引用次数: 1

CAMPS: Conflict-Aware Memory-Side Prefetching Scheme for Hybrid Memory Cube 阵营:混合内存立方体的冲突感知内存端预取方案

Proceedings of the 47th International Conference on Parallel Processing Pub Date : 2018-08-13 DOI: 10.1145/3225058.3225112

M. M. Rafique, Zhichun Zhu

{"title":"CAMPS: Conflict-Aware Memory-Side Prefetching Scheme for Hybrid Memory Cube","authors":"M. M. Rafique, Zhichun Zhu","doi":"10.1145/3225058.3225112","DOIUrl":"https://doi.org/10.1145/3225058.3225112","url":null,"abstract":"Prefetching is a well-studied technique where data is fetched from main memory ahead of time speculatively and stored in caches or dedicated prefetch buffer. With the introduction of Hybrid Memory Cube (HMC), a 3-D memory module with multiple memory layers stacked over a single logic layer using thousands of Through Silicon Vias (TSVs), huge internal bandwidth availability makes memory-side prefetching a more efficient approach to improving system performance. In this paper, we introduce a memory-side prefetching scheme for HMC based main memory system that utilizes its logic area and exploits the huge internal bandwidth provided by TSVs. Our scheme closely monitors the access pattern to memory banks and make intelligent prefetch decisions for rows with high utilization or causing row buffer conflicts. We also introduce a prefetch buffer management scheme that makes replacement decision within the prefetch buffer based on both the utilization and recency of the prefetched rows. Our simulation results indicate that our approach improves performance by 17.9% on average, compared to a baseline scheme that prefetches a whole row on every memory request. Our scheme also outperforms an existing memory-side prefetching scheme by 8.7% on average, which dynamically adjusts the prefetch degree based on the usefulness of prefetched data. In this sample-structured document, neither the cross-linking of float elements and bibliography nor metadata/copyright information is available. The sample document is provided in \"Draft\" mode and to view it in the final layout format, applying the required template is essential with some standard steps.","PeriodicalId":307809,"journal":{"name":"Proceedings of the 47th International Conference on Parallel Processing","volume":"30 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-08-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122706408","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 7

CSTF

Proceedings of the 47th International Conference on Parallel Processing Pub Date : 2018-08-13 DOI: 10.1145/3225058.3225133

Zachary Blanco, Bangtian Liu, M. Dehnavi

{"title":"CSTF","authors":"Zachary Blanco, Bangtian Liu, M. Dehnavi","doi":"10.1145/3225058.3225133","DOIUrl":"https://doi.org/10.1145/3225058.3225133","url":null,"abstract":"Tensors, or N-dimensional arrays, are increasingly used to represent multi-dimensional data. Sparse tensor decomposition algorithms are of particular interest in analyzing and compressing big datasets due to the fact that most of real-world data is sparse and multi-dimensional. However, state-of-the-art tensor decomposition algorithms are not scalable for overwhelmingly large and higher-order sparse tensors on distributed platforms. In this paper, we use the MapReduce model and the Spark engine to implement tensor factorizations on distributed platforms. The proposed CSTF algorithm, Cloud-based Sparse Tensor Factorization, is a scalable distributed algorithm for tensor decompositions for large data. It uses the coordinate storage format (COO) to operate on the tensor nonzeros directly, thus, eliminating the need for tensor unfolding and the storage of intermediate data. Also, a novel queuing strategy (QCOO) is proposed to exploit the dependency and data reuse between a sequence of tensor operations in tensor decomposition algorithms. Details on the key-value storage paradigm and Spark features used to implement the algorithm and the data reuse strategies are also provided. The queuing strategy reduces data communication costs by 35% for 3rd-order tensors and by 31% for 4th-order tensors over the COO-based implementation respectively. Compared to the state-of-the-art work, BIGtensor, CSTF achieves 2.2× to 6.9× speedup for 3rd-order tensor decompositions.","PeriodicalId":307809,"journal":{"name":"Proceedings of the 47th International Conference on Parallel Processing","volume":"17 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-08-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121927858","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 15

SPECTR: Scalable Parallel Short Read Error Correction on Multi-core and Many-core Architectures spectrr:多核和多核架构上的可扩展并行短读纠错

Proceedings of the 47th International Conference on Parallel Processing Pub Date : 2018-08-13 DOI: 10.1145/3225058.3225060

Kai Xu, Robin Kobus, Yuandong Chan, Ping Gao, Xiangxu Meng, Yanjie Wei, B. Schmidt, Weiguo Liu

{"title":"SPECTR: Scalable Parallel Short Read Error Correction on Multi-core and Many-core Architectures","authors":"Kai Xu, Robin Kobus, Yuandong Chan, Ping Gao, Xiangxu Meng, Yanjie Wei, B. Schmidt, Weiguo Liu","doi":"10.1145/3225058.3225060","DOIUrl":"https://doi.org/10.1145/3225058.3225060","url":null,"abstract":"Modern high throughput sequencing platforms can produce large amounts of short read DNA data at low cost. Error correction is an important but time-consuming initial step when processing this data in order to improve the quality of downstream analyses. In this paper, we present a Scalable Parallel Error CorrecToR designed to improve the throughput of DNA error correction for Illumina reads on various parallel platforms. Our design is based on a k-spectrum approach where a Bloom filter is frequently probed as a key operation and is optimized towards AVX-512-based multi-core CPUs, Xeon Phi many-cores (both KNC and KNL), and heterogeneous compute clusters. A number of architecture-specific optimizations are employed to achieve high performance such as memory alignment, vectorized Bloom filter probing, and a stack-based iteration to eliminate recursion. Our experiments show that our optimizations result in speedups of up to 2.8, 5.2, and 9.3 on a CPU (Xeon W-2123), a KNC-based Xeon Phi (31S1P), and a KNL-based Xeon Phi (7210), respectively, compared to a multi-threaded CPU reference implementation for the error correction stage. Furthermore, when executed on the same hardware, SPECTR achieves a speedup of up to 1.7, 2.1, 2.4, and 6.4, compared to the state-of-the-art tools Lighter, BLESS2, RECKONER, and Musket, respectively. In addition, our MPI implementation exhibits an efficiency of around 86% when executed on 32 nodes of the Tianhe-2 supercomputer. SPECTR is available at https://github.com/Xu-Kai/SPECTR.","PeriodicalId":307809,"journal":{"name":"Proceedings of the 47th International Conference on Parallel Processing","volume":"25 4 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-08-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132086879","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 1