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DDR3 based lookup circuit for high-performance network processing 基于DDR3的查找电路，用于高性能网络处理
2009 IEEE International SOC Conference (SOCC) Pub Date : 2009-09-01 DOI: 10.1109/SOCCON.2009.5398024
Xin Yang, S. Sezer, J. McCanny, D. Burns
{"title":"DDR3 based lookup circuit for high-performance network processing","authors":"Xin Yang, S. Sezer, J. McCanny, D. Burns","doi":"10.1109/SOCCON.2009.5398024","DOIUrl":"https://doi.org/10.1109/SOCCON.2009.5398024","url":null,"abstract":"Double Data Rate (DDR) SDRAMs have been prevalent in the PC memory market in recent years and are widely used for networking systems. These memory devices are rapidly developing, with high density, high memory bandwidth and low device cost. However, because of the high-speed interface technology and complex instruction-based memory access control, a specific purpose memory controller is necessary for optimizing the memory access trade off. In this paper, a specific purpose DDR3 controller for high-performance table lookup is proposed and a corresponding lookup circuit based on the Hash-CAM approach is presented.","PeriodicalId":303505,"journal":{"name":"2009 IEEE International SOC Conference (SOCC)","volume":"102 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127123819","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 7
High-speed, energy-efficient 2-cycle Multiply-Accumulate architecture 高速、节能的2循环乘法-累积架构
2009 IEEE International SOC Conference (SOCC) Pub Date : 2009-09-01 DOI: 10.1109/SOCCON.2009.5398079
T. Hoang, Magnus Själander, P. Larsson-Edefors
{"title":"High-speed, energy-efficient 2-cycle Multiply-Accumulate architecture","authors":"T. Hoang, Magnus Själander, P. Larsson-Edefors","doi":"10.1109/SOCCON.2009.5398079","DOIUrl":"https://doi.org/10.1109/SOCCON.2009.5398079","url":null,"abstract":"We propose a high-speed and energy-efficient 2-cycle multiply-accumulate (MAC) architecture. Our architecture is based on two's complement representation, it uses guarding bits to efficiently support longer MAC loops, and it includes output saturation. By performing carry propagation only in the second stage of the MAC pipeline, multiplication and accumulation have similar delays. But in contrast to previous MAC architectures that propose to only use one carry-propagation stage, our architecture requires no extra cycles to produce the final result. Instead it correctly produces the sum of the accumulated value and the product in each cycle. Our place-and-route evaluation shows that the proposed architecture, averaged across several operand sizes, offers a 33% improvement in speed and a 37% reduction of energy over a conventional 2-cycle MAC architecture.","PeriodicalId":303505,"journal":{"name":"2009 IEEE International SOC Conference (SOCC)","volume":"9 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127857626","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 14
54–65 GHz six port demodulator 54-65 GHz六端口解调器
2009 IEEE International SOC Conference (SOCC) Pub Date : 2009-09-01 DOI: 10.1109/SOCCON.2009.5398077
V. Fusco, C. Wang
{"title":"54–65 GHz six port demodulator","authors":"V. Fusco, C. Wang","doi":"10.1109/SOCCON.2009.5398077","DOIUrl":"https://doi.org/10.1109/SOCCON.2009.5398077","url":null,"abstract":"A V-band radio demodulator architecture based on a six port receiver MMIC is presented. The six port is designed to cover the entire frequency band allocation for the forthcoming 57–65GHz broadband wireless communication system and permits homodyne or heterodyne detection of QPSK/QAM signals.","PeriodicalId":303505,"journal":{"name":"2009 IEEE International SOC Conference (SOCC)","volume":"19 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116819574","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Comparative reliability analysis between AMBA and network-on-chip: An MPEG-2 case study AMBA与片上网络的可靠性比较分析:以MPEG-2为例
2009 IEEE International SOC Conference (SOCC) Pub Date : 2009-04-27 DOI: 10.1109/soccon.2009.5398047
R. Shafik, B. Al-Hashimi
{"title":"Comparative reliability analysis between AMBA and network-on-chip: An MPEG-2 case study","authors":"R. Shafik, B. Al-Hashimi","doi":"10.1109/soccon.2009.5398047","DOIUrl":"https://doi.org/10.1109/soccon.2009.5398047","url":null,"abstract":"We present comparative reliability analysis between shared-bus AMBA and network-on-chip (NoC) in the presence of single-event upsets (SEUs) using MPEG-2 video decoder as a case study. Employing SystemC-based cycle-accurate fault simulations, we investigate how the decoder reliability is affected when SEUs are injected into the computation cores and communication interconnects of the decoder. We show that for a given soft error rate, AMBA-based decoder experiences higher SEUs during computation due to higher execution time. On the other hand, NoC-based decoder experiences higher SEUs during inter-core communication due to higher channel latency and resource usage in the interconnects. Furthermore, we evaluate the impact of total SEUs at application-level for NoC- and AMBA-based decoders.","PeriodicalId":303505,"journal":{"name":"2009 IEEE International SOC Conference (SOCC)","volume":"131 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-04-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115663149","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
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