[1991] Digest of Papers. Fault-Tolerant Computing: The Twenty-First International Symposium最新文献

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Signature analysis with modified linear feedback shift registers (M-LFSRs) 改进线性反馈移位寄存器(M-LFSRs)的特征分析
R. Raina, P. Marinos
{"title":"Signature analysis with modified linear feedback shift registers (M-LFSRs)","authors":"R. Raina, P. Marinos","doi":"10.1109/FTCS.1991.146639","DOIUrl":"https://doi.org/10.1109/FTCS.1991.146639","url":null,"abstract":"A signature analysis technique that uses modified linear feedback shift registers (LFSRs) is presented. It is demonstrated that the modified-LFSR-based analyzers can be designed with significantly lower aliasing probability compared to conventional LFSRs of the same size. The methodology for their design is described. Analytic expressions for their aliasing probability, hardware requirements, and the average tet-time overhead are obtained and experimentally verified. Studies using several circuit-under-test responses corroborate the improvement in the aliasing probability for the same hardware (or reduction in hardware for the same aliasing probability) when the modified LFSRs are used. The extra test-time required by the modified LFSRs is found to be nominal (<5%) in a majority of instances.<<ETX>>","PeriodicalId":300397,"journal":{"name":"[1991] Digest of Papers. Fault-Tolerant Computing: The Twenty-First International Symposium","volume":"3 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1991-06-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124963509","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 12
Bounds on signature analysis aliasing for random testing 随机测试中特征分析混叠的边界
N. Saxena, P. Franco, E. McCluskey
{"title":"Bounds on signature analysis aliasing for random testing","authors":"N. Saxena, P. Franco, E. McCluskey","doi":"10.1109/FTCS.1991.146641","DOIUrl":"https://doi.org/10.1109/FTCS.1991.146641","url":null,"abstract":"Simple bounds on the aliasing probability for serial signature analysis are presented. To motivate the study, it is shown that calculation of exact aliasing is NP-hard and that coding theory does not necessarily help. It is shown that the aliasing probability is bounded above by 2/(L+2) for test lengths L less than the period, L/sub c/, of the signature polynomials; for test lengths L that are multiples of L/sub c/, the aliasing probability is bounded above by 1; and, for test lengths L greater than L/sub c/ and not a multiple of L/sub c/, the aliasing probability is bounded above by 2/(L/sub c/+1). These simple bounds avoid any exponential complexity associated with the exact computation of the aliasing probability. Simple bounds also apply to signature analysis based on any linear finite state machine (including linear cellular automata).<<ETX>>","PeriodicalId":300397,"journal":{"name":"[1991] Digest of Papers. Fault-Tolerant Computing: The Twenty-First International Symposium","volume":"89 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1991-06-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126499353","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 8
Design of multiprocessor systems for concurrent error detection and fault diagnosis 多处理器并发错误检测与故障诊断系统设计
B. Vinnakota, N. Jha
{"title":"Design of multiprocessor systems for concurrent error detection and fault diagnosis","authors":"B. Vinnakota, N. Jha","doi":"10.1109/FTCS.1991.146708","DOIUrl":"https://doi.org/10.1109/FTCS.1991.146708","url":null,"abstract":"Results on the design of systems using algorithm-based fault tolerance (ABFT), a low-overhead fault tolerance scheme for high-speed parallel processing systems, are presented. Bounds on the diagnosability of the system and the number of checks needed to design a unit system of given capability are derived. A procedure for forming the target fault-tolerant system from the unit system is introduced. The procedure is applicable to a wide range of systems in which processors may share data elements. The applications of the design scheme are illustrated through examples.<<ETX>>","PeriodicalId":300397,"journal":{"name":"[1991] Digest of Papers. Fault-Tolerant Computing: The Twenty-First International Symposium","volume":"15 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1991-06-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124647087","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 17
Gracefully degradable disk arrays 可优雅降解的磁盘阵列
A. Reddy, P. Banerjee
{"title":"Gracefully degradable disk arrays","authors":"A. Reddy, P. Banerjee","doi":"10.1109/FTCS.1991.146692","DOIUrl":"https://doi.org/10.1109/FTCS.1991.146692","url":null,"abstract":"The problem of designing fault-tolerant disk arrays that are not susceptible to 100% load increases on the functional disks when one of the disks in the system fails is addressed. A technique that combines the advantages of parity schemes and the traditional dual copy methods and offers a wide variety of options in providing fault-tolerance is proposed. A theoretical framework for solving the problem is presented and a number of constructive techniques are proposed. By utilizing the same amount of hardware as the earlier methods but with a better data organization and a different reconstruction technique, the system yields better performance during a failure. Merging two parity groups as a reconfiguration strategy is shown to have a number of benefits, such as reduced hardware overhead and improved reliability. A combination of block designs and the proposed reconfiguration strategy results in a highly reliable disk array with the same or less overhead as the earlier approaches and better performance during a failure.<<ETX>>","PeriodicalId":300397,"journal":{"name":"[1991] Digest of Papers. Fault-Tolerant Computing: The Twenty-First International Symposium","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1991-06-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128881967","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 37
An experimental study on software structural testing: deterministic versus random input generation 软件结构测试的实验研究:确定性与随机输入生成
P. Thévenod-Fosse, H. Waeselynck, Y. Crouzet
{"title":"An experimental study on software structural testing: deterministic versus random input generation","authors":"P. Thévenod-Fosse, H. Waeselynck, Y. Crouzet","doi":"10.1109/FTCS.1991.146694","DOIUrl":"https://doi.org/10.1109/FTCS.1991.146694","url":null,"abstract":"The fault revealing power of different test patterns derived from ten structural test criteria currently referred to in unit testing is investigated. Experiments performed on four programs that are pieces of a real-life software system from the nuclear field are reported. Three test input generation techniques are studied: (1) deterministic choice, (2) random selection based on an input probability distribution determined according to the adopted structural test criterion, and (3) random selection from a uniform distribution on the input domain. Mutation analysis is used to assess the test set efficiency with respect to error detection. The experimental results involve a total of 2914 mutants. They show that structural statistical testing, which exhibits the highest mutation scores, leaving alive only six from 2816 nonequivalent mutants within short testing times, is the most efficient. A regards unit testing of programs whose structure remains tractable, the experiments show the adequacy of a fault removal strategy combining statistical and deterministic test patterns.<<ETX>>","PeriodicalId":300397,"journal":{"name":"[1991] Digest of Papers. Fault-Tolerant Computing: The Twenty-First International Symposium","volume":"34 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1991-06-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128345735","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 67
System level diagnosis: Combining detection and location 系统级诊断:检测与定位相结合
N. Vaidya, D. Pradhan
{"title":"System level diagnosis: Combining detection and location","authors":"N. Vaidya, D. Pradhan","doi":"10.1109/FTCS.1991.146706","DOIUrl":"https://doi.org/10.1109/FTCS.1991.146706","url":null,"abstract":"The problem of system recovery from a large number of faults is addressed. Correlated transient upsets can corrupt the state of a large number of nodes (subsystems). In such a condition, locating faulty nodes can be difficult due to the large number of periodic tests that may have to be carried out. A new approach to system level diagnostics that combines fault detection and location and can detect the fault condition in the event of large number of faults is proposed. Detection allows alternate techniques of diagnosis or at the very least a safe shut-down. This approach is termed safe diagnosis as it provides a measure of safety for critical systems. It is demonstrated that safe diagnosis can be achieved with a small incremental cost. Results that characterize systems that admit a specified level of safe diagnosis are included. Diagnosis algorithms for such systems are presented. It is shown that the complexity of safe diagnosis algorithms is comparable to the diagnosis algorithms for systems performing only fault location.<<ETX>>","PeriodicalId":300397,"journal":{"name":"[1991] Digest of Papers. Fault-Tolerant Computing: The Twenty-First International Symposium","volume":"42 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1991-06-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132969047","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 10
The UCLA mirror processor: a building block for self-checking self-repairing computing nodes 加州大学洛杉矶分校镜像处理器:用于自检自修复计算节点的构建块
Y. Tamir, M. Liang, T. Lai, M. Tremblay
{"title":"The UCLA mirror processor: a building block for self-checking self-repairing computing nodes","authors":"Y. Tamir, M. Liang, T. Lai, M. Tremblay","doi":"10.1109/FTCS.1991.146658","DOIUrl":"https://doi.org/10.1109/FTCS.1991.146658","url":null,"abstract":"The design and implementation of a RISC microprocessor, called the UCLA mirror processor, which is capable of micro rollback, are reported. Two mirror processors operating in lock step achieve concurrent error detection by comparing external signals and a signature of internal signals every clock cycle. A mismatch causes both processors to roll back to the beginning of the cycle in which the error occurred. In some cases an erroneous state is corrected by copying a value from the fault-free processor to the faulty processor. The architecture, microarchitecture, and VLSI implementation of the mirror processor, with an emphasis on its error-detection and error-recovery capabilities, are described. The overhead and design issues encountered are evaluated. It is shown that micro rollback can be implemented in a practical VLSI chip and is a practical technique for minimizing the latencies normally associated with concurrent error detection.<<ETX>>","PeriodicalId":300397,"journal":{"name":"[1991] Digest of Papers. Fault-Tolerant Computing: The Twenty-First International Symposium","volume":"61 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1991-06-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115513106","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 25
Cost effectiveness analysis of different fault tolerance strategies for hypercube systems 超立方体系统不同容错策略的成本效益分析
V. Grassi
{"title":"Cost effectiveness analysis of different fault tolerance strategies for hypercube systems","authors":"V. Grassi","doi":"10.1109/FTCS.1991.146661","DOIUrl":"https://doi.org/10.1109/FTCS.1991.146661","url":null,"abstract":"A general model of a multicomputer system is presented, and an index is calculated for measuring its performance. Since the index depends on the average internode distance, recursive expressions for the evaluation of this distance are derived. A cost-effectiveness figure of merit is defined on the basis of a performability model that uses the performance index. The figure of merit is used to compare the cost effectiveness of two different strategies, the degradable hypercube and the nondegradable hypercube. The fault model adopted is based on the assumption of partial node failure (loss of the main processor but not of the communication coprocessor). Under this assumption, the result suggests that the degradable hypercube strategy is more cost effective.<<ETX>>","PeriodicalId":300397,"journal":{"name":"[1991] Digest of Papers. Fault-Tolerant Computing: The Twenty-First International Symposium","volume":"37 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1991-06-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124910793","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
Multiple fault analysis using a fault dropping technique 基于故障下降技术的多故障分析
A. Verreault, E. Aboulhamid, Y. Karkouri
{"title":"Multiple fault analysis using a fault dropping technique","authors":"A. Verreault, E. Aboulhamid, Y. Karkouri","doi":"10.1109/FTCS.1991.146656","DOIUrl":"https://doi.org/10.1109/FTCS.1991.146656","url":null,"abstract":"A method for analyzing multiple faults in gate-level combinational circuits that does not explicitly enumerate all the multiple stuck-at faults that may be present in a circuit is presented. First, a fault collapsing phase is applied to the network, so that equivalent faults are eliminated. During the analysis, frontier faults where there is at least a normal path from each faulty line to a primary output are considered. It is shown that the set of frontier faults is equivalent to the set of multiple faults. Given an input vector, the normal circuit is evaluated and the fault effects propagated. A fault dropping procedure is then applied to eliminate faulty conditions on specific lines that are either absent or permanently masked by other faulty conditions. The method is applied to some benchmark circuits, and significant speedup is observed.<<ETX>>","PeriodicalId":300397,"journal":{"name":"[1991] Digest of Papers. Fault-Tolerant Computing: The Twenty-First International Symposium","volume":"42 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1991-06-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116467943","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 12
Software defects and their impact on system availability-a study of field failures in operating systems 软件缺陷及其对系统可用性的影响——对操作系统现场故障的研究
M. Sullivan, R. Chillarege
{"title":"Software defects and their impact on system availability-a study of field failures in operating systems","authors":"M. Sullivan, R. Chillarege","doi":"10.1109/FTCS.1991.146625","DOIUrl":"https://doi.org/10.1109/FTCS.1991.146625","url":null,"abstract":"Defects reported between 1986 and 1989 in the MVS operating system are studied in order to gain the insight needed to provide a clear strategy for avoiding or tolerating them. Typical defects (regular) are compared to those that corrupt a program's memory (overlay), given that overlays are considered by field services to be particularly hard to find and fix. It is shown that the impact of an overlay defect is, on average, much higher than that of a regular defect, that boundary conditions and allocation management are the major causes of overlay defects, not timing, and that most overlays are small and corrupt data near the data that the programmer meant to update. Further analysis is provided on defects in fixes to other defects, failure symptoms, and the impact of defects on customers.<<ETX>>","PeriodicalId":300397,"journal":{"name":"[1991] Digest of Papers. Fault-Tolerant Computing: The Twenty-First International Symposium","volume":"300 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1991-06-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132767200","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 398
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