14th IEEE Symposium on High-Performance Interconnects (HOTI'06)最新文献

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Network I/O Acceleration in Heterogeneous Multicore Processors 异构多核处理器中的网络I/O加速
14th IEEE Symposium on High-Performance Interconnects (HOTI'06) Pub Date : 2006-08-23 DOI: 10.1109/HOTI.2006.20
Ben Wun, P. Crowley
{"title":"Network I/O Acceleration in Heterogeneous Multicore Processors","authors":"Ben Wun, P. Crowley","doi":"10.1109/HOTI.2006.20","DOIUrl":"https://doi.org/10.1109/HOTI.2006.20","url":null,"abstract":"Chip multiprocessor (CMP) architectures are fast becoming the dominant design for general purpose processors. Whereas current generation server and desktop processors use homogenous CMP architectures, network processors (NPs) have used heterogeneous CMP architectures for years. At the same time, the failure of network stacks in traditional processors to scale with increased network bandwidths has spawned numerous proposals for new approaches to accelerate network processing. This paper looks at moving network stack processing from the main CPU to a series of smaller, closely coupled, and more efficient processors in a heterogeneous CMP by implementing such an architecture on an Intel IXP network processor. Our experiments show that the close coupling and flexible nature of the IXP's microengines allow them to greatly accelerate network processing for a small cost in area","PeriodicalId":288349,"journal":{"name":"14th IEEE Symposium on High-Performance Interconnects (HOTI'06)","volume":"17 7 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-08-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131803846","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 22
Memory Scalability Evaluation of the Next-Generation Intel Bensley Platform with InfiniBand 基于InfiniBand的下一代Intel Bensley平台内存可扩展性评估
14th IEEE Symposium on High-Performance Interconnects (HOTI'06) Pub Date : 2006-08-23 DOI: 10.1109/HOTI.2006.19
Matthew J. Koop, Wei Huang, Abhinav Vishnu, D. Panda
{"title":"Memory Scalability Evaluation of the Next-Generation Intel Bensley Platform with InfiniBand","authors":"Matthew J. Koop, Wei Huang, Abhinav Vishnu, D. Panda","doi":"10.1109/HOTI.2006.19","DOIUrl":"https://doi.org/10.1109/HOTI.2006.19","url":null,"abstract":"As multi-core systems gain popularity for their increased computing power at low-cost, the rest of the architecture must be kept in balance, such as the memory subsystem. Many existing memory subsystems can suffer from scalability issues and show memory performance degradation with more than one process running. To address these scalability issues, fully-buffered DIMMs have recently been introduced. In this paper we present an initial performance evaluation of the next-generation multi-core Intel platform by evaluating the FB-DIMM-based memory subsystem and the associated InfiniBand performance. To the best of our knowledge this is the first such study of Intel multi-core platforms with multi-rail InfiniBand DDR configurations. We provide an evaluation of the current-generation Intel Lindenhurst platform as a reference point. We find that the Intel Bensley platform can provide memory scalability to support memory accesses by multiple processes on the same machine as well as drastically improved inter-node throughput over InfiniBand. On the Bensley platform we observe a 1.85 times increase in aggregate write bandwidth over the Lindenhurst platform. For inter-node MPI-level benchmarks we show bi-directional bandwidth of over 4.55 GB/sec for the Bensley platform using 2 DDR InfiniBand host channel adapters (HCAs), an improvement of 77% over the current generation Lindenhurst platform. The Bensley system is also able to achieve a throughput of 3.12 million MPI messages/sec in the above configuration","PeriodicalId":288349,"journal":{"name":"14th IEEE Symposium on High-Performance Interconnects (HOTI'06)","volume":"95 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-08-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132284442","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 9
Buffer Management for Lossless Service in Network Processors 网络处理器中无损服务的缓冲区管理
14th IEEE Symposium on High-Performance Interconnects (HOTI'06) Pub Date : 2006-08-23 DOI: 10.1109/HOTI.2006.10
Deng Pan, Yuanyuan Yang
{"title":"Buffer Management for Lossless Service in Network Processors","authors":"Deng Pan, Yuanyuan Yang","doi":"10.1109/HOTI.2006.10","DOIUrl":"https://doi.org/10.1109/HOTI.2006.10","url":null,"abstract":"Fair scheduling and buffer management are two typical approaches to providing differentiated service. Fair scheduling algorithms usually need to keep a separate queue and maintain associated state variables for each incoming flow, which make them difficult to operate and scale in high speed networks. On the contrary, buffer management and FIFO scheduling need only a constant amount of state information and processing, and can be efficiently implemented. In this paper, we consider using buffer management to provide lossless service for guaranteed performance flows in network processors. We investigate the buffer size requirement and buffer allocation strategies by starting with the single output network processor and then extending the analytical results to the general multiple output network processor. A universally applicable buffer allocation method for assuring lossless service is obtained, and the correctness of the theoretical results is verified through simulations","PeriodicalId":288349,"journal":{"name":"14th IEEE Symposium on High-Performance Interconnects (HOTI'06)","volume":"104 11-12","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-08-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132707932","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Tutorial II
14th IEEE Symposium on High-Performance Interconnects (HOTI'06) Pub Date : 1900-01-01 DOI: 10.1109/hoti.2006.27
C. Pham
{"title":"Tutorial II","authors":"C. Pham","doi":"10.1109/hoti.2006.27","DOIUrl":"https://doi.org/10.1109/hoti.2006.27","url":null,"abstract":"Description: Internet technologies are used daily by millions of people worldwide for communication, work or even entertainment. The Internet has very rapidly become part of the scientist's life for exchanging information, first with e-mail, and then with the World Wide Web (WWW) which has truly revolutionized the way the scientific community is cooperating. Since the WWW revolution in 1993, we are now at the dawn of a new revolution consisting in using the Internet/Web infrastructure for complex problem solving and for more cooperation in a large variety of Computational Sciences. This talk will briefly present the emerging computational grid technologies and infrastructures, and then focuses on the new Internet technologies such as DiffServ, MPLS, Multicast and Overlay networks, Active networking and high performance transport protocols; that will be very soon released for providing high-bandwidth, secure and ubiquitous connectivity for a new era of scientific applications. Besides presenting in a didactic manner how these new technologies work, examples will be given throughout the tutorial to show how these new technologies could be deployed and used on grid or web-based infrastructures.","PeriodicalId":288349,"journal":{"name":"14th IEEE Symposium on High-Performance Interconnects (HOTI'06)","volume":"18 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"117013535","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Tutorial IV 教程第四
14th IEEE Symposium on High-Performance Interconnects (HOTI'06) Pub Date : 1900-01-01 DOI: 10.1109/hoti.2006.29
Wes Doonan
{"title":"Tutorial IV","authors":"Wes Doonan","doi":"10.1109/hoti.2006.29","DOIUrl":"https://doi.org/10.1109/hoti.2006.29","url":null,"abstract":"Description: Ultra-high performance Grid Computing and Distributed Storage applications exhibit an ever-growing appetite for networking bandwidth. As these applications grow wider in scope, this appetite also expands outwards from the campus and into metro, regional and wide-area networks. At the same time, the cost of acquisition and deployment of multi-wavelength, multi-gigabit wide-area optical networks based on DWDM and Ethernet technologies are now within reach of many research and academic users. Finally, direct access to dark fiber and emerging interoperable data-plane standards are enabling direct, user managed interconnection of campus or metro optical networks. These parallel developments are finally making possible the establishment a rich collection of truly end-toend, dedicated multi-gigabit services essentially on-demand. The promise is great. However, how are these services to be provisioned, across disparate optical technologies, vendors, and administrative domains? What technologies exist to provision, monitor and account for such services? What does the operator of a regional optical network or Grid Computing cluster need to know in order to participate in the future interconnected optical network? This tutorial seeks to provide an in-depth treatment of the current state of the art in interoperable optical control plane technologies, the practical aspects of deploying such technologies in real networks, and a roadmap for future developments in optical control planes which are expected both in the near-term and on the more distant horizon. Protocols, technologies and concepts are presented in detail, as well as concrete examples of how such technologies can help the user, administrator and operator of Grid Computing facilities provision and monitor their campus, regional and wide-area optical networks.","PeriodicalId":288349,"journal":{"name":"14th IEEE Symposium on High-Performance Interconnects (HOTI'06)","volume":"10 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125929396","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
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