Proceedings of the 5th ACM international conference on Embedded software最新文献

Testing real-time embedded software using UPPAAL-TRON: an industrial case study 使用uppal - tron测试实时嵌入式软件:一个工业案例研究

Proceedings of the 5th ACM international conference on Embedded software Pub Date : 2005-09-18 DOI: 10.1145/1086228.1086283

K. Larsen, Marius Mikucionis, B. Nielsen, A. Skou

引用次数: 179

What will system level design be when it grows up? 系统关卡设计成熟后会是什么样子?

Proceedings of the 5th ACM international conference on Embedded software Pub Date : 2005-09-18 DOI: 10.1145/1086228.1086244

G. Martin, D. Gajski, D. Goodwin, P. Lysaght, P. Marwedel, M. Muller, J. Welser

引用次数: 0

A UML 2.0 profile for SystemC: toward high-level SoC design SystemC的UML 2.0概要文件:面向高级SoC设计

Proceedings of the 5th ACM international conference on Embedded software Pub Date : 2005-09-18 DOI: 10.1145/1086228.1086254

E. Riccobene, P. Scandurra, A. Rosti, S. Bocchio

引用次数: 48

Optimizing inter-processor data locality on embedded chip multiprocessors 在嵌入式芯片多处理器上优化处理器间数据位置

Proceedings of the 5th ACM international conference on Embedded software Pub Date : 2005-09-18 DOI: 10.1145/1086228.1086271

Guilin Chen, M. Kandemir

{"title":"Optimizing inter-processor data locality on embedded chip multiprocessors","authors":"Guilin Chen, M. Kandemir","doi":"10.1145/1086228.1086271","DOIUrl":"https://doi.org/10.1145/1086228.1086271","url":null,"abstract":"Recent research in embedded computing indicates that packing multiple processor cores on the same die is an effective way of utilizing the ever-increasing number of transistors. The advantage of placing multiple cores into a single die is that it reduces on-chip communication costs (in terms of both execution cycles and power consumption) between the processor cores that are traditionally very high in conventional high-performance parallel architectures (such as SMPs). However, on the negative side, this tighter integration exerts an even higher pressure on off-chip accesses to the memory system. This makes minimizing the number of off-chip accesses a critical optimization goal.This paper discusses a compiler-based solution to this problem for the embedded applications that perform stencil computations. An important characteristic of this solution is that it distinguishes between the intra-processor data reuse and inter-processor data reuse. The first of these captures the data reuse that occurs across loop iterations assigned to the same processor, whereas the second one represents the data reuse that takes place across the loop iterations assigned to different processors. The proposed approach then optimizes inter-processor reuse by re-organizing the loop iterations of each processor carefully, considering how data elements are shared across processors. The goal is to ensure that the different processors access the shared data within a short period of time, so that the data can be captured in the on-chip memory space at the time of the reuse. This paper also presents an evaluation of the proposed optimization and compares it to an alternate scheme that optimizes data locality for each processor in isolation. The results obtained by applying our implementation to eight loop-intensive benchmark codes from the embedded computing domain show that our approach improves over the mentioned alternate scheme by 15.6% on average.","PeriodicalId":284648,"journal":{"name":"Proceedings of the 5th ACM international conference on Embedded software","volume":"38 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-09-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127813308","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 3

Distributed-code generation from hybrid systems models for time-delayed multirate systems 时滞多速率系统混合系统模型的分布式代码生成

Proceedings of the 5th ACM international conference on Embedded software Pub Date : 2005-09-18 DOI: 10.1145/1086228.1086267

M. Anand, S. Fischmeister, Jesung Kim, Insup Lee

{"title":"Distributed-code generation from hybrid systems models for time-delayed multirate systems","authors":"M. Anand, S. Fischmeister, Jesung Kim, Insup Lee","doi":"10.1145/1086228.1086267","DOIUrl":"https://doi.org/10.1145/1086228.1086267","url":null,"abstract":"Hybrid systems are an appropriate formalism to model embedded systems as they capture the theme of continuous dynamics with discrete control. A simple extension, a network of communicating hybrid automata, allows for modeling distributed embedded systems. Although it is possible to generate code from such models, it is difficult to provide formal guarantees in the code with respect to the model. One of the reasons for this is that, the model is set in continuous time and concurrent execution with instantaneous communication, whereas the generated code is set in discrete time with delayed communication. This can introduce semantic differences between the model and the code such as missed transitions, faulty transitions, and altered continuous behavior. The goal of faithful code generation is to minimize these differences.In this paper, we propose a relaxed criteria of faithfulness, coined relative faithful implementation. Based on this criteria, we propose dynamically adjusting the guard at runtime using estimates of errors for preventing faulty transitions. We also identify a sufficient condition to ensure no missed transitions in the code.","PeriodicalId":284648,"journal":{"name":"Proceedings of the 5th ACM international conference on Embedded software","volume":"14 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-09-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115662415","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 6

QoS control for optimality and safety QoS控制的最优性和安全性

Proceedings of the 5th ACM international conference on Embedded software Pub Date : 2005-09-18 DOI: 10.1145/1086228.1086247

Jacques Combaz, Jean-Claude Fernandez, Thierry Lepley, J. Sifakis

引用次数: 21

Minimizing expected energy in real-time embedded systems 最小化实时嵌入式系统的预期能量

Proceedings of the 5th ACM international conference on Embedded software Pub Date : 2005-09-18 DOI: 10.1145/1086228.1086274

Ruibin Xu, D. Mossé, R. Melhem

引用次数: 52

Semantics-based optimization across uncoordinated tasks in networked embedded systems 网络嵌入式系统中基于语义的非协调任务优化

Proceedings of the 5th ACM international conference on Embedded software Pub Date : 2005-09-18 DOI: 10.1145/1086228.1086278

Jie Liu, Elaine Cheong, Feng Zhao

引用次数: 23

Efficient embedded software design with synchronous models 高效的嵌入式软件设计与同步模型

Proceedings of the 5th ACM international conference on Embedded software Pub Date : 2005-09-18 DOI: 10.1145/1086228.1086263

Massimo Baleani, A. Ferrari, L. Mangeruca, A. Sangiovanni-Vincentelli

引用次数: 42

Using separation of concerns for embedded systems design 将关注点分离用于嵌入式系统设计

Proceedings of the 5th ACM international conference on Embedded software Pub Date : 2005-09-18 DOI: 10.1145/1086228.1086235

Ethan K. Jackson, J. Sztipanovits

引用次数: 15