2016 IEEE International Symposium on Precision Clock Synchronization for Measurement, Control, and Communication (ISPCS)最新文献

Scalability analysis of the white-rabbit technology for cascade-chain networks 级联链网络白兔技术的可扩展性分析

2016 IEEE International Symposium on Precision Clock Synchronization for Measurement, Control, and Communication (ISPCS) Pub Date : 2016-09-29 DOI: 10.1109/ISPCS.2016.7579515

Felipe Torres-González, Javier Díaz, Emilio Marin-Lopez, R. Rodríguez-Gómez

{"title":"Scalability analysis of the white-rabbit technology for cascade-chain networks","authors":"Felipe Torres-González, Javier Díaz, Emilio Marin-Lopez, R. Rodríguez-Gómez","doi":"10.1109/ISPCS.2016.7579515","DOIUrl":"https://doi.org/10.1109/ISPCS.2016.7579515","url":null,"abstract":"Due to an increase of timing requirements in many actual and future applications, improvements are needed in current synchronization protocols. New scenarios as the Internet of Things or the next generation of 5G Mobile telecommunication networks, where a large number of devices must be interconnected, will stand in need of a better synchronization accuracy and a highly scalable protocol. White Rabbit (WR) is a multi-collaborative open project aiming at the distribution of timing with sub-nanosecond accuracy to thousand of nodes connected within an Ethernet network. It is built as an extension of the Precision Time Protocol (PTP). In order to improve the PTP's accuracy, WR incorporates some enhancements such as a precise link delay model, fine delay phase measurement and clock syntonization over the physical layer. In this paper we focus on the scalability analysis of the WR solution with networks of more than 15 hops connected in a daisy-chain configuration, using the WR Light Embedded Node (WR-LEN) which includes the White Rabbit PTP Core Dual Port. The study evaluates the scalability of the WR extensions to PTPv2 for the achievement of ultra-accurate time transfer in networks with linear topology. The contribution results are relevant for applications where the scalability of the timing solution is a fundamental ingredient for addressing novel applications and markets.","PeriodicalId":284489,"journal":{"name":"2016 IEEE International Symposium on Precision Clock Synchronization for Measurement, Control, and Communication (ISPCS)","volume":"63 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-09-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128590303","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 7

White rabbit clock characteristics 大白兔钟特性

2016 IEEE International Symposium on Precision Clock Synchronization for Measurement, Control, and Communication (ISPCS) Pub Date : 2016-09-29 DOI: 10.1109/ISPCS.2016.7579514

M. Rizzi, M. Lipinski, T. Wlostowski, J. Serrano, G. Daniluk, P. Ferrari, S. Rinaldi

{"title":"White rabbit clock characteristics","authors":"M. Rizzi, M. Lipinski, T. Wlostowski, J. Serrano, G. Daniluk, P. Ferrari, S. Rinaldi","doi":"10.1109/ISPCS.2016.7579514","DOIUrl":"https://doi.org/10.1109/ISPCS.2016.7579514","url":null,"abstract":"White Rabbit (WR) extends the Precision Time Protocol (PTP) to provide synchronisation with sub-nanosecond accuracy and sub-50 picoseconds precision. The protocol aspects of the WR extension are currently studied and integrated into the upcoming revision of PTP. In the context of this PTP revision, mechanisms are added to allow the control of the Layer 1 (L1) syntonisation by the PTP protocol. This article focuses on the frequency transfer characteristics of the L1 syntonisation in WR. We first explain the interaction between L1 syntonisation and PTP synchronisation in a WR device and describe the architecture of its Phase-Locked Loop (PLL). We then characterize the frequency transfer through a WR network in two ways: measuring the characteristics of the WR switch according to the Synchronous Ethernet (SyncE) metrics defined in ITU-T G.8262, and performing phase noise analysis. The results of the measurements allow us to propose improvements that might be useful for different types of WR applications. Metrology laboratories might be interested in the optimisations made to significantly reduce the phase noise. On the other hand, the telecom industry might be interested in the modifications that make the WR switch SyncE-compliant but deteriorate its performance. Notably, the latter was achieved merely by modifying the software that implements the WR PLL.","PeriodicalId":284489,"journal":{"name":"2016 IEEE International Symposium on Precision Clock Synchronization for Measurement, Control, and Communication (ISPCS)","volume":"15 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-09-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122077221","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 22

Building a 1588 system solution — Key learnings 构建1588系统解决方案-关键学习

2016 IEEE International Symposium on Precision Clock Synchronization for Measurement, Control, and Communication (ISPCS) Pub Date : 2016-09-01 DOI: 10.1109/ISPCS.2016.7579517

Chandra Mallela, Yu Ying Choo, Vince Bridgers

{"title":"Building a 1588 system solution — Key learnings","authors":"Chandra Mallela, Yu Ying Choo, Vince Bridgers","doi":"10.1109/ISPCS.2016.7579517","DOIUrl":"https://doi.org/10.1109/ISPCS.2016.7579517","url":null,"abstract":"The Intel-PSG division focused on FPGAs, has always delivered the hardware Intellectual Property (IP) cores that include both soft cores (synthesizable code) and hard cores (already routed and supplied with the FPGA), that can integrate well with firmware and application software in a system. The 1588 Precision Timing Protocol (1588-PTP) solution spans both software and hardware and the accuracy reported at a system level has more credibility than the accuracy reported at the hardware level. Hence, the Intel-PSG has chosen the route of open-source stack available with the Linux and built its 1588 RD (Reference Design) solution comprising its already established 1588 hardware IP. The system solution has achieved an accuracy of around 7ns in an Ordinary Clock system comprising one master clock and one slave clock. This article details the objectives of the 1588 RD solution, the technical process of achieving the objectives and key learnings in the whole exercise. Specifically, the article focuses on the key system level decisions viz., (a) choosing FIFO/DMA/TCAM (b) Timestamping all the packets vs timestamping only the PTP packets. The article further details the software and hardware architecture and their internal design details, the PTP packet flow and the procedure of arriving at the system level accuracy. Key learnings and scope for future work conclude the article.","PeriodicalId":284489,"journal":{"name":"2016 IEEE International Symposium on Precision Clock Synchronization for Measurement, Control, and Communication (ISPCS)","volume":"133 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133138058","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 1

A simulation framework for IEEE 1588 IEEE 1588的仿真框架

2016 IEEE International Symposium on Precision Clock Synchronization for Measurement, Control, and Communication (ISPCS) Pub Date : 2016-09-01 DOI: 10.1109/ISPCS.2016.7579516

Wolfgang Wallner, Armin Wasicek, R. Grosu

引用次数: 15

Synchronizing an IEEE 1588 slave clock over both paths of a redundant Ethernet system 在冗余以太网系统的两条路径上同步IEEE 1588从时钟

2016 IEEE International Symposium on Precision Clock Synchronization for Measurement, Control, and Communication (ISPCS) Pub Date : 2016-09-01 DOI: 10.1109/ISPCS.2016.7579507

A. Puhm, A. Mahmood, Thomas Bigler, N. Kero

引用次数: 6

Emerging solutions for time protocol security 时间协议安全的新兴解决方案

2016 IEEE International Symposium on Precision Clock Synchronization for Measurement, Control, and Communication (ISPCS) Pub Date : 2016-09-01 DOI: 10.1109/ISPCS.2016.7579502

K. O'Donoghue

引用次数: 6

Synchronizing low-cost probes for IEC61850 transfer time estimation 用于IEC61850传输时间估计的同步低成本探针

2016 IEEE International Symposium on Precision Clock Synchronization for Measurement, Control, and Communication (ISPCS) Pub Date : 2016-09-01 DOI: 10.1109/ISPCS.2016.7579499

S. Rinaldi, P. Ferrari, Matteo Loda

{"title":"Synchronizing low-cost probes for IEC61850 transfer time estimation","authors":"S. Rinaldi, P. Ferrari, Matteo Loda","doi":"10.1109/ISPCS.2016.7579499","DOIUrl":"https://doi.org/10.1109/ISPCS.2016.7579499","url":null,"abstract":"The growth of Smart Grids based on the IEC61850 standard makes the communication infrastructure a key factor of a successful application. Due to the distributed nature of the Smart Grid, the evaluation of the main performance indicators requires specialized distributed measurement system with dozens of measuring probes. Clearly, the scalability of the measurement system is tied to the cost of the single probe, and a tradeoff between cost and accuracy is needed. In this paper, the possibility of using low-cost probes for the estimation of the IEC61850 Transfer Time over Smart Grid communication infrastructure is investigated. The key feature to enable distributed measurement is the accuracy of the time synchronization that the probe (based on of-the-shelf microcomputer) can achieve. The paper presents an experimental evaluation of the measuring performance using some probe prototypes attached to an IEE1588 compliant infrastructure: the synchronization extended uncertainty is below 3 μs, and the IEC61850 Transfer Time measurement has an extended uncertainty below 15 μs.","PeriodicalId":284489,"journal":{"name":"2016 IEEE International Symposium on Precision Clock Synchronization for Measurement, Control, and Communication (ISPCS)","volume":"17 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121166371","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 4

SDN-based architecture to support Synchronization in a 5G framework 基于sdn的架构，支持5G框架下的同步

2016 IEEE International Symposium on Precision Clock Synchronization for Measurement, Control, and Communication (ISPCS) Pub Date : 2016-09-01 DOI: 10.1109/ISPCS.2016.7579504

P. Iovanna, Stefano Ruffini, Mats Forsman, Tomas Thyni

引用次数: 4

Game theory applied to secure clock synchronization with IEEE 1588 博弈论在ieee1588安全时钟同步中的应用

2016 IEEE International Symposium on Precision Clock Synchronization for Measurement, Control, and Communication (ISPCS) Pub Date : 2016-09-01 DOI: 10.1109/ISPCS.2016.7579509

Elena Lisova, E. Uhlemann, W. Steiner, J. Åkerberg, M. Bjorkman

引用次数: 6

IEEE 1588 protocol profiles' comparative analysis according to different applications and standards 基于不同应用和标准的IEEE 1588协议配置文件的比较分析

2016 IEEE International Symposium on Precision Clock Synchronization for Measurement, Control, and Communication (ISPCS) Pub Date : 2016-09-01 DOI: 10.1109/ISPCS.2016.7579518

I. Shkliarevskyi, Oleksandr Shkliarevskyi, Evgeniy Dyadenko, Youry Vountesmery

引用次数: 4