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2008 International Conference on Embedded Software and Systems最新文献

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Memory Models for an Application-Specific Instruction-set Processor Design Flow 特定应用程序指令集处理器设计流程的内存模型
2008 International Conference on Embedded Software and Systems Pub Date : 2008-07-29 DOI: 10.1109/ICESS.2008.40
Jiying Wu, Chijie Lin, De-Sheng Chen, Yiwen Wang
{"title":"Memory Models for an Application-Specific Instruction-set Processor Design Flow","authors":"Jiying Wu, Chijie Lin, De-Sheng Chen, Yiwen Wang","doi":"10.1109/ICESS.2008.40","DOIUrl":"https://doi.org/10.1109/ICESS.2008.40","url":null,"abstract":"To optimize system performance for a specific target application, embedded system designers may add some new instructions, called application-specific instructions (ASIs), by automatic design flow. In past days, most application-specific instruction-set processor (ASIP) researches focus on reducing instruction latency to improve performance regardless of the impact of memory access. In this paper, a design flow is proposed to automatically generate ASIs and to compare the performance between considering register transferring and regardless of it. The experiment results show the proposed approach can achieve up to 14% performance improvement and 10% memory access reduction comparing to no register transferring consideration.","PeriodicalId":278372,"journal":{"name":"2008 International Conference on Embedded Software and Systems","volume":"29 6 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-07-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123489596","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Address Register Allocation in Digital Signal Processors 数字信号处理器中的地址寄存器分配
2008 International Conference on Embedded Software and Systems Pub Date : 2008-07-29 DOI: 10.1109/ICESS.2008.88
Jinpyo Hong, J. Ramanujam
{"title":"Address Register Allocation in Digital Signal Processors","authors":"Jinpyo Hong, J. Ramanujam","doi":"10.1109/ICESS.2008.88","DOIUrl":"https://doi.org/10.1109/ICESS.2008.88","url":null,"abstract":"It is important in signal processing to optimize a code inside loops. In most programs, addressing computation accounts for a large fraction of an execution time. From the fact that typical DSP programs access massive amounts of data, it is easy to conclude that handling addressing computation properly in DSP domain is a more important subject than in general purpose computing in order to achieve a compact code with real-time performance. In this paper, we develop an algorithm that can eliminate an explicit use of address register instructions in a loop and find a lower bound on the number of ARs by finding strongly connected components (SCCs) of an extended graph.","PeriodicalId":278372,"journal":{"name":"2008 International Conference on Embedded Software and Systems","volume":"9 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-07-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123633658","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Towards Context-Aware Workflow Management for Ubiquitous Computing 面向泛在计算的上下文感知工作流管理
2008 International Conference on Embedded Software and Systems Pub Date : 2008-07-29 DOI: 10.1109/ICESS.2008.83
F. Tang, M. Guo, M. Dong, Minglu Li, Hu Guan
{"title":"Towards Context-Aware Workflow Management for Ubiquitous Computing","authors":"F. Tang, M. Guo, M. Dong, Minglu Li, Hu Guan","doi":"10.1109/ICESS.2008.83","DOIUrl":"https://doi.org/10.1109/ICESS.2008.83","url":null,"abstract":"Ubiquitous computing is a user-centric distributed computing paradigm, allowing users to access to their preferred services even while moving around. To make such a vision a reality, context-aware workflow management is one of key issues because the context of ubiquitous applications is highly varying. In this paper, we propose a context model for intelligent campus navigation applications, then present a context-adaptive workflow management algorithm which can dynamically adjust workflow execution policies in terms of current context information. Moreover, we model the workflow management algorithm in Petri nets. Our context model and workflow management algorithm may be easily extended to other ubiquitous applications with a little change on context structure.","PeriodicalId":278372,"journal":{"name":"2008 International Conference on Embedded Software and Systems","volume":"57 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-07-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129098592","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 41
Performance Testing Based on Time Complexity Analysis for Embedded Software 基于时间复杂度分析的嵌入式软件性能测试
2008 International Conference on Embedded Software and Systems Pub Date : 2008-07-29 DOI: 10.1109/ICESS.2008.90
Hu Jin, Liang-Yin Chen, L. Zeng, Bao-Lin Li
{"title":"Performance Testing Based on Time Complexity Analysis for Embedded Software","authors":"Hu Jin, Liang-Yin Chen, L. Zeng, Bao-Lin Li","doi":"10.1109/ICESS.2008.90","DOIUrl":"https://doi.org/10.1109/ICESS.2008.90","url":null,"abstract":"Architecture design and software implementation both contribute to the correctness of ultimate software products. So performance testing is very helpful to test the inconsistence between design and implementation since it is the mix reflection of both sides. Especially in embedded system, with limited resources, execution time is more likely to expose hidden defects. This research presents a time performance analysis method for software testing. Firstly, software modules were divided according to functionality in architecture view, and their time complexity were computed in static; secondly, testing activities were designed to track running time cost of those modules; next, expected time complexity was compared with actual running time to figure out abnormal function modules defects resident. Lastly, experiments were conducted in an embedded software project. The results showed time performance testing is an efficient way to find out some kinds of defects concerned with the inconsistence of design and implementation.","PeriodicalId":278372,"journal":{"name":"2008 International Conference on Embedded Software and Systems","volume":"134 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-07-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128561618","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
New TCP Mechanism over Heterogeneous Networks 异构网络上新的TCP机制
2008 International Conference on Embedded Software and Systems Pub Date : 2008-07-29 DOI: 10.1109/ICESS.2008.86
Changbiao Xu, Wei Si
{"title":"New TCP Mechanism over Heterogeneous Networks","authors":"Changbiao Xu, Wei Si","doi":"10.1109/ICESS.2008.86","DOIUrl":"https://doi.org/10.1109/ICESS.2008.86","url":null,"abstract":"With the development of the communication technology, computer networks present characteristics of scale, heterogeneous and dynamic. Traditional TCP has been designed and turned to perform well under the wired network. However, it is not ready for the heterogeneous networks. In order to improve the TCP performance over the heterogeneous networks, this paper proposes a modified TCP congestion control mechanism based on bandwidth estimation and double AIMD (additive-increase multiplicative-decrease) algorithm, named switch-TCP. Switch-TCP performances are investigated through simulations. Comparing with TCP Reno, the throughput may be improved; the retransmit probability may be decreased. Switch-TCP can coexist with TCP Reno very friendly. In addition, switch-TCP is obtained through a little modification at the sender side, so switch-TCP can be easily developed and the additional overheads are very low.","PeriodicalId":278372,"journal":{"name":"2008 International Conference on Embedded Software and Systems","volume":"140 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-07-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122181806","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 5
Research on Feature Extraction and Recognition of Acoustic Signal Based on AR Parameters Model 基于AR参数模型的声信号特征提取与识别研究
2008 International Conference on Embedded Software and Systems Pub Date : 2008-07-29 DOI: 10.1109/ICESS.2008.11
Wang Yang, Hong-liang Wang, Wen-dong Zhang, Yu Jun
{"title":"Research on Feature Extraction and Recognition of Acoustic Signal Based on AR Parameters Model","authors":"Wang Yang, Hong-liang Wang, Wen-dong Zhang, Yu Jun","doi":"10.1109/ICESS.2008.11","DOIUrl":"https://doi.org/10.1109/ICESS.2008.11","url":null,"abstract":"Parameter method of using AR (auto-regressive) Parameters model is one of most important way to signal extraction, analyzing the acoustic signal data from different algorithms of AR Parameters Model in this paper, proves that different outcomes attributes different extractions to by simulating and the importance of preprocessing.","PeriodicalId":278372,"journal":{"name":"2008 International Conference on Embedded Software and Systems","volume":"20 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-07-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122427826","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A Control and Acquisition System Design of Low-voltage Electrophoresis MicroChip Based on SOPC and DDS 基于SOPC和DDS的低压电泳微芯片控制采集系统设计
2008 International Conference on Embedded Software and Systems Pub Date : 2008-07-29 DOI: 10.1109/ICESS.2008.8
Honghua Liao, Jun Yu, Jun Wang, Jianjun Chen, Y. Liao, Jinqiao Yi
{"title":"A Control and Acquisition System Design of Low-voltage Electrophoresis MicroChip Based on SOPC and DDS","authors":"Honghua Liao, Jun Yu, Jun Wang, Jianjun Chen, Y. Liao, Jinqiao Yi","doi":"10.1109/ICESS.2008.8","DOIUrl":"https://doi.org/10.1109/ICESS.2008.8","url":null,"abstract":"This paper presents a method to control and acquire the conductivity signal of low-voltage capillary electrophoresis microchip based on SOPC and DDS techniques. The soft-core processor with RISC framework, NIOS II, acts as the core component. Under the control of NIOS II, the electrode ports are movably supplied DC voltage by the 128-channel electrodes address decoding strobe controller, and the moving field is formed to achieve of the different particles separating in the microchannel of low-voltage electrophoresis microchip. The direct digital frequency synthesis (DDS) modeling is built by DSP Builder. The DDS IP core is generated by Quartus II software. To control the dual phase lock-in amplifier by the DDS orthogonal signals sources. The four-electrode capacitively coupled contactless conductivity detector is designed to achieve the conductivity detection of solution. The design of DDS IP core based on DSP Builder, hardware framework and software design of system are mainly introduced in article.","PeriodicalId":278372,"journal":{"name":"2008 International Conference on Embedded Software and Systems","volume":"28 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-07-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126377680","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
A New FTL-based Flash Memory Management Scheme with Fast Cleaning Mechanism 一种新的基于快速清理机制的超光速闪存管理方案
2008 International Conference on Embedded Software and Systems Pub Date : 2008-07-29 DOI: 10.1109/ICESS.2008.87
Mei-Ling Chiang, Chen-Lon Cheng, C. Wu
{"title":"A New FTL-based Flash Memory Management Scheme with Fast Cleaning Mechanism","authors":"Mei-Ling Chiang, Chen-Lon Cheng, C. Wu","doi":"10.1109/ICESS.2008.87","DOIUrl":"https://doi.org/10.1109/ICESS.2008.87","url":null,"abstract":"Due to the advantages of non-volatility, lightweight, low power consumption, and shock resistance, flash memory has been widely used as the storage of embedded systems and mobile devices. However, unlike hard disk, flash memory does not support update-in-place operation, and each block on flash memory has the limited erasure cycles. Therefore, flash memory needs a different storage management scheme designed specifically for flash memory characteristics. Many researches adopt the log-based approach which needs an efficient cleaning mechanism to reclaim the storage space occupied by obsolete data. In this paper, we have designed and implemented a new flash translation layer for flash memory management and proposed a fast cleaning mechanism for space reclamation. It is based on the DAC technique to separately cluster hot and cold data in flash memory. For the NAND-type flash memory with large capacity, it maintains multiple LRU lists to reduce the time of selecting blocks for erasure in cleaning activity. Moreover, we modify the cost-benefit policy with different weight that considers the attribute of each block on flash memory in selecting a block for cleaning. Simulation results show that our proposed flash memory management scheme with the proposed fast cleaning mechanism could efficiently decrease the number of erase operations, speed up the cleaning activity, and enhance system performance.","PeriodicalId":278372,"journal":{"name":"2008 International Conference on Embedded Software and Systems","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-07-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126084320","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 14
Architecture Design of Embedded Home IMS Gateway based on Convergence of IMS and Home Network 基于IMS与家庭网络融合的嵌入式家庭IMS网关体系结构设计
2008 International Conference on Embedded Software and Systems Pub Date : 2008-07-29 DOI: 10.1109/ICESS.2008.45
Wu Zhang, Jinlin Wang, Hong Ni
{"title":"Architecture Design of Embedded Home IMS Gateway based on Convergence of IMS and Home Network","authors":"Wu Zhang, Jinlin Wang, Hong Ni","doi":"10.1109/ICESS.2008.45","DOIUrl":"https://doi.org/10.1109/ICESS.2008.45","url":null,"abstract":"The paper proposes a converged architecture of home network and IMS based on home IMS gateway, gaping their heterogeneity and implementing convergence on data plane, control plane and management plane. Aiming at issues of interoperation, QoS and mobility, the architecture provides solution schemes, respectively. Through its implementation of modularized hardware and layered software, availability of embedded Home IMS Gateway is validated.","PeriodicalId":278372,"journal":{"name":"2008 International Conference on Embedded Software and Systems","volume":"22 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-07-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115368662","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
An Approximate Query Processing Method Based on Data Correlation in Sensor Networks 传感器网络中基于数据相关性的近似查询处理方法
2008 International Conference on Embedded Software and Systems Pub Date : 2008-07-29 DOI: 10.1109/ICESS.2008.15
Hu Jin, Qianqian Ren, Jinbao Li, Yong Shi
{"title":"An Approximate Query Processing Method Based on Data Correlation in Sensor Networks","authors":"Hu Jin, Qianqian Ren, Jinbao Li, Yong Shi","doi":"10.1109/ICESS.2008.15","DOIUrl":"https://doi.org/10.1109/ICESS.2008.15","url":null,"abstract":"Thousands of small and low-power devices are embedded in the physical world and form a wireless sensor network. Approximation is presented in order to minimize energy consumption for data processing and dissemination. In this paper we propose a new technique for approximate query processing based on data correlation. We build compressed structure of data on sensors, over which query processing algorithms is directly operated. And it also guarantees extremely fast response times. Our experiments demonstrate that our method outperforms Wavelets and Histograms approximate query technique.","PeriodicalId":278372,"journal":{"name":"2008 International Conference on Embedded Software and Systems","volume":"261 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-07-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124272308","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 5
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