I. Plotog, G. Dumitru, N. Codreanu, A. Vasile, M. Branzei, I. Pencea, M. Tarcolea
{"title":"Microstructure comparative analysis of the solder joints based on SAC/SN100 soldering alloy type depending on the cooling rate","authors":"I. Plotog, G. Dumitru, N. Codreanu, A. Vasile, M. Branzei, I. Pencea, M. Tarcolea","doi":"10.1109/SIITME.2012.6384369","DOIUrl":"https://doi.org/10.1109/SIITME.2012.6384369","url":null,"abstract":"Microstructural analysis in the section of solder joints show a multilayer structure composed of IMC layers caused by the interface phenomena specific to soldering processes and a typical volume, unaffected by these phenomena, but depending of soldering process thermal profile, especially by the cooling zone parameters. In the paper were theoretically studied and experimentally evidenced genesis of the multilayer structure depending on the type of alloy and the specific cooling rate of the soldering process. Experiments were designed in order to obtain similar volumes of solder joints unaffected by the interface phenomena, taking into consideration Vapour Phase Soldering (VPS) processes characterized by different cooling rates and 6 types of Lead-Free solder pastes. The results highlight the microstructural differences in the unaffected by dissolution and diffusion volume of solder joints, between and for each type of solder pastes depending on the cooling rate. Based on these practical results could be improved the thermal profile of the soldering processes in VPS technology in order to increase the solder joints reliability.","PeriodicalId":273985,"journal":{"name":"2012 IEEE 18th International Symposium for Design and Technology in Electronic Packaging (SIITME)","volume":"18 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-12-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115423007","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
V. Venkatraman, H. Shea, F. Vecchio, T. Maeder, P. Ryser
{"title":"LTCC integrated miniature Rb discharge lamp module for stable optical pumping in miniature atomic clocks and magnetometers","authors":"V. Venkatraman, H. Shea, F. Vecchio, T. Maeder, P. Ryser","doi":"10.1109/SIITME.2012.6384357","DOIUrl":"https://doi.org/10.1109/SIITME.2012.6384357","url":null,"abstract":"We report here on an integrated mini-lamp module (15×26×4 mm3) with a microfabricated rf-powered Rb dielectric barrier discharge (DBD) lamp (10×10×3 mm3) positioned on top of a 0.6 mm thick (thickness adjustable) 4-layer LTCC (Low Temperature Co-fired Ceramic) stacked platform containing a serpentine heating resistor design with high heating capacity (up to several hundred degree Celsius) for lamp heating, a fast response DP 5092D PTC temperature sensor for temperature stabilization using PID feedback and a patterned pad layout for the drive circuit components and interconnects. This is the first report of an LTCC integrated Rb mini-lamp module. The novelties of this design include: (1) compact module and independent heating design with thermal isolation of the drive components, (2) very low capacitive interference of the heating elements on the lamp electrodes leading to lower power coupling losses and higher optical power stability during pumping operation, and (3) the components can be batch-fabricated and the module can be independently used for optical pumping in other applications including magnetometers and gyroscopes.","PeriodicalId":273985,"journal":{"name":"2012 IEEE 18th International Symposium for Design and Technology in Electronic Packaging (SIITME)","volume":"115 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-12-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"117261209","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Capacitive displacement sensor embedded in LTCC packaging","authors":"N. Blaz, A. Maric, L. Zivanov, G. Radosavljevic","doi":"10.1109/SIITME.2012.6384346","DOIUrl":"https://doi.org/10.1109/SIITME.2012.6384346","url":null,"abstract":"This paper presents the development of capacitive displacement sensor comprised of a movable dielectric stick and a fixed capacitor with a micro channel. Movement of the stick causes change of the sensor capacitance and therefore enables detection of the stick displacement in the plane. Electrical and mathematical sensor model have been developed. The sensor has been fabricated in the Low Temperature Co-fired Ceramics (LTCC) technology and experimentally characterized.","PeriodicalId":273985,"journal":{"name":"2012 IEEE 18th International Symposium for Design and Technology in Electronic Packaging (SIITME)","volume":"133 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-12-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123587400","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Compact solution for mobile phono-cardiography","authors":"F. Sandu, A. Stanca, A. I. Dumitru, C. Gerigan","doi":"10.1109/SIITME.2012.6384391","DOIUrl":"https://doi.org/10.1109/SIITME.2012.6384391","url":null,"abstract":"The paper is addressing compact and mobile solutions for bio-medical electronics, and is proposing a convenient phono-cardiographic monitoring implementation with remote diagnosis capabilities.","PeriodicalId":273985,"journal":{"name":"2012 IEEE 18th International Symposium for Design and Technology in Electronic Packaging (SIITME)","volume":"26 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-12-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125575793","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"A new methodology for dynamic reconfiguration of structured ASIC","authors":"T. Tulbure","doi":"10.1109/SIITME.2012.6384396","DOIUrl":"https://doi.org/10.1109/SIITME.2012.6384396","url":null,"abstract":"This paper presents the methodology and EDA software for dynamic reconfiguration of structured ASIC technology. New dynamic reconfigurable architectures introduced for structured ASIC offer a solution to use both temporal and spatial capacity of logic devices. The proposed solution reuses stages of standard implementation flow for structured ASIC and adds custom EDA software for programming and reconfiguration. The methodology is separated in two stages: pre-fabrication and post-fabrication. While the pre-fabrication stage uses the standard flow of implementing structured ASIC circuits the post fabrication programming is a new stage build around custom EDA software. This stage uses a behavioral Verilog description of the circuit to generate a memory image that can be loaded into the structured ASIC in order to change the circuit logic function. Device functionality can be modified at each power-up cycle by loading the memory image from external memory or during application execution to allow rapid dynamic logic reconfiguration.","PeriodicalId":273985,"journal":{"name":"2012 IEEE 18th International Symposium for Design and Technology in Electronic Packaging (SIITME)","volume":"30 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-12-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126133250","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}