2006 IEEE/ACM/IFIP Workshop on Embedded Systems for Real Time Multimedia最新文献_第2页

A Communication Interface for Multiprocessor Signal Processing Systems 多处理器信号处理系统的通信接口

2006 IEEE/ACM/IFIP Workshop on Embedded Systems for Real Time Multimedia Pub Date : 2006-10-26 DOI: 10.1109/ESTMED.2006.321285

S. Saha, S. Bhattacharyya, W. Wolf

{"title":"A Communication Interface for Multiprocessor Signal Processing Systems","authors":"S. Saha, S. Bhattacharyya, W. Wolf","doi":"10.1109/ESTMED.2006.321285","DOIUrl":"https://doi.org/10.1109/ESTMED.2006.321285","url":null,"abstract":"Parallelization of embedded software is often desirable for power/performance-related considerations for computation-intensive applications that frequently occur in the signal-processing domain. Although hardware support for parallel computation is increasingly available in embedded processing platforms, there is a distinct lack of effective software support. One of the most widely known efforts in support of parallel software is the message passing interface (MPI). However, MPI suffers from several drawbacks with regards to customization to specialized parallel processing contexts, and performance degradation for communication-intensive applications. In this paper, we propose a new interface, the signal passing interface (SPI), that is targeted toward signal processing applications and addresses the limitations of MPI for this important domain of embedded software by integrating relevant properties of MPI and coarse-grain dataflow modeling. SPI is much easier and more intuitive to use, and due to its careful specialization, more performance-efficient for the targeted application domain. We present our preliminary version of SPI, along with experiments using SPI on a practical face detection system that demonstrate the capabilities of SPI","PeriodicalId":266183,"journal":{"name":"2006 IEEE/ACM/IFIP Workshop on Embedded Systems for Real Time Multimedia","volume":"163 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-10-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127392850","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 8

Annotation Based Multimedia Streaming Over Wireless Networks 基于注解的无线网络多媒体流

2006 IEEE/ACM/IFIP Workshop on Embedded Systems for Real Time Multimedia Pub Date : 2006-10-26 DOI: 10.1109/ESTMED.2006.321273

R. Cornea, A. Nicolau, N. Dutt

引用次数: 10

A Low-Power Implementation of 3D Graphics System for Embedded Mobile Systems 嵌入式移动系统三维图形系统的低功耗实现

2006 IEEE/ACM/IFIP Workshop on Embedded Systems for Real Time Multimedia Pub Date : 2006-10-26 DOI: 10.1109/ESTMED.2006.321274

Chanmin Park, Hyunhee Kim, Jihong Kim

引用次数: 5

Design of a WCET-Aware C Compiler 一个支持wcet的C语言编译器的设计

2006 IEEE/ACM/IFIP Workshop on Embedded Systems for Real Time Multimedia Pub Date : 2006-10-26 DOI: 10.1109/ESTMED.2006.321284

H. Falk, Paul Lokuciejewski, Henrik Theiling

{"title":"Design of a WCET-Aware C Compiler","authors":"H. Falk, Paul Lokuciejewski, Henrik Theiling","doi":"10.1109/ESTMED.2006.321284","DOIUrl":"https://doi.org/10.1109/ESTMED.2006.321284","url":null,"abstract":"This paper presents techniques to integrate worst-case execution time (WCET) data into a compiler. Currently, a tight integration of WCET into compilers is strongly desired, but only some ad-hoc approaches were reported currently. Previous work mainly used self-written WCET estimators with limited functionality and preciseness during compilation. A very tight integration of a high quality WCET analyzer into a compiler was not yet achieved. This work is the first to present such a tight coupling between a compiler and the WCET analyzer aiT. This is done by automatically translating the assembly-like contents of the compiler's low-level format (LLIR) to aiT's exchange format CRL2. Additionally, the results produced by aiT are automatically collected and re-imported into the compiler infrastructure. The work described in this paper is smoothly integrated into a C compiler for the Infineon TriCore processor. It opens up new possibilities for the design of WCET-aware optimizations in the future. The concepts for extending the compiler structure are kept very general so that they are not limited to WCET information. Rather, it is possible to use our concepts also for multi-objective optimization of e. g. best-case execution time (BCET) or energy dissipation","PeriodicalId":266183,"journal":{"name":"2006 IEEE/ACM/IFIP Workshop on Embedded Systems for Real Time Multimedia","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-10-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129452286","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 56

Muir Hardware Synthesis for Multimedia Applications 多媒体应用的Muir硬件合成

2006 IEEE/ACM/IFIP Workshop on Embedded Systems for Real Time Multimedia Pub Date : 2006-10-26 DOI: 10.1109/ESTMED.2006.321281

S. Fischaber, J. McAllister, Roger Francis Woods, E. Malins

引用次数: 1

An Estimation Methodology for Designing Instruction Cache Memory of Embedded Systems 嵌入式系统指令缓存设计的一种估计方法

2006 IEEE/ACM/IFIP Workshop on Embedded Systems for Real Time Multimedia Pub Date : 2006-10-26 DOI: 10.1109/ESTMED.2006.321269

N. Kroupis, S. Mamagkakis, D. Soudris

{"title":"An Estimation Methodology for Designing Instruction Cache Memory of Embedded Systems","authors":"N. Kroupis, S. Mamagkakis, D. Soudris","doi":"10.1109/ESTMED.2006.321269","DOIUrl":"https://doi.org/10.1109/ESTMED.2006.321269","url":null,"abstract":"The design exploration procedure of DSP systems using simulation tools is a time-consuming process, even for low complexity applications. The main goal of the design methodology introduced in this paper is to provide fast and accurate estimates of the number of (-micro) instructions and the instruction cache miss rate of DSP applications implemented on a programmable embedded platform, during the early design phases. Specific information is extracted from both the high-level code description (C code) of the DSP application considered and its corresponding assembly code, without carrying out any kind of simulation. The proposed methodology requires only a single execution of the application in a general-purpose processor and uses only the assembly code of the targeted embedded processor. In order to automate the estimation procedure, a new software tool, which implements the proposed methodology, has been developed. Using nine real-life applications from different domains of the DSP field, it has been proved that with the proposed methodology the number of instructions and the miss rate of instruction cache can be estimated with high accuracy (>95%). Furthermore, the required time cost is much smaller (orders of magnitude) than the simulation-based approaches","PeriodicalId":266183,"journal":{"name":"2006 IEEE/ACM/IFIP Workshop on Embedded Systems for Real Time Multimedia","volume":"3 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-10-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121841601","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 4

A Low Complexity MPEG Video Decoder with Arbitrary Downscaling Capability 具有任意降缩能力的低复杂度MPEG视频解码器

2006 IEEE/ACM/IFIP Workshop on Embedded Systems for Real Time Multimedia Pub Date : 2006-10-26 DOI: 10.1109/ESTMED.2006.321268

Shusen Shi, Feng Liu, Xu Cheng

引用次数: 4

Locality management using multiple SPMs on the Multi-Level Computing Architecture 在多级计算体系结构中使用多个spm进行局部性管理

2006 IEEE/ACM/IFIP Workshop on Embedded Systems for Real Time Multimedia Pub Date : 2006-10-26 DOI: 10.1109/ESTMED.2006.321276

A. Abdelkhalek, T. Abdelrahman

引用次数: 4

TTL Hardware Interface: A High-Level Interface for Streaming Multiprocessor Architectures TTL硬件接口:流多处理器架构的高级接口

2006 IEEE/ACM/IFIP Workshop on Embedded Systems for Real Time Multimedia Pub Date : 2006-10-26 DOI: 10.1109/ESTMED.2006.321282

T. Henriksson, P. V. D. Wolf

引用次数: 10

High-Level Power Management of Audio Power Amplifiers for Portable Multimedia Applications 便携式多媒体应用音频功率放大器的高级电源管理

2006 IEEE/ACM/IFIP Workshop on Embedded Systems for Real Time Multimedia Pub Date : 2006-10-26 DOI: 10.1109/ESTMED.2006.321272

Kyungsoo Lee, Youngjin Cho, N. Chang

{"title":"High-Level Power Management of Audio Power Amplifiers for Portable Multimedia Applications","authors":"Kyungsoo Lee, Youngjin Cho, N. Chang","doi":"10.1109/ESTMED.2006.321272","DOIUrl":"https://doi.org/10.1109/ESTMED.2006.321272","url":null,"abstract":"Modern hand-held multimedia devices are equipped with high-power audio subsystems with built-in loudspeakers. These audio subsystems consume around 30% of the total system power, due to the poor efficiency of loudspeakers, even though high-efficiency class-D amplifiers are used. We introduce an elaborated system-level approach to the analysis of power consumption in amplifiers and consequent power saving for hand-held multimedia applications. Loudspeakers act like resistors below the resonant region and above the linear region, dissipating battery power without producing audible sound output. We exploit the poor frequency response of typical built-in miniature loudspeakers with inadequate enclosures, and limit the production of unnecessary frequencies that never become recognizable sound. We achieve up to 23% and 35% power reduction without appreciable fidelity degradation, with an SNR (signal to noise ratio) of 33% and 35%, for a class-AB and class-D amplifiers, respectively. All the data and experimental results in this paper are actual measurements using our in-house audio power analysis platform","PeriodicalId":266183,"journal":{"name":"2006 IEEE/ACM/IFIP Workshop on Embedded Systems for Real Time Multimedia","volume":"47 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-10-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128168210","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 10