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Proceedings of the Sixth Euromicro Workshop on Parallel and Distributed Processing - PDP '98 -最新文献

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An experimental study of BSP sorting algorithms BSP排序算法的实验研究
Proceedings of the Sixth Euromicro Workshop on Parallel and Distributed Processing - PDP '98 - Pub Date : 1998-01-21 DOI: 10.1109/EMPDP.1998.647236
A. Gerbessiotis, Constantinos J. Siniolakis
{"title":"An experimental study of BSP sorting algorithms","authors":"A. Gerbessiotis, Constantinos J. Siniolakis","doi":"10.1109/EMPDP.1998.647236","DOIUrl":"https://doi.org/10.1109/EMPDP.1998.647236","url":null,"abstract":"The bulk-synchronous parallel (BSP) model of computation has been proposed as a unifying and bridging model for the design, analysis and implementation of parallel algorithms that are both scalable and portable among diverse parallel machines. The authors implement, using the Oxford BSP Toolset, BSPlib, a number of BSP deterministic and randomized sorting algorithms on a variety of parallel systems, including the SGI Power Challenge and the CRAY T3D. The experimental results illustrate the efficiency, portability and reusability of the algorithms across such diverse hardware platforms, and reinforce their claim that the BSP model can be used as a kind of programming paradigm.","PeriodicalId":265140,"journal":{"name":"Proceedings of the Sixth Euromicro Workshop on Parallel and Distributed Processing - PDP '98 -","volume":"27 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1998-01-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127469060","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 14
Modeling and simulation of integrated modular avionics 集成模块化航空电子设备建模与仿真
Proceedings of the Sixth Euromicro Workshop on Parallel and Distributed Processing - PDP '98 - Pub Date : 1998-01-21 DOI: 10.1109/EMPDP.1998.647186
C. Fraboul, F. Martin
{"title":"Modeling and simulation of integrated modular avionics","authors":"C. Fraboul, F. Martin","doi":"10.1109/EMPDP.1998.647186","DOIUrl":"https://doi.org/10.1109/EMPDP.1998.647186","url":null,"abstract":"Mastering increasing complexity of civil airborne equipment systems needs new architectural concepts mainly based on modular design, generic resources and multiplexed communication buses. These new architectures, such as Integrated Modular Avionics (IMA) architecture, rely on the definition of standardized hardware and software. However, the development of an IMA architecture requires new tools enabling platform designer, applications developer and system integrator to describe and evaluate different implementation choices. This paper, identifies and characterizes different levels of needed models in order to catch essential information for performance evaluation of avionics applications integrated in IMA. Four model levels are proposed: application model, architectural model, execution model and allocation model. These different modeling levels allow the generation of a simulation model of avionics systems allocated on an IMA platform.","PeriodicalId":265140,"journal":{"name":"Proceedings of the Sixth Euromicro Workshop on Parallel and Distributed Processing - PDP '98 -","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1998-01-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129911299","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 13
Process support for cooperative work on the World Wide Web 为万维网上的合作工作提供流程支持
Proceedings of the Sixth Euromicro Workshop on Parallel and Distributed Processing - PDP '98 - Pub Date : 1998-01-21 DOI: 10.1109/EMPDP.1998.647216
K. Sikkel, O. Neumann, S. Sachweh
{"title":"Process support for cooperative work on the World Wide Web","authors":"K. Sikkel, O. Neumann, S. Sachweh","doi":"10.1109/EMPDP.1998.647216","DOIUrl":"https://doi.org/10.1109/EMPDP.1998.647216","url":null,"abstract":"The World Wide Web is becoming a dominating factor in information technology. Consequently, computer supported cooperative work on the Web has recently drawn a lot of attention. \"Process Support for Cooperative Work\" (PSCW) is a Web based system supporting both structured and unstructured forms of cooperation. It is a combination of the \"Basic Support for Cooperative Work\" (BSCW) shared workspace system and the Merlin Process Support Environment. The current PSCW prototype offers a loose connection, in effect extending BSCW with a gateway to Merlin. With this prototype we have successfully addressed the technical issues involved; further integration of functionality should not pose any real problems. We focus on the technical side of the PSCW system, which gives a good insight into the issues that have to be addressed generally in the construction of Web based groupware.","PeriodicalId":265140,"journal":{"name":"Proceedings of the Sixth Euromicro Workshop on Parallel and Distributed Processing - PDP '98 -","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1998-01-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128966722","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
Loop bounds computation for multilevel tiling 多层平铺的循环边界计算
Proceedings of the Sixth Euromicro Workshop on Parallel and Distributed Processing - PDP '98 - Pub Date : 1998-01-21 DOI: 10.1109/EMPDP.1998.647232
M. Jiménez, J. Llabería, Agustín Fernández
{"title":"Loop bounds computation for multilevel tiling","authors":"M. Jiménez, J. Llabería, Agustín Fernández","doi":"10.1109/EMPDP.1998.647232","DOIUrl":"https://doi.org/10.1109/EMPDP.1998.647232","url":null,"abstract":"The paper focuses on the complexity of computing exact loop bounds in multilevel tiling. Conventional tiling techniques implement tiling using first strip mining and afterwards loop interchange. Multilevel tiling has typically been implemented applying tiling level by level. We present a new way to implement multilevel tiling that consists in applying first strip mining at each dimension in all levels and, afterwards, performing once a loop interchange transformation of the strip mined loops. Our algorithm computes exact loop bounds, that is, loops in the generated code never execute empty iterations. We evaluate the complexity of this algorithm and show that it depends doubly exponentially only an the number of loops (space dimensions) in the original loop nest rather than in the number of loops in the final tiled code. The algorithm is based on the Fourier-Motzkin elimination, that generates redundant bounds. We also present an implementation of the technique that reduces the number of redundant bounds in the tiled code.","PeriodicalId":265140,"journal":{"name":"Proceedings of the Sixth Euromicro Workshop on Parallel and Distributed Processing - PDP '98 -","volume":"23 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1998-01-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127626784","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 7
Biological sequence analysis on distributed-shared memory multiprocessors 分布式共享内存多处理器的生物序列分析
Proceedings of the Sixth Euromicro Workshop on Parallel and Distributed Processing - PDP '98 - Pub Date : 1998-01-21 DOI: 10.1109/EMPDP.1998.647174
Andrés Rodríguez Moreno, L. G. D. L. Fraga, E. Zapata, J. Carazo, O. Trelles
{"title":"Biological sequence analysis on distributed-shared memory multiprocessors","authors":"Andrés Rodríguez Moreno, L. G. D. L. Fraga, E. Zapata, J. Carazo, O. Trelles","doi":"10.1109/EMPDP.1998.647174","DOIUrl":"https://doi.org/10.1109/EMPDP.1998.647174","url":null,"abstract":"In this paper we present a task-level implementation of several biological sequence analysis algorithms on distributed-shared memory multiprocessors. All the studied algorithms are computationally expensive and its computational patterns ranges from regular to very irregularly structured ones. An initial approach to evaluate the regularity level for this kind of algorithms based on the rate of free-dependent tasks, the data access pattern and the task homogeneity, is presented in this study. Extensive tests have been performed over different architectures using message-passing and thread-based programming models. A comparative analysis centered on performance and portability is also presented. The results give us a general knowledge about software portability and performance for algorithms on this area.","PeriodicalId":265140,"journal":{"name":"Proceedings of the Sixth Euromicro Workshop on Parallel and Distributed Processing - PDP '98 -","volume":"208 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1998-01-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123020329","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
The performance of the consensus algorithm running on FDDI 一致性算法在FDDI上的性能
Proceedings of the Sixth Euromicro Workshop on Parallel and Distributed Processing - PDP '98 - Pub Date : 1998-01-21 DOI: 10.1109/EMPDP.1998.647183
N. Sergent
{"title":"The performance of the consensus algorithm running on FDDI","authors":"N. Sergent","doi":"10.1109/EMPDP.1998.647183","DOIUrl":"https://doi.org/10.1109/EMPDP.1998.647183","url":null,"abstract":"This paper presents an application of Hierarchical Coloured Timed Petri Nets to the modelling and the performance evaluation of a distributed consensus algorithm. We took a top down modular approach to manage the complexity of the considered protocols. The termination time of the consensus algorithm is mainly set by the communications cost, i.e. by the timing characteristics of the communication network. In a simplified way, the network latency is taken into account in the system model. As the underlying physical network we have considered FDDI. By simulating the consensus Petri net model, it is possible to evaluate the termination time of the consensus algorithm.","PeriodicalId":265140,"journal":{"name":"Proceedings of the Sixth Euromicro Workshop on Parallel and Distributed Processing - PDP '98 -","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1998-01-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115435779","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Practical barrier synchronisation 实际屏障同步
Proceedings of the Sixth Euromicro Workshop on Parallel and Distributed Processing - PDP '98 - Pub Date : 1998-01-21 DOI: 10.1109/EMPDP.1998.647231
Jonathan M. D. Hill, D. Skillicorn
{"title":"Practical barrier synchronisation","authors":"Jonathan M. D. Hill, D. Skillicorn","doi":"10.1109/EMPDP.1998.647231","DOIUrl":"https://doi.org/10.1109/EMPDP.1998.647231","url":null,"abstract":"We investigate the performance of barrier synchronisation on both shared memory and distributed memory architectures, using a wide range of techniques. The performance results obtained show that distributed memory architectures behave predictably, although their performance for barrier synchronisation is relatively poor. For shared memory architectures, a much larger range of implementation techniques are available. We show that asymptotic analysis is useless, and a detailed understanding of the underlying hardware is required to design an effective barrier implementation. We show that a technique using cache coherence is more effective than semaphore or lock based techniques, and is competitive with specialised barrier synchronisation hardware.","PeriodicalId":265140,"journal":{"name":"Proceedings of the Sixth Euromicro Workshop on Parallel and Distributed Processing - PDP '98 -","volume":"76 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1998-01-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123174864","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 44
An algorithm for optimization of reconfiguration of fault tolerant multiprocessor systems 容错多处理机系统重构优化算法
Proceedings of the Sixth Euromicro Workshop on Parallel and Distributed Processing - PDP '98 - Pub Date : 1998-01-21 DOI: 10.1109/EMPDP.1998.647218
Peter Janik, M. Kotocová
{"title":"An algorithm for optimization of reconfiguration of fault tolerant multiprocessor systems","authors":"Peter Janik, M. Kotocová","doi":"10.1109/EMPDP.1998.647218","DOIUrl":"https://doi.org/10.1109/EMPDP.1998.647218","url":null,"abstract":"We have presented an approach for finding an optimal process allocation for processes from a faulty processor in several previous papers (P. Janik and M. Kotocova, 1997; 1996; 1995; P. Janik, 1996). We have built a coloured Petri net model of a reconfigurable fault tolerant multiprocessor system. The model has been used to run many simulations of reconfiguration under different process and processor parameters. The results of simulations gave us a model of behaviour of performance degradation under different process and processor parameters. On this basis, an algorithm for finding an optimal process allocation has been proposed, with regard to performance degradation. We present the algorithm for finding an optimal process allocation from a faulty processor and results of its testing on a 64 transputer machine. The results have shown that, using this algorithm, it is possible to find an optimal or a near to optimal allocation for processes from a faulty processor, with regard to performance degradation.","PeriodicalId":265140,"journal":{"name":"Proceedings of the Sixth Euromicro Workshop on Parallel and Distributed Processing - PDP '98 -","volume":"28 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1998-01-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114824498","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Porting applications between PVM and Parix under Ensemble 在集成下在PVM和Parix之间移植应用程序
Proceedings of the Sixth Euromicro Workshop on Parallel and Distributed Processing - PDP '98 - Pub Date : 1998-01-21 DOI: 10.1109/EMPDP.1998.647227
Y. Cotronis, E. Avgeri, Y. Krallis
{"title":"Porting applications between PVM and Parix under Ensemble","authors":"Y. Cotronis, E. Avgeri, Y. Krallis","doi":"10.1109/EMPDP.1998.647227","DOIUrl":"https://doi.org/10.1109/EMPDP.1998.647227","url":null,"abstract":"We examine the differences between two message passing environments, PVM and Parix, and their impact on the implementation of applications. We outline Ensemble, a methodology for designing and implementing message passing applications by providing common software architecture. We outline Ensemble applied to PVM and Parix. We describe the mechanical porting of applications developed under Ensemble from one environment to the other.","PeriodicalId":265140,"journal":{"name":"Proceedings of the Sixth Euromicro Workshop on Parallel and Distributed Processing - PDP '98 -","volume":"22 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1998-01-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125089013","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Architecture-dependent partitioning of dependence graphs 依赖图的与体系结构相关的划分
Proceedings of the Sixth Euromicro Workshop on Parallel and Distributed Processing - PDP '98 - Pub Date : 1998-01-21 DOI: 10.1109/EMPDP.1998.647182
M. Beck, E. Zehendner, T. Ungerer
{"title":"Architecture-dependent partitioning of dependence graphs","authors":"M. Beck, E. Zehendner, T. Ungerer","doi":"10.1109/EMPDP.1998.647182","DOIUrl":"https://doi.org/10.1109/EMPDP.1998.647182","url":null,"abstract":"Performance tuning of non-blocking threads is based on graph partitioning algorithms that create serial code block from dependence graphs. Previously existing algorithms are directed toward deadlock-avoidance and maximisation of run-length. The latter criterion often generates a high synchronisation overhead. This paper presents a partitioning algorithm for dependence graphs that uses a heuristic to determine a cost-efficient solution based on an architecture-dependent cost function. We present empirical results based on benchmark programs that were compiled with MIT's Id compiler, extended by our architecture-dependent partitioning algorithm. The results demonstrate a reduction in software overhead with our architecture-dependent partitioning algorithm, compared with previously existing partitioning methods. The execution of the sample programs on an emulator for the Monsoon dataflow architecture shows a reduced number of processor cycles.","PeriodicalId":265140,"journal":{"name":"Proceedings of the Sixth Euromicro Workshop on Parallel and Distributed Processing - PDP '98 -","volume":"118 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1998-01-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128157288","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
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