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2009 52nd IEEE International Midwest Symposium on Circuits and Systems最新文献

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A wavelet-based 128-bit key generator using electrocardiogram signals 基于小波的128位密钥发生器，使用心电图信号
2009 52nd IEEE International Midwest Symposium on Circuits and Systems Pub Date : 2009-09-15 DOI: 10.1109/MWSCAS.2009.5236010
H. A. Garcia-Baleon, V. Alarcón-Aquino, O. Starostenko
{"title":"A wavelet-based 128-bit key generator using electrocardiogram signals","authors":"H. A. Garcia-Baleon, V. Alarcón-Aquino, O. Starostenko","doi":"10.1109/MWSCAS.2009.5236010","DOIUrl":"https://doi.org/10.1109/MWSCAS.2009.5236010","url":null,"abstract":"In this paper, we present a wavelet-based 128-bit key generator using electrocardiogram (ECG) signals. The key generator comprises two independent stages, namely, enrollment and verification-generation. In the latter, an algorithm for determining the keys is also proposed. This work is based on the uniqueness and quasi-stationary behavior of ECG signals with respect to an individual. This lets to consider the ECG signal as a biometric characteristic and guarantees that different keys are released to different individuals. The performance of the proposed key generator is assessed using ECG signals from MIT-BIH database. Simulation results show a false accept rate (FAR) of 22.3% and a false reject rate (FRR) of 18.1%. The 128-bit key released by the generator proposed in this work can be used in several encryption algorithms.","PeriodicalId":254577,"journal":{"name":"2009 52nd IEEE International Midwest Symposium on Circuits and Systems","volume":"33 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-09-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123891319","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 9
Switching-voltage detection and compensation circuits for ultra-low-voltage CMOS inverters 超低电压CMOS逆变器开关电压检测与补偿电路
2009 52nd IEEE International Midwest Symposium on Circuits and Systems Pub Date : 2009-09-15 DOI: 10.1109/MWSCAS.2009.5236051
K. Matsumoto, T. Hirose, Yuji Osaki, N. Kuroki, M. Numa
{"title":"Switching-voltage detection and compensation circuits for ultra-low-voltage CMOS inverters","authors":"K. Matsumoto, T. Hirose, Yuji Osaki, N. Kuroki, M. Numa","doi":"10.1109/MWSCAS.2009.5236051","DOIUrl":"https://doi.org/10.1109/MWSCAS.2009.5236051","url":null,"abstract":"This paper describes a switching-voltage detector and compensation circuits for an ultra-low-voltage CMOS inverter. The switching voltage of an inverter is an important design parameters for a digital circuit, and is determined by the difference in threshold voltages between MOSFETs. However, switching voltage varies significantly with fabrication process conditions and temperature. To address this problem, we have developed a threshold voltage difference detector circuit. We have also proposed a possible compensation technique for the inverter. Monte Carlo simulations demonstrated that the threshold voltage detector circuit can monitor the threshold voltage difference between pMOSFET and nMOSFET, and that the proposed inverter can achieve 80% reduction in switching-voltage variation compared to a conventional CMOS inverter.","PeriodicalId":254577,"journal":{"name":"2009 52nd IEEE International Midwest Symposium on Circuits and Systems","volume":"9 4 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-09-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123627373","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
Femtosecond laser blackening of metals 飞秒激光金属发黑
2009 52nd IEEE International Midwest Symposium on Circuits and Systems Pub Date : 2009-09-15 DOI: 10.1109/MWSCAS.2009.5235913
A. Vorobyev, Chunlei Guo
{"title":"Femtosecond laser blackening of metals","authors":"A. Vorobyev, Chunlei Guo","doi":"10.1109/MWSCAS.2009.5235913","DOIUrl":"https://doi.org/10.1109/MWSCAS.2009.5235913","url":null,"abstract":"Using a femtosecond laser processing technique, we produce technologically important black metals (Au, W) and black Ti90/Al6/V4 alloy with absorptance of about 85–95% over a broad wavelength range from ultraviolet to infrared. From scanning electron microscopy we find that the enhanced absorption of the black metals is caused by a rich variety of nano- and microscale surface structures. The black metals produced in our study may find applications in photonics, plasmonics, stealth technology, airborne/spaceborne devices, broadband thermal radiation sources, solar energy absorbers, radiative heat transfer devices, thermophotovoltaics, and biomedicine.","PeriodicalId":254577,"journal":{"name":"2009 52nd IEEE International Midwest Symposium on Circuits and Systems","volume":"57 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-09-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121984466","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 11
RF receiver and transmitter for insect mounted sensor platform 用于昆虫传感器平台的射频收发器
2009 52nd IEEE International Midwest Symposium on Circuits and Systems Pub Date : 2009-09-15 DOI: 10.1109/MWSCAS.2009.5236103
J. Duperre, Gordon Burgettz, Rajesh Gargz, S. Khatri
{"title":"RF receiver and transmitter for insect mounted sensor platform","authors":"J. Duperre, Gordon Burgettz, Rajesh Gargz, S. Khatri","doi":"10.1109/MWSCAS.2009.5236103","DOIUrl":"https://doi.org/10.1109/MWSCAS.2009.5236103","url":null,"abstract":"Low power consumption is a key design requirement for many systems, particularly small sensor platforms. Sub-threshold design allows for very low power operation of digital systems, especially when increased signal delay is not an issue. The objective of the work presented in this paper is to create a low power, small transmitter utilizing a sub-threshold IC, along with off-the-shelf components. This transmitter will be used for a low power sensor platform carried by a cockroach. We have earlier designed and fabricated a low power digital sub-threshold Binary Frequency Shift Keying (BFSK) modulator chip in a TSMC 0.25µm triple well CMOS process. This chip sends out two tones at 115KHz and 345KHz, corresponding to a binary data input. In this paper, we implement the RF transmitter circuit using this BFSK modulator chip with a carrier frequency of 80MHz. This RF transmitter circuit is designed and implemented using off-the-shelf components so that the overall transmitter board (BFSK modulator chip, RF circuit, antenna and batteries) is light, small and has a low power consumption. The signal was transmitted through a small coil antenna for the receiver base station, up to 100 feet away. We also implemented the RF front end and the demodulator circuit for the receiver base station. The receiver base station amplifies and filters the signal, then mixes the signal back down to the baseband. Our demodulator circuit is able to retrieve the original transmitted signal with an SNR of 10dB, at a distance of 100 feet.","PeriodicalId":254577,"journal":{"name":"2009 52nd IEEE International Midwest Symposium on Circuits and Systems","volume":"6 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-09-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132382498","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Low-power memory addressing scheme for fast fourier transform processors 快速傅立叶变换处理器的低功耗存储器寻址方案
2009 52nd IEEE International Midwest Symposium on Circuits and Systems Pub Date : 2009-09-15 DOI: 10.1109/MWSCAS.2009.5236008
Xin Xiao, E. Oruklu, J. Saniie
{"title":"Low-power memory addressing scheme for fast fourier transform processors","authors":"Xin Xiao, E. Oruklu, J. Saniie","doi":"10.1109/MWSCAS.2009.5236008","DOIUrl":"https://doi.org/10.1109/MWSCAS.2009.5236008","url":null,"abstract":"In this paper, a new memory addressing architecture is proposed for low-power radix-2 FFT implementations. Two optimization schemes are presented for dynamic power reduction. First, a multi-bank memory structure is introduced. Second, twiddle factor access times are significantly reduced with a new addressing sequence. For performance evaluation, FFT kernels with transform sizes ranging from 16 to 512 are implemented in CMOS 0.18µ technology. The synthesis results and architectural analysis indicate significant switching power reduction with no performance penalty. Power reduction factor grows with the transform size, making this architecture ideal for applications requiring long FFT operations.","PeriodicalId":254577,"journal":{"name":"2009 52nd IEEE International Midwest Symposium on Circuits and Systems","volume":"38 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-09-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130869438","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
System architecture of an RF-DAC based multistandard transmitter 基于RF-DAC的多标准发射机系统架构
2009 52nd IEEE International Midwest Symposium on Circuits and Systems Pub Date : 2009-09-15 DOI: 10.1109/MWSCAS.2009.5236107
N. Zimmermann, B. Thiel, R. Negra, S. Heinen
{"title":"System architecture of an RF-DAC based multistandard transmitter","authors":"N. Zimmermann, B. Thiel, R. Negra, S. Heinen","doi":"10.1109/MWSCAS.2009.5236107","DOIUrl":"https://doi.org/10.1109/MWSCAS.2009.5236107","url":null,"abstract":"In this paper the system concept of a radiofrequency digital-to-analog converter (RF-DAC) based multistandard transmitter is presented. The RF-DAC combines DA converter and up-conversion mixer in a single building block. Thereby, the analog baseband blocks are eliminated and replaced by easily reconfigurable digital blocks. Requirements on the digital and mixed-signal blocks are discussed. Spurious emissions are a major issue of this ‘direct digital modulator’. This is especially true for multiradio devices with several receivers running simultaneously and in close proximity to the transmitter. Therefore, a maximum emission limit is formulated and especially critical frequency bands are identified. Several techniques for reducing the spurious emissions are discussed and performance requirements for an LTE transmitter and its main building block are found. System simulations demonstrate the feasibility of the concept.","PeriodicalId":254577,"journal":{"name":"2009 52nd IEEE International Midwest Symposium on Circuits and Systems","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-09-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131140150","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 22
Electronic design and modeling of an integrated plasma impedance probe 集成等离子体阻抗探头的电子设计与建模
2009 52nd IEEE International Midwest Symposium on Circuits and Systems Pub Date : 2009-09-15 DOI: 10.1109/MWSCAS.2009.5235969
M. Jayaram, M. E. Hamoui, C. Winstead, E. Spencer
{"title":"Electronic design and modeling of an integrated plasma impedance probe","authors":"M. Jayaram, M. E. Hamoui, C. Winstead, E. Spencer","doi":"10.1109/MWSCAS.2009.5235969","DOIUrl":"https://doi.org/10.1109/MWSCAS.2009.5235969","url":null,"abstract":"This paper describes the electronic design of a plasma impedance probe under development for microsatellite applications. The designs primary innovation is the integration of matched analog-to-digital converters on a single chip for sampling the probe's current and voltage signals. A fast fourier transform (FFT) is performed by an off-chip FPGA to compute the probe's impedance. This provides a robust solution for determining the plasma impedance accurately. The use of matched ADCs decreases the instrument's sensitivity to imprecision and variation in the probe stimulus waveform and the FFT reduces sensitivity to transient spikes that proved disruptive in previous instruments. The major analog errors and parametric variations affecting the PIP instrument and its effect on the accuracy and precision of the impedance measurement are also studied.","PeriodicalId":254577,"journal":{"name":"2009 52nd IEEE International Midwest Symposium on Circuits and Systems","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-09-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131187027","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Design procedure and performance potential for operational amplifier using indirect compensation 使用间接补偿的运算放大器的设计过程和性能潜力
2009 52nd IEEE International Midwest Symposium on Circuits and Systems Pub Date : 2009-09-15 DOI: 10.1109/MWSCAS.2009.5236165
Vaibhav Kumar, Degang Chen
{"title":"Design procedure and performance potential for operational amplifier using indirect compensation","authors":"Vaibhav Kumar, Degang Chen","doi":"10.1109/MWSCAS.2009.5236165","DOIUrl":"https://doi.org/10.1109/MWSCAS.2009.5236165","url":null,"abstract":"A design procedure for an operational amplifier using indirect compensation is presented in this paper. Indirect compensation has inherent benefits in regards with power to speed trade-off. The technique has been seldom used in the past because a clear methodology for designing such an amplifier has not been provided. This paper develops the mathematical and analytical insight for designing an operational amplifier with this technique. The paper also provides a design strategy and an example to illustrate the use of the proposed design procedure.","PeriodicalId":254577,"journal":{"name":"2009 52nd IEEE International Midwest Symposium on Circuits and Systems","volume":"3 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-09-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133280986","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 8
Algorithm of super-resolution in images and video sequences applying wavelets based on atomic functions 基于原子函数的小波图像和视频序列超分辨算法
2009 52nd IEEE International Midwest Symposium on Circuits and Systems Pub Date : 2009-09-15 DOI: 10.1109/MWSCAS.2009.5235996
F. Gomeztagle, V. Kravchenko, E. Escamilla, V. Ponomaryov
{"title":"Algorithm of super-resolution in images and video sequences applying wavelets based on atomic functions","authors":"F. Gomeztagle, V. Kravchenko, E. Escamilla, V. Ponomaryov","doi":"10.1109/MWSCAS.2009.5235996","DOIUrl":"https://doi.org/10.1109/MWSCAS.2009.5235996","url":null,"abstract":"A novel algorithm for super resolution (SR) in images and video sequences is introduced. In difference with conventional approaches, new framework employs the spatial spectral properties of an image or sequence applying wavelet technique. Novel wavelets based on atomic functions used in SR have shown good properties of resolution by extension of an image size up to 4 times in comparison with the original low resolution image. Numerous statistical simulations have demonstrated the effectiveness of the novel technique exposing good subjective visual quality as well as significant improvement of SR image..","PeriodicalId":254577,"journal":{"name":"2009 52nd IEEE International Midwest Symposium on Circuits and Systems","volume":"11 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-09-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115324517","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
A capacitor-free LDO using a FD Si-MESFET pass transistor 使用FD Si-MESFET通管的无电容LDO
2009 52nd IEEE International Midwest Symposium on Circuits and Systems Pub Date : 2009-09-15 DOI: 10.1109/MWSCAS.2009.5235924
W. Lepkowski, S. Wilk, S. Kim, B. Bakkaloglu, T. Thornton
{"title":"A capacitor-free LDO using a FD Si-MESFET pass transistor","authors":"W. Lepkowski, S. Wilk, S. Kim, B. Bakkaloglu, T. Thornton","doi":"10.1109/MWSCAS.2009.5235924","DOIUrl":"https://doi.org/10.1109/MWSCAS.2009.5235924","url":null,"abstract":"The rapid growth in portable electronics has driven the market for ultra low dropout regulators (LDOs) that are more power efficient and lead to longer battery lifetime. Over the years various topologies based on P- or N-channel pass transistors have been introduced to meet these demands. For each of these implementations, the LDO has had a significant disadvantage whether it is stability issues and lower current drive associated with P-channel devices or the need for a charge pump to overcome the threshold voltage drop for enhancement mode N-channel devices. This paper presents a design methodology for an LDO that features a depletion-mode N-MESFET as the pass device that combines the advantages of both P and N devices allowing for ultra low dropout voltage and minimum layout area. The LDO also saves board space and simplifies design by achieving stability across all load and temperature conditions without the need of an output capacitor.","PeriodicalId":254577,"journal":{"name":"2009 52nd IEEE International Midwest Symposium on Circuits and Systems","volume":"14 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-09-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114362469","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 8
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