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Proceedings. Second ACM and IEEE International Conference on Formal Methods and Models for Co-Design, 2004. MEMOCODE '04.最新文献

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PROBMELA: a modeling language for communicating probabilistic processes PROBMELA:一种用于交流概率过程的建模语言
Proceedings. Second ACM and IEEE International Conference on Formal Methods and Models for Co-Design, 2004. MEMOCODE '04. Pub Date : 2004-06-23 DOI: 10.1109/MEMCOD.2004.1459815
C. Baier, Frank Ciesinski, Marcus Größer
{"title":"PROBMELA: a modeling language for communicating probabilistic processes","authors":"C. Baier, Frank Ciesinski, Marcus Größer","doi":"10.1109/MEMCOD.2004.1459815","DOIUrl":"https://doi.org/10.1109/MEMCOD.2004.1459815","url":null,"abstract":"Building automated tools to address the analysis of reactive probabilistic systems requires a simple, but expressive input language with a formal semantics based on a probabilistic operational model that can serve as starting point for verification algorithms. We introduce for probabilistic parallel programs with shared variables, message passing via synchronous and (perfect or lossy) fifo channels and atomic regions and provide a structured operational semantics. Applied to finite-state systems, the semantics can serve as basis for the algorithmic generation of a Markov decision process that models the stepwise behavior of the given system.","PeriodicalId":253853,"journal":{"name":"Proceedings. Second ACM and IEEE International Conference on Formal Methods and Models for Co-Design, 2004. MEMOCODE '04.","volume":"185 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2004-06-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122859542","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 196
Designers want proofs - but show me the money 设计师们想要证明——但让我看看钱
Proceedings. Second ACM and IEEE International Conference on Formal Methods and Models for Co-Design, 2004. MEMOCODE '04. Pub Date : 2004-06-23 DOI: 10.1109/MEMCOD.2004.1459842
C. Pixley, D. Meyers, S. McMaster, A. Chittor
{"title":"Designers want proofs - but show me the money","authors":"C. Pixley, D. Meyers, S. McMaster, A. Chittor","doi":"10.1109/MEMCOD.2004.1459842","DOIUrl":"https://doi.org/10.1109/MEMCOD.2004.1459842","url":null,"abstract":"This thesis shows that designers definitely do want proofs. The first author saw ample evidence of that at Motorola, where he managed a verification CAD group, and at Synopsys, where he was involved in verification tools, customers, and in verification projects with our DesignWare component groups. Our talk will discuss some success we had with our DesignWare team.","PeriodicalId":253853,"journal":{"name":"Proceedings. Second ACM and IEEE International Conference on Formal Methods and Models for Co-Design, 2004. MEMOCODE '04.","volume":"19 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2004-06-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122018501","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A framework for heterogeneous formal modeling and compositional verification of avionics systems 航空电子系统异构形式化建模与组成验证框架
Proceedings. Second ACM and IEEE International Conference on Formal Methods and Models for Co-Design, 2004. MEMOCODE '04. Pub Date : 2004-06-23 DOI: 10.1109/MEMCOD.2004.1459858
Y. A. Ameur, R. Delmas, V. Wiels
{"title":"A framework for heterogeneous formal modeling and compositional verification of avionics systems","authors":"Y. A. Ameur, R. Delmas, V. Wiels","doi":"10.1109/MEMCOD.2004.1459858","DOIUrl":"https://doi.org/10.1109/MEMCOD.2004.1459858","url":null,"abstract":"This paper presents a component oriented framework dedicated to the specification of embedded systems in the aeronautics domain. A component is an entity with three internal layers (hardware, operating functions and applicative functions) together with a collection of models in different domain-oriented views. A composition operation allows the expression of composition scenarios, yielding a component calculus for representing composite systems. An institutional framework supports this component calculus, allowing the expression of coherence criteria between heterogeneous views. This framework can be seen as a formal documentation of a system development and analysis, supporting heterogeneous modeling and compositional verification. The approach is illustrated on a non trivial case study.","PeriodicalId":253853,"journal":{"name":"Proceedings. Second ACM and IEEE International Conference on Formal Methods and Models for Co-Design, 2004. MEMOCODE '04.","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2004-06-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128538007","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
The ephemeral history register: flexible scheduling for rule-based designs 短暂历史寄存器:基于规则的设计的灵活调度
Proceedings. Second ACM and IEEE International Conference on Formal Methods and Models for Co-Design, 2004. MEMOCODE '04. Pub Date : 2004-06-23 DOI: 10.1109/MEMCOD.2004.1459853
Daniel L. Rosenband
{"title":"The ephemeral history register: flexible scheduling for rule-based designs","authors":"Daniel L. Rosenband","doi":"10.1109/MEMCOD.2004.1459853","DOIUrl":"https://doi.org/10.1109/MEMCOD.2004.1459853","url":null,"abstract":"The quality of high-level synthesis results is strongly dependant on the concurrency that can be found in designs. In this paper we introduce the ephemeral history register (EHR), a new primitive state element that enables concurrent scheduling of arbitrary rules in a rule-based design framework. The key properties of the EHR are that it allows multiple operations to write to the same state simultaneously, and that the EHR maintains a history of all writes that occur within a clock-cycle. Using the EHR, we present an algorithm that takes as input a design and a desired schedule, and produces a functionally equivalent design that satisfies the desired concurrency and ordering of operations. A processor pipeline is used to illustrate the effectiveness of the EHR and scheduling algorithm, and shows how this approach significantly improves on previous synthesis algorithms for rule-based designs.","PeriodicalId":253853,"journal":{"name":"Proceedings. Second ACM and IEEE International Conference on Formal Methods and Models for Co-Design, 2004. MEMOCODE '04.","volume":"38 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2004-06-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132422703","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 14
Using invariants to optimize formal specifications before code synthesis 在代码合成之前使用不变量来优化形式规范
Proceedings. Second ACM and IEEE International Conference on Formal Methods and Models for Co-Design, 2004. MEMOCODE '04. Pub Date : 2004-06-23 DOI: 10.1109/MEMCOD.2004.1459821
R. Jeffords, Elizabeth I. Leonard
{"title":"Using invariants to optimize formal specifications before code synthesis","authors":"R. Jeffords, Elizabeth I. Leonard","doi":"10.1109/MEMCOD.2004.1459821","DOIUrl":"https://doi.org/10.1109/MEMCOD.2004.1459821","url":null,"abstract":"Formal specifications of required system behavior can be analyzed, verified, and validated, giving high confidence that the specification captures the desired behavior Transferring this confidence to the system implementation depends on a formal link between requirements and implementation. The automatic generation of probably correct code provides just such a link. While optimization is usually performed on code to achieve efficiency, we propose to optimize the formal specification before generating code, thus providing optimization independent of the particular code generation method. This paper investigates the use of invariants in optimizing code generated from formal specifications in the software cost reduction (SCR) tabular notation. We show that invariants (1) provide the basis for simplifying expressions that otherwise cannot be improved using traditional compiler optimization techniques, and (2) allow detection and elimination of parts of the specification that would lead to unreachable code.","PeriodicalId":253853,"journal":{"name":"Proceedings. Second ACM and IEEE International Conference on Formal Methods and Models for Co-Design, 2004. MEMOCODE '04.","volume":"3 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2004-06-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125649174","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Curing schizophrenia by program rewriting in Esterel 通过Esterel的程序重写治疗精神分裂症
Proceedings. Second ACM and IEEE International Conference on Formal Methods and Models for Co-Design, 2004. MEMOCODE '04. Pub Date : 2004-06-23 DOI: 10.1109/MEMCOD.2004.1459813
O. Tardieu, R. Simone
{"title":"Curing schizophrenia by program rewriting in Esterel","authors":"O. Tardieu, R. Simone","doi":"10.1109/MEMCOD.2004.1459813","DOIUrl":"https://doi.org/10.1109/MEMCOD.2004.1459813","url":null,"abstract":"Synchronous languages such as Esterel can execute a series of statements in a single \"instant\" of time. If this series spans a loop iteration then it is possible that a computation local to the loop will have several distinct results during that \"instant\", which is referred to as schizophrenia. This makes the compilation of synchronous languages into more traditional computation models (such as C code or sequential logic) difficult. In a previous work (2004), we suggested to deal with schizophrenia through preprocessing in the Esterel language extended with a non-instantaneous jump statement. We now advocate for and experimented with such a program transformation, establishing the correctness, the completeness and the efficiency of our approach.","PeriodicalId":253853,"journal":{"name":"Proceedings. Second ACM and IEEE International Conference on Formal Methods and Models for Co-Design, 2004. MEMOCODE '04.","volume":"37 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2004-06-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128928815","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 37
Bounded model checking of infinite state systems: exploiting the automata hierarchy 无限状态系统的有界模型检验:利用自动机层次
Proceedings. Second ACM and IEEE International Conference on Formal Methods and Models for Co-Design, 2004. MEMOCODE '04. Pub Date : 2004-06-23 DOI: 10.1109/MEMCOD.2004.1459809
T. Schüle, K. Schneider
{"title":"Bounded model checking of infinite state systems: exploiting the automata hierarchy","authors":"T. Schüle, K. Schneider","doi":"10.1109/MEMCOD.2004.1459809","DOIUrl":"https://doi.org/10.1109/MEMCOD.2004.1459809","url":null,"abstract":"We present a new approach to bounded model checking that extends current methods in two ways: firstly, instead of a reduction to propositional logic, we choose a more powerful, yet decidable target logic, namely Presburger arithmetic. Secondly, instead of unwinding temporal logic formulas, we unwind corresponding /spl omega/-automata. To this end, we employ a special technique for translating safety and liveness properties to /spl omega/-automata with corresponding acceptance conditions. This combination allows us to utilize bounded model checking techniques for the efficient verification of infinite state systems.","PeriodicalId":253853,"journal":{"name":"Proceedings. Second ACM and IEEE International Conference on Formal Methods and Models for Co-Design, 2004. MEMOCODE '04.","volume":"17 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2004-06-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116809419","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 17
Hierarchical reconfiguration of dataflow models 数据流模型的分层重构
Proceedings. Second ACM and IEEE International Conference on Formal Methods and Models for Co-Design, 2004. MEMOCODE '04. Pub Date : 2004-06-23 DOI: 10.1109/MEMCOD.2004.1459852
S. Neuendorffer, Edward A. Lee
{"title":"Hierarchical reconfiguration of dataflow models","authors":"S. Neuendorffer, Edward A. Lee","doi":"10.1109/MEMCOD.2004.1459852","DOIUrl":"https://doi.org/10.1109/MEMCOD.2004.1459852","url":null,"abstract":"This paper presents a unified approach to analyzing patterns of reconfiguration in dataflow graphs. The approach is based on hierarchical decomposition of the structure and execution of a dataflow model. In general, reconfiguration of any part of the system might occur at any point during the execution of a model. However, arbitrary reconfiguration must often be restricted, given the constraints of particular dataflow models of computation or modeling constructs. For instance, the reconfiguration of parameters that influence dataflow scheduling or soundness of data type checking must be more heavily restricted. The paper first presents an abstract mathematical model that is sufficient to represent the reconfiguration of many types of dataflow graphs. Using this model, a behavioral type theory is developed that bounds the points in the execution of a model when individual parameters can be reconfigured. This theory can be used to efficiently check semantic constraints on reconfiguration, enabling the safe use of parameter reconfiguration at all levels of hierarchy.","PeriodicalId":253853,"journal":{"name":"Proceedings. Second ACM and IEEE International Conference on Formal Methods and Models for Co-Design, 2004. MEMOCODE '04.","volume":"5 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2004-06-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126491218","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 65
The BUSpec platform for automated generation of verification aids for standard bus protocols 用于自动生成标准总线协议验证辅助工具的BUSpec平台
Proceedings. Second ACM and IEEE International Conference on Formal Methods and Models for Co-Design, 2004. MEMOCODE '04. Pub Date : 2004-06-23 DOI: 10.1109/MEMCOD.2004.1459831
B. Pal, A. Banerjee, P. Dasgupta, P. Chakrabarti
{"title":"The BUSpec platform for automated generation of verification aids for standard bus protocols","authors":"B. Pal, A. Banerjee, P. Dasgupta, P. Chakrabarti","doi":"10.1109/MEMCOD.2004.1459831","DOIUrl":"https://doi.org/10.1109/MEMCOD.2004.1459831","url":null,"abstract":"A typical verification IP (VIP) of a bus protocol such as ARM AMBA or PCI consists of a set of assertions and associated verification aids like test-benches and coverage metrics. While, several languages have been formalized for specifying assertions (examples include OVA, Sugar, ForSpec, SVA, etc), the tasks of writing test-benches that produce protocol compliant stimuli and coverage monitors that reflect the coverage of the protocol functionality are also of significant importance. This paper presents a platform for high-level specification of a bus protocol and an automated methodology for generating a variety of verification aids that must supplement the set of assertions in a VIP.","PeriodicalId":253853,"journal":{"name":"Proceedings. Second ACM and IEEE International Conference on Formal Methods and Models for Co-Design, 2004. MEMOCODE '04.","volume":"139 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2004-06-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133841087","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 6
Check and simulate: a case for incorporating model checking in network simulation 检验与仿真:一个在网络仿真中加入模型检验的案例
Proceedings. Second ACM and IEEE International Conference on Formal Methods and Models for Co-Design, 2004. MEMOCODE '04. Pub Date : 2004-06-23 DOI: 10.1109/MEMCOD.2004.1459810
Ahmed Sobeih, Mahesh Viswanathan, J. Hou
{"title":"Check and simulate: a case for incorporating model checking in network simulation","authors":"Ahmed Sobeih, Mahesh Viswanathan, J. Hou","doi":"10.1109/MEMCOD.2004.1459810","DOIUrl":"https://doi.org/10.1109/MEMCOD.2004.1459810","url":null,"abstract":"Existing network simulators perform reasonably well in evaluating the performance of network protocols, but lack the capability of verifying and validating the correctness of network protocols. In this paper we have extended J-Sim - an open-source, component-based compositional network simulation environment - with the model checking capability to explore the state space created by a network protocol until either the entire state space is explored (if the state space is finite) or an error (e.g., a violation of a user-defined safety assertion) is discovered. We also exploit protocol-specific properties in the process of exploring the state space, to reduce the size of the state space and to guide the (best-first) search towards paths that can potentially locate errors in less time. As a proof of concept, we have demonstrated use of the J-Sim model checker in locating errors in an automatic repeat request (ARQ) protocol. As compared to the Maude LTL model checker, the J-Sim model checker can locate errors in a timely manner and with shorter error traces.","PeriodicalId":253853,"journal":{"name":"Proceedings. Second ACM and IEEE International Conference on Formal Methods and Models for Co-Design, 2004. MEMOCODE '04.","volume":"148 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2004-06-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131967118","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 20
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