2011 Proceedings of the ESSCIRC (ESSCIRC)最新文献_第10页

Differential input topologies with immunity to electromagnetic interference 抗电磁干扰差分输入拓扑

2011 Proceedings of the ESSCIRC (ESSCIRC) Pub Date : 2011-10-13 DOI: 10.1109/ESSCIRC.2011.6044900

F. Michel, M. Steyaert

引用次数: 6

A 90nm CMOS UHF/UWB asymmetric transceiver for RFID readers 用于RFID阅读器的90nm CMOS UHF/UWB非对称收发器

2011 Proceedings of the ESSCIRC (ESSCIRC) Pub Date : 2011-10-13 DOI: 10.1109/ESSCIRC.2011.6044894

J. Mao, M. DavidSarmiento, Qin Zhou, Jian Chen, Peng Wang, Z. Zou, F. Jonsson, Lirong Zheng

引用次数: 17

Linearity and intrinsic gain enhancement techniques using positive feedbacks to realize a 1.2-V, 200-MHz, +10.3-dBm of IIP3 and 7th-order LPF in a 65-nm CMOS 利用正反馈的线性度和固有增益增强技术，在65纳米CMOS上实现了1.2 v、200 mhz、+10.3 dbm的IIP3和7阶LPF

2011 Proceedings of the ESSCIRC (ESSCIRC) Pub Date : 2011-10-13 DOI: 10.1109/ESSCIRC.2011.6044923

Y. Sugimoto

{"title":"Linearity and intrinsic gain enhancement techniques using positive feedbacks to realize a 1.2-V, 200-MHz, +10.3-dBm of IIP3 and 7th-order LPF in a 65-nm CMOS","authors":"Y. Sugimoto","doi":"10.1109/ESSCIRC.2011.6044923","DOIUrl":"https://doi.org/10.1109/ESSCIRC.2011.6044923","url":null,"abstract":"Linearity and intrinsic gain enhancement techniques for realizing high-performance and low-voltage analog circuits in a deep-submicron CMOS are introduced. In place of a differential amplifier for the voltage-to-current (V/I) conversion at the input, a V/I conversion using a linear resistor and a positive feedback in a pseudo-differential configuration was adopted. The positive feedback concept was also applied to enhance the intrinsic gain of the deep-submicron MOS transistor which is used as a current source to realize high output impedance in amplifiers. In order to verify the effectiveness of the proposed techniques, a MOS 7th-order Gm-C linear phase low-pass-filter (LPF) was realized using a 65-nm CMOS process. Evaluation results showed that the −3 dB frequency bandwidth, group delay ripple, 3rd-order distortion and 3rd-order input intercept point (IIP3) were 200 MHz, 2.2%, less than −55 dB with a 100-MHz input and +10.3 dBm, respectively, all with a ±0.1 Vp-p signal input at each input terminal in pseudo differential configuration, while the LPF including an output buffer dissipated 60 mW from a 1.2-V supply.","PeriodicalId":239979,"journal":{"name":"2011 Proceedings of the ESSCIRC (ESSCIRC)","volume":"63 5","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2011-10-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"120943109","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 3

A monolithically-integrated optical receiver in standard 45-nm SOI 标准45nm SOI单片集成光接收器

2011 Proceedings of the ESSCIRC (ESSCIRC) Pub Date : 2011-10-13 DOI: 10.1109/ESSCIRC.2011.6044993

M. Georgas, J. Orcutt, Rajeev J Ram, V. Stojanović

引用次数: 34

8T SRAM with Mimicked Negative Bit-lines and Charge Limited Sequential sense amplifier for wireless sensor nodes 8T SRAM与模拟负位线和电荷限制顺序感测放大器的无线传感器节点

2011 Proceedings of the ESSCIRC (ESSCIRC) Pub Date : 2011-10-13 DOI: 10.1109/ESSCIRC.2011.6044939

Vibhu Sharma, S. Cosemans, M. Ashouei, J. Huisken, F. Catthoor, W. Dehaene

引用次数: 15

A neural tissue interfacing chip for in-vitro applications with 32k recording / stimulation channels on an active area of 2.6 mm2 用于体外应用的神经组织接口芯片，在2.6 mm2的活动区域上具有32k记录/刺激通道

2011 Proceedings of the ESSCIRC (ESSCIRC) Pub Date : 2011-10-13 DOI: 10.1109/ESSCIRC.2011.6044902

B. Eversmann, A. Lambacher, T. Gerling, Alexander Kunze, P. Fromherz, R. Thewes

引用次数: 39

High-swing class-C VCO 高摆幅c类压控振荡器

2011 Proceedings of the ESSCIRC (ESSCIRC) Pub Date : 2011-10-13 DOI: 10.1109/ESSCIRC.2011.6045015

Massoud Tohidian, A. Fotowat-Ahmady, M. Kamarei, F. Ndagijimana

引用次数: 63

A 0.6-to-200MSPS speed reconfigurable and 1.9-to-27mW power scalable 10bit ADC 一个0.6至200msps速度可重构和1.9至27mw功率可扩展的10位ADC

2011 Proceedings of the ESSCIRC (ESSCIRC) Pub Date : 2011-10-13 DOI: 10.1109/ESSCIRC.2011.6044983

Heng Zhang, Junhua Tan, Chao Zhang, Hongbo Chen, E. Sánchez-Sinencio

引用次数: 4

A 7-bit 18th order 9.6 GS/s FIR filter for high data rate 60-GHz wireless communications 用于高数据速率60ghz无线通信的7位18阶9.6 GS/s FIR滤波器

2011 Proceedings of the ESSCIRC (ESSCIRC) Pub Date : 2011-10-13 DOI: 10.1109/ESSCIRC.2011.6044916

Jonathan Müller, B. Stefanelli, A. Frappé, Lu Ye, A. Cathelin, A. Niknejad, A. Kaiser

引用次数: 1

A low leakage 500MHz 2T embedded dynamic memory with integrated semi-transparent refresh 低漏500MHz 2T嵌入式动态存储器，集成半透明刷新

2011 Proceedings of the ESSCIRC (ESSCIRC) Pub Date : 2011-10-13 DOI: 10.1109/ESSCIRC.2011.6044937

Anselme Vignon, S. Cosemans, W. Dehaene

引用次数: 0