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2019 41st Annual EOS/ESD Symposium (EOS/ESD)最新文献

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Characterizing and Modelling Common Mode Inductors at high Current Levels for System ESD Simulations 用于系统ESD仿真的高电流电平共模电感的特性和建模
2019 41st Annual EOS/ESD Symposium (EOS/ESD) Pub Date : 2019-09-01 DOI: 10.23919/EOS/ESD.2019.8870005
Michael Ammer, Sergey Miropolskiy, A. Rupp, F. Nieden, Martin Sauter, L. Maurer
{"title":"Characterizing and Modelling Common Mode Inductors at high Current Levels for System ESD Simulations","authors":"Michael Ammer, Sergey Miropolskiy, A. Rupp, F. Nieden, Martin Sauter, L. Maurer","doi":"10.23919/EOS/ESD.2019.8870005","DOIUrl":"https://doi.org/10.23919/EOS/ESD.2019.8870005","url":null,"abstract":"Common mode chokes are frequently used in differential communication buses for noise filtering. It is expected that these inductors can damp incoming ESD pulses significantly and partially protect the communication ICs. In fact they are driven heavily into saturation during ESD events and cannot help to protect the integrated circuit.","PeriodicalId":233379,"journal":{"name":"2019 41st Annual EOS/ESD Symposium (EOS/ESD)","volume":"7 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116048150","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 5
ESD Design Considerations for Ultra-Low Power Crystal Oscillators in Automotive Products 汽车产品中超低功率晶体振荡器的ESD设计考虑
2019 41st Annual EOS/ESD Symposium (EOS/ESD) Pub Date : 2019-09-01 DOI: 10.23919/EOS/ESD.2019.8869961
Stefan Dannenberger, D. Griffith, Oddgeir Fikstvedt
{"title":"ESD Design Considerations for Ultra-Low Power Crystal Oscillators in Automotive Products","authors":"Stefan Dannenberger, D. Griffith, Oddgeir Fikstvedt","doi":"10.23919/EOS/ESD.2019.8869961","DOIUrl":"https://doi.org/10.23919/EOS/ESD.2019.8869961","url":null,"abstract":"Ultra-low power crystal oscillators are sensitive to resistive and capacitive loads at the input. That imposes challenges to the design of the oscillator and its electro-static discharge (ESD) protection circuit. In this paper, protection strategies for automotive products are described while keeping an ultra-low power profile of the oscillator circuit.","PeriodicalId":233379,"journal":{"name":"2019 41st Annual EOS/ESD Symposium (EOS/ESD)","volume":"108 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122700864","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Simulation Driven ESD Current Density Check 仿真驱动ESD电流密度检测
2019 41st Annual EOS/ESD Symposium (EOS/ESD) Pub Date : 2019-09-01 DOI: 10.23919/EOS/ESD.2019.8869980
U. Glaser, Radu Stoica, Radu Tudor Ionescu, Marcel Preda, Haiko Morgenstern, Doaa Nassar, Hartmut Marquardt
{"title":"Simulation Driven ESD Current Density Check","authors":"U. Glaser, Radu Stoica, Radu Tudor Ionescu, Marcel Preda, Haiko Morgenstern, Doaa Nassar, Hartmut Marquardt","doi":"10.23919/EOS/ESD.2019.8869980","DOIUrl":"https://doi.org/10.23919/EOS/ESD.2019.8869980","url":null,"abstract":"The presented current density check tool identifies the ESD current paths itself and checks the interconnection layers for realistic ESD currents depending on all available ESD paths and the applied ESD stress. It achieves highest flexibility and coverage with practically no false errors and without any need for marking.","PeriodicalId":233379,"journal":{"name":"2019 41st Annual EOS/ESD Symposium (EOS/ESD)","volume":"62 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122930089","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Low-Capacitance SCR for On-Chip ESD Protection with High CDM Tolerance in 7nm Bulk FinFET Technology 7nm体FinFET技术中用于片上ESD保护的高CDM容限低电容可控硅
2019 41st Annual EOS/ESD Symposium (EOS/ESD) Pub Date : 2019-09-01 DOI: 10.23919/EOS/ESD.2019.8869982
Po-Lin Peng, Li-Wei Chu, Ming-Fu Tsai, Yu-Ti Su, Jam-Wem Lee, Kuo-Ji Chen, Ming-Hsiang Song
{"title":"Low-Capacitance SCR for On-Chip ESD Protection with High CDM Tolerance in 7nm Bulk FinFET Technology","authors":"Po-Lin Peng, Li-Wei Chu, Ming-Fu Tsai, Yu-Ti Su, Jam-Wem Lee, Kuo-Ji Chen, Ming-Hsiang Song","doi":"10.23919/EOS/ESD.2019.8869982","DOIUrl":"https://doi.org/10.23919/EOS/ESD.2019.8869982","url":null,"abstract":"A low-capacitance silicon-controlled rectifier for high speed I/O pad protection is implemented with TSMC 7nm bulk FinFET technology. It can achieve much higher ESD robustness per capacitance with better dynamic on-resistance and faster turn-on speed for CDM protection as compared to the prior art.","PeriodicalId":233379,"journal":{"name":"2019 41st Annual EOS/ESD Symposium (EOS/ESD)","volume":"23 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124763640","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 11
Characterization of ESD Shielding Bag with Capacitive Probe and IEC 61000-4-2 Generator 带电容探头和IEC 61000-4-2发生器的ESD屏蔽袋的特性研究
2019 41st Annual EOS/ESD Symposium (EOS/ESD) Pub Date : 2019-09-01 DOI: 10.23919/EOS/ESD.2019.8869964
T. Viheriäkoski, R. Fung, R. Wong, Reinhold Gärtner, F. Nieden, P. Tamminen
{"title":"Characterization of ESD Shielding Bag with Capacitive Probe and IEC 61000-4-2 Generator","authors":"T. Viheriäkoski, R. Fung, R. Wong, Reinhold Gärtner, F. Nieden, P. Tamminen","doi":"10.23919/EOS/ESD.2019.8869964","DOIUrl":"https://doi.org/10.23919/EOS/ESD.2019.8869964","url":null,"abstract":"ESD sensitive devices inside protective packaging may be exposed to high stress levels outside ESD protected area. ESD shielding bags are therefore tested with realistic stress levels by a system level ESD generator. The aim of this study is to estimate statistical uncertainty of ESD shielding measurements with different ESD generators and a capacitive probe.","PeriodicalId":233379,"journal":{"name":"2019 41st Annual EOS/ESD Symposium (EOS/ESD)","volume":"63 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131396787","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
ESD protection Diode with Guard Ring Layout Optimized for Latch-up Immunity Enhancement in FinFET technology 针对FinFET技术中锁存抗扰度增强优化的保护环布局ESD保护二极管
2019 41st Annual EOS/ESD Symposium (EOS/ESD) Pub Date : 2019-09-01 DOI: 10.23919/EOS/ESD.2019.8869972
Kai-Ping Huang, Po-Lin Peng, Li-Wei Chu, Yi-Feng Chang, T. Chang, Jam-Wem Lee, Kuo-Ji Chen, Ming-Hsiang Song
{"title":"ESD protection Diode with Guard Ring Layout Optimized for Latch-up Immunity Enhancement in FinFET technology","authors":"Kai-Ping Huang, Po-Lin Peng, Li-Wei Chu, Yi-Feng Chang, T. Chang, Jam-Wem Lee, Kuo-Ji Chen, Ming-Hsiang Song","doi":"10.23919/EOS/ESD.2019.8869972","DOIUrl":"https://doi.org/10.23919/EOS/ESD.2019.8869972","url":null,"abstract":"A novel ESD dual diode with stronger latch-up robustness has been proposed in FinFET technology. By inserting PW/NW straps, the proposed ESD diode can be built without changing DC-IV and ESD characteristics of conventional ESD diode. The experimental and simulation results demonstrate that the proposed structure has been successfully verified in FinFET CMOS platform.","PeriodicalId":233379,"journal":{"name":"2019 41st Annual EOS/ESD Symposium (EOS/ESD)","volume":"EOS-41 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130840795","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
A Variable VH Combined Power Clamp for System Level ESD/Surge Immunity Enhancement with Low Leakage 一种用于系统级低漏ESD/浪涌抗扰度增强的可变VH组合电源钳
2019 41st Annual EOS/ESD Symposium (EOS/ESD) Pub Date : 2019-09-01 DOI: 10.23919/EOS/ESD.2019.8869963
Koki Narita, M. Okushima
{"title":"A Variable VH Combined Power Clamp for System Level ESD/Surge Immunity Enhancement with Low Leakage","authors":"Koki Narita, M. Okushima","doi":"10.23919/EOS/ESD.2019.8869963","DOIUrl":"https://doi.org/10.23919/EOS/ESD.2019.8869963","url":null,"abstract":"An on-chip power clamp which combined RC and static trigger circuits for the system level ESD/EFT/Surge enhancement is proposed. The proposed clamp can achieve the higher immunity against longer pulses such as the surge event compared to the conventional combined clamp without increasing the leakage current of the trigger circuit using a variable holding voltage technique.","PeriodicalId":233379,"journal":{"name":"2019 41st Annual EOS/ESD Symposium (EOS/ESD)","volume":"18 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124865051","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 6
Low-Impedance Contact CDM – Evaluation and Modeling 低阻抗接触CDM -评估与建模
2019 41st Annual EOS/ESD Symposium (EOS/ESD) Pub Date : 2019-09-01 DOI: 10.23919/EOS/ESD.2019.8869976
Marko Simicic, Wei-Min Wu, Shih-Hung Chen, N. Jack, Shinichi Tamura, Yohei Shimada, M. Sawada, D. Linten
{"title":"Low-Impedance Contact CDM – Evaluation and Modeling","authors":"Marko Simicic, Wei-Min Wu, Shih-Hung Chen, N. Jack, Shinichi Tamura, Yohei Shimada, M. Sawada, D. Linten","doi":"10.23919/EOS/ESD.2019.8869976","DOIUrl":"https://doi.org/10.23919/EOS/ESD.2019.8869976","url":null,"abstract":"Standard charged device model (CDM) ESD simulators used today cannot be used at wafer level and suffer from high zap-to-zap peak current variability at low voltages. The low-impedance contact CDM provides a solution to these problems. In this paper we evaluate its performance and propose a model for the setup.","PeriodicalId":233379,"journal":{"name":"2019 41st Annual EOS/ESD Symposium (EOS/ESD)","volume":"122 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127971557","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Dual Injection Latchup Phenomenon in HV Rail Based ESD Protection Networks 高压钢轨ESD保护网络中的双注入闭锁现象
2019 41st Annual EOS/ESD Symposium (EOS/ESD) Pub Date : 2019-09-01 DOI: 10.23919/EOS/ESD.2019.8869970
S. Malobabic, D. Marreiro, V. Vashchenko
{"title":"Dual Injection Latchup Phenomenon in HV Rail Based ESD Protection Networks","authors":"S. Malobabic, D. Marreiro, V. Vashchenko","doi":"10.23919/EOS/ESD.2019.8869970","DOIUrl":"https://doi.org/10.23919/EOS/ESD.2019.8869970","url":null,"abstract":"A dual injection latchup phenomenon in rail based ESD protection network was studied using wafer level experiments. When the ESD rail is floating, low side injection causes a positive feedback with the high side diode connected to the power supply. Comparison of dual-injection latchup vs. conventional HV low side latchup isolation is presented.","PeriodicalId":233379,"journal":{"name":"2019 41st Annual EOS/ESD Symposium (EOS/ESD)","volume":"5 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114185377","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
EOS/ESD Technical Program Committee 2019 EOS/ESD技术计划委员会2019
2019 41st Annual EOS/ESD Symposium (EOS/ESD) Pub Date : 2019-09-01 DOI: 10.23919/eos/esd.2019.8869998
{"title":"EOS/ESD Technical Program Committee 2019","authors":"","doi":"10.23919/eos/esd.2019.8869998","DOIUrl":"https://doi.org/10.23919/eos/esd.2019.8869998","url":null,"abstract":"","PeriodicalId":233379,"journal":{"name":"2019 41st Annual EOS/ESD Symposium (EOS/ESD)","volume":"76 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116510670","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
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