M. Gagan, K. Harsha, Ratnakar Patil, K. Jayanth, R. Geetha
{"title":"Newton-Raphson's successive approximation method based TCSC controller","authors":"M. Gagan, K. Harsha, Ratnakar Patil, K. Jayanth, R. Geetha","doi":"10.1109/ICSPACE.2017.8343406","DOIUrl":"https://doi.org/10.1109/ICSPACE.2017.8343406","url":null,"abstract":"Transient voltage stability is a crucial and very rapid phenomenon that requires a very quick and accurate response to prevent voltage collapse in an AC system. One of the methods to prevent this situation is by using Flexible AC Transmission Systems (FACTS) controllers. This paper proposes a method that is based on the control of Thyristor Controlled Series Compensator (TCSC) from the Micro-controller so that the voltage stability requirement can be met easily. The proposed method is aimed to provide a quick response to prevent voltage collapse using a micro-controller, wherein, the Newtons-Raphson's approximation method is used for calculation of the conduction angle and thus the gating pulses are provided to the TCSC controller.","PeriodicalId":231537,"journal":{"name":"2017 International Conference on Smart grids, Power and Advanced Control Engineering (ICSPACE)","volume":"38 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"117238121","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
D. Aishwarya, H. K. Shreedhar, Anandthirtha B. Gudi
{"title":"Estimation of severity of amyotrophic lateral sclerosis using signal processing techniques","authors":"D. Aishwarya, H. K. Shreedhar, Anandthirtha B. Gudi","doi":"10.1109/ICSPACE.2017.8343458","DOIUrl":"https://doi.org/10.1109/ICSPACE.2017.8343458","url":null,"abstract":"Loss of motor neurons leads to Amyotrophic lateral sclerosis (ALS) in human beings. It is characterized by altered gait rhythm. In this work, gait data is collected from both normal and pathological subjects. Data collected in each case is divided into multiple blocks and average value of each block is found. Number of times signals crossing average value is found. Depending on the result obtained in each case and in comparison with normal, severity estimation is made.","PeriodicalId":231537,"journal":{"name":"2017 International Conference on Smart grids, Power and Advanced Control Engineering (ICSPACE)","volume":"68 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"120982307","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
R. P. Singh, Dharmbir Prasad, Pankaj Kumar, Md. Irfan Khan
{"title":"Modified differential evolution algorithm for optimal power flow with FACTS devices","authors":"R. P. Singh, Dharmbir Prasad, Pankaj Kumar, Md. Irfan Khan","doi":"10.1109/ICSPACE.2017.8343404","DOIUrl":"https://doi.org/10.1109/ICSPACE.2017.8343404","url":null,"abstract":"This paper investigates potential of modified differential evolution (MDE) algorithm, to find solution for optimal power flow (OPF) problem of power system. The performance of the proposed MDE algorithm is experienced on the modified IEEE-30 bus test systems integrating flexible ac transmission systems (FACTS) devices, that is, thyristor controlled phase shifter (TCPS) and thyristor controlled series capacitor (TCSC) at preset locations. The OPF problem of the present work is formulated with five different objective functions viz. (a) fuel cost (with valve point effect) minimization, (b) power transmission losses minimization, (c) emission reduction (d) fuel cost (without valve point effect) minimization and (e) minimization of combined economic and environmental cost. The proposed implementation exploits MDE, resulting in a much shorter execution time while retaining the best possible solution of OPF problem.","PeriodicalId":231537,"journal":{"name":"2017 International Conference on Smart grids, Power and Advanced Control Engineering (ICSPACE)","volume":"24 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116559296","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"A hybrid modular multilevel converter topology with modified phase-shifted carrier pulse-width modulation scheme","authors":"R. Behera, A. Thakur","doi":"10.1109/ICSPACE.2017.8343435","DOIUrl":"https://doi.org/10.1109/ICSPACE.2017.8343435","url":null,"abstract":"The Modular Multilevel Converter (MMC) topology is getting popularized for the medium to high voltage applications after its inception. This paper presents a modified topology of the conventional MMC, named as Hybrid MMC (HMMC). This topology has reduced number of switch counts than the conventional MMC. Therefore, it is more efficient and has less complex circuitry than other existing multi-level topologies. In this paper a modified phase-shifted carrier pulse width modulation scheme (PS-PWM) is used for the switching of HMMC. The three-phase circuit is simulated in the Matlab/Simulink for different load conditions and the results are provided to validate the concepts behind the topology.","PeriodicalId":231537,"journal":{"name":"2017 International Conference on Smart grids, Power and Advanced Control Engineering (ICSPACE)","volume":"11 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134434344","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Minimization of torque ripple using DITC with optimum bandwidth and switching frequency for SRM employed in electric vehicle","authors":"Nayak D. Veena, Naik L. Raghuram","doi":"10.1109/ICSPACE.2017.8343420","DOIUrl":"https://doi.org/10.1109/ICSPACE.2017.8343420","url":null,"abstract":"This paper presents the modeling and simulation of two-level and three-level Direct Instantaneous Torque Controller (DITC) for Switched Reluctance Motor (SRM) employed in electric vehicle. DITC is implemented taking torque as control variable and is estimated from the look-up table by considering current and rotor position of SRM. Further, PI controller is designed using symmetrical optimum method and integrated with two-level torque controller. Performance of two-level torque controller with and without PI controller is observed in terms of torque ripple for various bandwidths and switching frequency. It is observed that, the contribution of PI controller in terms of torque ripple minimization is not remarkable. In this regard, three-level torque controller is implemented in order to achieve the better performance and desired features for the operation of SRM in electric vehicle (EV). Finally, performances of two-level and three-level torque controller are compared in terms of minimum torque ripple, wide speed operation, high starting torque and converter switching frequency. It is observed that three-level torque controller has better performance than two-level controller for SRM employed in electric vehicle.","PeriodicalId":231537,"journal":{"name":"2017 International Conference on Smart grids, Power and Advanced Control Engineering (ICSPACE)","volume":"7 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124031809","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Power quality improvement and mitigation of harmonic distortion using DSTATCOM with PI and Fuzzy Logic Controller","authors":"S. Bhattacharya, Benjamin A. Shimray","doi":"10.1109/ICSPACE.2017.8343426","DOIUrl":"https://doi.org/10.1109/ICSPACE.2017.8343426","url":null,"abstract":"In the last decade there has been an upsurge in the development of improved power conditioning devices due to the latest upheaval in the applications of custom power devices (CPDs). CPDs offer several advantages over conventional capacitor and inductor banks which tends to be bulkier, lossy, poor reliability and overall poor control and lower efficiency. Therefore, this paper presents a new array of utilization of CPDs involving DSTATCOM which is by far the most versatile device among several others for power quality improvement at the distribution side. Reliability and quality are the two most important facets of any power delivery system. The prime focus will be to comprehend various occurrences of faults in an interconnected transmission network and devising possible ways to mitigate those faults using DSTATCOM. Power Electronic converters have played a pivotal role in the control of power quality mainly due to their fast action, reliability and lower cost in comparison to conventional electro-mechanical controllers. To obtain the desired objective IGBT based Voltage Source Converter (VSC) operating at high frequencies using Sinusoidal Pulse Width Modulation (SPWM) is used. For efficient reduction in harmonic contents passive LCL filter is used at the Point of Common Connection (PCC). Analysis involving both PI and Fuzzy Logic Controller is shown in the simulation results. Comparative analysis and pros and cons involving both the proposed control topologies are discussed. Here various kinds of faults commonly occurring in a power system are induced and their impact on power quality is monitored. All the simulation is done using MATLAB Simulink using SimPower System Blockset (PSB) Toolbox.","PeriodicalId":231537,"journal":{"name":"2017 International Conference on Smart grids, Power and Advanced Control Engineering (ICSPACE)","volume":"32 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114165905","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Tapas Chakrabarti, Malay Saha, Ambar Khanda, S. Sarkar
{"title":"HIT solar cell using ZnTe as an emitter layer","authors":"Tapas Chakrabarti, Malay Saha, Ambar Khanda, S. Sarkar","doi":"10.1109/ICSPACE.2017.8343398","DOIUrl":"https://doi.org/10.1109/ICSPACE.2017.8343398","url":null,"abstract":"This work is concentrated on a new structure of HIT solar cell using Zinc Telluride (ZnTe) material along with a-Si and c-Si. The proposed structure ITO/ZnTe(p)/a-Si(i)/c-Si(n)/a-Si(n)/ITO is modeled and observed a Significant solar cell efficiency of 27.7%. The thicknesses of the layers are varied to show the relation between the thickness and the performance of the solar cell. The HIT solar structure is developed in AFORS-HET Simulating tool.","PeriodicalId":231537,"journal":{"name":"2017 International Conference on Smart grids, Power and Advanced Control Engineering (ICSPACE)","volume":"18 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122906786","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"A simplified space vector pulse width modulation for three phase three-level diode clamped inverter","authors":"Debanjan Roy, Madhu Singh","doi":"10.1109/ICSPACE.2017.8343433","DOIUrl":"https://doi.org/10.1109/ICSPACE.2017.8343433","url":null,"abstract":"For diode clamped multilevel inverter topology dc link capacitor balancing is a vital issue. Proper switching sequence in space vector pulse width modulation plays a pivotal role in this regard without introducing any extra controller. This paper proposes SVPWM algorithm with seven segment switching sequence for three level inverter against the switching sequences where all the switching states along with their redundant states were used and detail comparison between those two sequence of SVPWM are discussed. Finaly, the operation of proposed algorithm is verified through MATLAB/SIMULINK environment.","PeriodicalId":231537,"journal":{"name":"2017 International Conference on Smart grids, Power and Advanced Control Engineering (ICSPACE)","volume":"2013 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128011236","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Design and implementation of dual port SRAM memory architecture using MOSFET's","authors":"S. Srinivas, Anandthirtha B. Gudi","doi":"10.1109/ICSPACE.2017.8343457","DOIUrl":"https://doi.org/10.1109/ICSPACE.2017.8343457","url":null,"abstract":"Dual port memory cell is the multiport memory cell that provides required access to multi-processor applications. It uses two additional pass transistors, bit line pair and a word line to provide much needed simultaneous access. Each SRAM cell is accessed by dual ports with devoted word and bit lines to each. Single port SRAM allows access to only single address of a memory cell at a time during each clock pulse but dual port overcomes this drawback and allows concurrent read or write access at different addresses. Thus the efficiency is almost doubled by using dual port RAM. The most important benefit of dual port RAM is that they will not have limitations of access between the two ports, as each processor can be made to operate at different clock frequencies.","PeriodicalId":231537,"journal":{"name":"2017 International Conference on Smart grids, Power and Advanced Control Engineering (ICSPACE)","volume":"45 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131797279","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Automatic testing of medium voltage drive using OPC server interface","authors":"Nitin Adlok, Abhijit Nikam","doi":"10.1109/ICSPACE.2017.8343407","DOIUrl":"https://doi.org/10.1109/ICSPACE.2017.8343407","url":null,"abstract":"This paper investigates automatic testing of medium voltage drive controller using OPC server interface. OPC is a standard software interface that allows Windows program to communicate with industrial hardware devices. The control board of medium voltage drive consists of digital input signals, which are used to control the drive e.g. drive start, stop and analog signals for giving speed or torque reference to the motor. In field these signals are given through another controller e.g. PLC that serve as a master. These signals can also be generated manually using control panel. In automatic testing of the drive application software, these control signals are to be accessed by Automatic Testing Framework. Using OPC server interface in Visual Studio solution it is possible to access the PLC symbol variables and control the drive for application software functionality testing. PLC symbol variables are accessed by Automatic Testing Framework through OPC gateway server. This paper describes the hardware setup, environment used for MV drive under test and automatic testing of control software using OPC Server Interface. Test results provided here proves the advantage of using OPC interface over conventional way of testing.","PeriodicalId":231537,"journal":{"name":"2017 International Conference on Smart grids, Power and Advanced Control Engineering (ICSPACE)","volume":"17 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123352310","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}