{"title":"Hybrid Signal Selection","authors":"A. Davoodi","doi":"10.1007/978-3-319-98116-1_5","DOIUrl":"https://doi.org/10.1007/978-3-319-98116-1_5","url":null,"abstract":"","PeriodicalId":227242,"journal":{"name":"Post-Silicon Validation and Debug","volume":"118 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-09-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123239187","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Simulation-Based Signal Selection","authors":"Debapriya Chatterjee, V. Bertacco","doi":"10.1007/978-3-319-98116-1_4","DOIUrl":"https://doi.org/10.1007/978-3-319-98116-1_4","url":null,"abstract":"","PeriodicalId":227242,"journal":{"name":"Post-Silicon Validation and Debug","volume":"49 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-09-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121938071","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Selection of Post-Silicon Hardware Assertions","authors":"Pouya Taatizadeh, N. Nicolici","doi":"10.1007/978-3-319-98116-1_10","DOIUrl":"https://doi.org/10.1007/978-3-319-98116-1_10","url":null,"abstract":"","PeriodicalId":227242,"journal":{"name":"Post-Silicon Validation and Debug","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-09-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128957030","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Debug Data Reduction Techniques","authors":"Sandeep Chandran, P. Panda","doi":"10.1007/978-3-319-98116-1_11","DOIUrl":"https://doi.org/10.1007/978-3-319-98116-1_11","url":null,"abstract":"","PeriodicalId":227242,"journal":{"name":"Post-Silicon Validation and Debug","volume":"51 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-09-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"117350570","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Utilization of Debug Infrastructure for Post-Silicon Coverage Analysis","authors":"Farimah Farahmandi, P. Mishra","doi":"10.1007/978-3-319-98116-1_15","DOIUrl":"https://doi.org/10.1007/978-3-319-98116-1_15","url":null,"abstract":"","PeriodicalId":227242,"journal":{"name":"Post-Silicon Validation and Debug","volume":"46 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-09-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128521506","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Post-Silicon Fault Localization with Satisfiability Solvers","authors":"Georg Weissenbacher, S. Malik","doi":"10.1007/978-3-319-98116-1_13","DOIUrl":"https://doi.org/10.1007/978-3-319-98116-1_13","url":null,"abstract":"","PeriodicalId":227242,"journal":{"name":"Post-Silicon Validation and Debug","volume":" 22","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-09-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132011633","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}