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CAS '99 Proceedings. 1999 International Semiconductor Conference (Cat. No.99TH8389)最新文献

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Guided-wave Si CMOS process-compatible optical interconnects 导波硅CMOS工艺兼容光互连
CAS '99 Proceedings. 1999 International Semiconductor Conference (Cat. No.99TH8389) Pub Date : 1999-12-01 DOI: 10.1109/SMICND.1999.810587
R.T. Chen, L. Wu, L. Lin, C. Choi, Y. Liu, B. Bihari, S. Tang, R. Wickman, B. Picor, Y.S. Liu
{"title":"Guided-wave Si CMOS process-compatible optical interconnects","authors":"R.T. Chen, L. Wu, L. Lin, C. Choi, Y. Liu, B. Bihari, S. Tang, R. Wickman, B. Picor, Y.S. Liu","doi":"10.1109/SMICND.1999.810587","DOIUrl":"https://doi.org/10.1109/SMICND.1999.810587","url":null,"abstract":"We report the formation of polyimide-based H-tree waveguides for a multi-GBit/sec optical clock signal distribution in a Si CMOS process compatible environment. Such a clock distribution system is to replace the existing electronic counterpart associated with high-speed supercomputers such as Cray T-90 machine.","PeriodicalId":223226,"journal":{"name":"CAS '99 Proceedings. 1999 International Semiconductor Conference (Cat. No.99TH8389)","volume":"31 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1999-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133934016","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Low temperature direct wafer bonding of silicon using a glass intermediate layer 使用玻璃中间层的硅的低温直接晶圆键合
CAS '99 Proceedings. 1999 International Semiconductor Conference (Cat. No.99TH8389) Pub Date : 1999-10-05 DOI: 10.1109/SMICND.1999.810582
V. Dragoi, M. Alexe, M. Reiche, U. Gosele
{"title":"Low temperature direct wafer bonding of silicon using a glass intermediate layer","authors":"V. Dragoi, M. Alexe, M. Reiche, U. Gosele","doi":"10.1109/SMICND.1999.810582","DOIUrl":"https://doi.org/10.1109/SMICND.1999.810582","url":null,"abstract":"Low temperature wafer bonding is desirable to bond processed wafers or dissimilar materials. The present paper proposes a low temperature silicon-to-silicon bonding process using a spin-on glass as intermediate layer. The interface bonding energy after annealing at 200/spl deg/C is about 2.3 J/m/sup 2/ and proved to be sufficient to allow further mechanical processing.","PeriodicalId":223226,"journal":{"name":"CAS '99 Proceedings. 1999 International Semiconductor Conference (Cat. No.99TH8389)","volume":"2 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1999-10-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129554020","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
A new peripheral planar structure allowing a symmetrical blocking voltage 一种新的外围平面结构，允许对称阻塞电压
CAS '99 Proceedings. 1999 International Semiconductor Conference (Cat. No.99TH8389) Pub Date : 1999-10-05 DOI: 10.1109/SMICND.1999.810387
O. Causse, P. Austin, J. Sanchez
{"title":"A new peripheral planar structure allowing a symmetrical blocking voltage","authors":"O. Causse, P. Austin, J. Sanchez","doi":"10.1109/SMICND.1999.810387","DOIUrl":"https://doi.org/10.1109/SMICND.1999.810387","url":null,"abstract":"A new peripheral symmetrical planar structure of junction termination type is presented, allowing symmetrical blocking voltage. This peripheral structure can be considered as a new element for power monolithic integration. Based on 2D simulations, this peripheral structure has been optimized to obtain the maximum two-directional breakdown voltage capability.","PeriodicalId":223226,"journal":{"name":"CAS '99 Proceedings. 1999 International Semiconductor Conference (Cat. No.99TH8389)","volume":"603 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1999-10-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123947608","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Binding energy of a hydrogenic impurity in a finite parabolic quantum dot 有限抛物量子点中含氢杂质的结合能
CAS '99 Proceedings. 1999 International Semiconductor Conference (Cat. No.99TH8389) Pub Date : 1999-10-05 DOI: 10.1109/SMICND.1999.810532
E. Niculescu, M. Cristea
{"title":"Binding energy of a hydrogenic impurity in a finite parabolic quantum dot","authors":"E. Niculescu, M. Cristea","doi":"10.1109/SMICND.1999.810532","DOIUrl":"https://doi.org/10.1109/SMICND.1999.810532","url":null,"abstract":"The binding energy of a hydrogenic donor in a spherical GaAs-Ga/sub 1-x/Al/sub x/As quantum dot with parabolic confinement is calculated by taking into account the finite value of the barrier potential. Using the effective-mass approximation, we obtained the energy of the ground state as a function of the dot size for different impurity positions. The results show that the effect of the finite value of the barrier potential is to lower the energies of the states. The differences between the proper solutions and the infinite barrier potential approximation increase noticeably, especially for on-center impurity and for small dot radii.","PeriodicalId":223226,"journal":{"name":"CAS '99 Proceedings. 1999 International Semiconductor Conference (Cat. No.99TH8389)","volume":"162 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1999-10-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114526555","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Physical properties of the (TlSbTe/sub 2/)/sub 1-X/-(2PbTe)/sub X/ system alloys (TlSbTe/sub - 2/)/sub - 1-X/-(2PbTe)/sub -X/系合金的物理性能
CAS '99 Proceedings. 1999 International Semiconductor Conference (Cat. No.99TH8389) Pub Date : 1999-10-05 DOI: 10.1109/SMICND.1999.810528
N. Popovich, V. Shura
{"title":"Physical properties of the (TlSbTe/sub 2/)/sub 1-X/-(2PbTe)/sub X/ system alloys","authors":"N. Popovich, V. Shura","doi":"10.1109/SMICND.1999.810528","DOIUrl":"https://doi.org/10.1109/SMICND.1999.810528","url":null,"abstract":"Phase diagram and results of galvanomagnetic and thermomagnetic property researches of the (TlSbTe/sub 2/)/sub 1-x/-(2PbTe)/sub x/ system alloys are presented. It was established that the (TlSbTe/sub 2/)/sub 1-x/-(2PbTe)/sub x/ system alloys represent a new narrow gap semiconductors system. The partial mutual compensation of own defects takes place in these alloys which is inherent to the initial phases TlSbTe/sub 2/ and PbTe.","PeriodicalId":223226,"journal":{"name":"CAS '99 Proceedings. 1999 International Semiconductor Conference (Cat. No.99TH8389)","volume":"12 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1999-10-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122256475","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Modeling of bulk and micromachined lumped elements for microwave and millimeter wave frequencies 微波和毫米波频率的本体和微机械集总元件建模
CAS '99 Proceedings. 1999 International Semiconductor Conference (Cat. No.99TH8389) Pub Date : 1999-10-05 DOI: 10.1109/SMICND.1999.810581
R. Marcelli, G. Bartolucci
{"title":"Modeling of bulk and micromachined lumped elements for microwave and millimeter wave frequencies","authors":"R. Marcelli, G. Bartolucci","doi":"10.1109/SMICND.1999.810581","DOIUrl":"https://doi.org/10.1109/SMICND.1999.810581","url":null,"abstract":"Bulk and micromachined lumped elements have been designed and realized on silicon and GaAs wafers. S and Meander inductors, and interdigital capacitors with eight and sixteen fingers have been obtained. These components have been characterized up to 40 GHz by means of an on wafer measurement system. The modeling has been developed by using the commercial software package HP Microwave Design System (HP-MDS) to exploit the possibilities for the simulation of lumped components utilizing coupled line elements, right angle bends and tee-junctions.","PeriodicalId":223226,"journal":{"name":"CAS '99 Proceedings. 1999 International Semiconductor Conference (Cat. No.99TH8389)","volume":"31 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1999-10-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130041470","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
New specific design methodology for functional integration 新的功能集成的具体设计方法
CAS '99 Proceedings. 1999 International Semiconductor Conference (Cat. No.99TH8389) Pub Date : 1999-10-05 DOI: 10.1109/SMICND.1999.810384
M. Marmouget, J. Sanchez, P. Austin, M. Breil, J. Laur
{"title":"New specific design methodology for functional integration","authors":"M. Marmouget, J. Sanchez, P. Austin, M. Breil, J. Laur","doi":"10.1109/SMICND.1999.810384","DOIUrl":"https://doi.org/10.1109/SMICND.1999.810384","url":null,"abstract":"In power electronics there are numerous functions not currently integrable using the smart-power technology. Recent examples show that the functional integration concept allows these functions to be achieved. A specific design methodology well suited to this integration mode is therefore presented.","PeriodicalId":223226,"journal":{"name":"CAS '99 Proceedings. 1999 International Semiconductor Conference (Cat. No.99TH8389)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1999-10-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133535790","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Capacitive threshold logic: a designer perspective 电容性阈值逻辑:设计者的观点
CAS '99 Proceedings. 1999 International Semiconductor Conference (Cat. No.99TH8389) Pub Date : 1999-10-05 DOI: 10.1109/SMICND.1999.810435
M. Padure, C. Dan, S. Cotofana, M. Bodea, S. Vassiliadis
{"title":"Capacitive threshold logic: a designer perspective","authors":"M. Padure, C. Dan, S. Cotofana, M. Bodea, S. Vassiliadis","doi":"10.1109/SMICND.1999.810435","DOIUrl":"https://doi.org/10.1109/SMICND.1999.810435","url":null,"abstract":"In this paper the authors present the main aspects of the Capacitive Threshold Logic (CTL) implementation. Several unique design problems typical to CTL design are presented using a design perspective. We also address the CTL implementation of /spl delta/-bit serial binary addition, performing a qualitative analysis of different implementation dependent approaches.","PeriodicalId":223226,"journal":{"name":"CAS '99 Proceedings. 1999 International Semiconductor Conference (Cat. No.99TH8389)","volume":"79 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1999-10-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134496087","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 14
Current trends in the electrical characterization of low-k dielectrics 低k介电材料电学特性的当前趋势
CAS '99 Proceedings. 1999 International Semiconductor Conference (Cat. No.99TH8389) Pub Date : 1999-10-05 DOI: 10.1109/SMICND.1999.810382
A. Ionescu, G. Reimbold, F. Mondon
{"title":"Current trends in the electrical characterization of low-k dielectrics","authors":"A. Ionescu, G. Reimbold, F. Mondon","doi":"10.1109/SMICND.1999.810382","DOIUrl":"https://doi.org/10.1109/SMICND.1999.810382","url":null,"abstract":"In this paper, current trends in the electrical characterization of low-k dielectrics for advanced interconnects, are presented. Emphasis is given to the study of moisture induced degradation and to the thermal effects in embedded interconnect architectures. The experimental results prove the necessity to provide new design guidelines for sub-0.25 /spl mu/m interconnects.","PeriodicalId":223226,"journal":{"name":"CAS '99 Proceedings. 1999 International Semiconductor Conference (Cat. No.99TH8389)","volume":"71 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1999-10-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127240905","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 15
A nearly ideal SiC Schottky barrier device edge termination 近乎理想的SiC肖特基势垒器件边缘端接
CAS '99 Proceedings. 1999 International Semiconductor Conference (Cat. No.99TH8389) Pub Date : 1999-10-05 DOI: 10.1109/SMICND.1999.810458
G. Brezeanu, M. Badila, J. Millán, P. Godignon, M. Locatelli, J. Chante, A. Lebedev, G. Dilimot, I. Enache, G. Bica, V. Banu
{"title":"A nearly ideal SiC Schottky barrier device edge termination","authors":"G. Brezeanu, M. Badila, J. Millán, P. Godignon, M. Locatelli, J. Chante, A. Lebedev, G. Dilimot, I. Enache, G. Bica, V. Banu","doi":"10.1109/SMICND.1999.810458","DOIUrl":"https://doi.org/10.1109/SMICND.1999.810458","url":null,"abstract":"A simple edge termination based on oxide ramp profile around the Schottky contact is used on a Ni Schottky rectifier fabricated on a 2.7/spl times/10/sup 16/ n-type 6H-SiC epilayer. Three anneals of the Schottky contacts were studied experimentally. The diodes annealed at 900/spl deg/C showed excellent reverse characteristics with a nearly ideal breakdown at about 800 V. Forward characteristics followed thermionic emission theory with ideality factor nearly one.","PeriodicalId":223226,"journal":{"name":"CAS '99 Proceedings. 1999 International Semiconductor Conference (Cat. No.99TH8389)","volume":"21 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1999-10-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114755777","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
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