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2014 IEEE 12th International New Circuits and Systems Conference (NEWCAS)最新文献

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Architectural impacts of emerging transistors 新兴晶体管对架构的影响
2014 IEEE 12th International New Circuits and Systems Conference (NEWCAS) Pub Date : 2014-06-22 DOI: 10.1109/NEWCAS.2014.6933987
A. Horváth, X. Hu, J. Nahas, M. Niemier, Indranil Palit, Robert Perricone, B. Sedighi
{"title":"Architectural impacts of emerging transistors","authors":"A. Horváth, X. Hu, J. Nahas, M. Niemier, Indranil Palit, Robert Perricone, B. Sedighi","doi":"10.1109/NEWCAS.2014.6933987","DOIUrl":"https://doi.org/10.1109/NEWCAS.2014.6933987","url":null,"abstract":"At present there is much effort to determine if emerging information processing devices could have a positive impact on the performance of non-Boolean/non-von Neumann computer architectures. We explore this topic here by specifically considering how emerging transistor technologies might impact cellular neural networks (CNNs). For CNNs, prior work suggests that new transistor structures could be employed to better facilitate non-binary outputs - that in turn reduce the number of template/programming operations as well as the hardware paths needed to solve a given problem. Here, we present analysis that considers how the above approach could impact the performance/energy of the cells that comprise the CNN. We also consider how characteristics of other emerging transistor technologies could positively impact CNNs - particularly with respect to reduced program complexity.","PeriodicalId":216848,"journal":{"name":"2014 IEEE 12th International New Circuits and Systems Conference (NEWCAS)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-06-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134600837","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
Design of a wideband 1.5GHz to 3GHz class EF2 power amplifier 设计一种宽带1.5GHz至3GHz类EF2功率放大器
2014 IEEE 12th International New Circuits and Systems Conference (NEWCAS) Pub Date : 2014-06-22 DOI: 10.1109/NEWCAS.2014.6934011
H. Madureira, N. Deltimple, S. Haddad, D. Belot, E. Kerhervé
{"title":"Design of a wideband 1.5GHz to 3GHz class EF2 power amplifier","authors":"H. Madureira, N. Deltimple, S. Haddad, D. Belot, E. Kerhervé","doi":"10.1109/NEWCAS.2014.6934011","DOIUrl":"https://doi.org/10.1109/NEWCAS.2014.6934011","url":null,"abstract":"A class EF2 power amplifier with 32.7dB power gain is presented. To the authors' knowledge, this class has never been presented in PA design in RF frequency. The class EF2 power amplifier presents lower voltage stress than its class E counterpart due to waveform engineering. The presented circuit was designed in standard ST Microelectronics CMOS 130nm and is able to deliver 20dBm RF output power from a 2V supply voltage with 55% drain efficiency and 49.8% PAE at 2.5GHz. The output power spectrum presents 34.7dB power difference between the fundamental frequency and the strongest upper harmonic. The circuit is able to work from 1.5GHz up to 3.0GHz if the 3dB power criterion is observed. A 500MHz bandwidth around 2.35GHz was achieved in which the performances stay fairly constant: output power varies only 0.6dB and PAE varies 2.5%. Both 1dB output power bandwidth and -3% PAE bandwidth is found to be around 28.2%. The total used area is 1660um × 1470um.","PeriodicalId":216848,"journal":{"name":"2014 IEEE 12th International New Circuits and Systems Conference (NEWCAS)","volume":"20 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-06-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123608702","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 6
Self-timed rings as low-phase noise programmable oscillators 自定时环作为低相位噪声可编程振荡器
2014 IEEE 12th International New Circuits and Systems Conference (NEWCAS) Pub Date : 2014-06-22 DOI: 10.1109/NEWCAS.2014.6934069
L. Fesquet, A. Cherkaoui, Oussama Elissati
{"title":"Self-timed rings as low-phase noise programmable oscillators","authors":"L. Fesquet, A. Cherkaoui, Oussama Elissati","doi":"10.1109/NEWCAS.2014.6934069","DOIUrl":"https://doi.org/10.1109/NEWCAS.2014.6934069","url":null,"abstract":"Self-timed rings are promising for designing high-speed serial links and system clock generators. Indeed, their architecture is well-suited to digitally control their frequency and to easily adapt their phase noise by design. Self-timed ring oscillation frequency does not only depend on the number of stages as the usual inverter ring oscillators but also on their initial state. This feature is extremely important to make them programmable. Moreover, with such ring oscillators, it is easy to control the phase noise by design. Indeed, 3dB phase noise reduction is obtained at the cost of higher power consumption when the number of stages is doubled while keeping the same oscillation frequency, thanks to the oscillator programmability. In this paper, we completely describe the method to design self-timed rings in order to make them programmable and to generate a phase noise in accordance with the specifications. Test chips have been designed and fabricated in AMS 0.35 μm and in STMicroelectonics CMOS 65 nm technology to verify our models and theoretical claims.","PeriodicalId":216848,"journal":{"name":"2014 IEEE 12th International New Circuits and Systems Conference (NEWCAS)","volume":"167 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-06-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121173969","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 6
Fully-integrated 86 mV–1V step-up converter for energy harvesting applications 完全集成的86 mV-1V升压转换器，用于能量收集应用
2014 IEEE 12th International New Circuits and Systems Conference (NEWCAS) Pub Date : 2014-06-22 DOI: 10.1109/NEWCAS.2014.6934080
M. B. Machado, M. C. Schneider, M. Sawan, C. Galup-Montoro
{"title":"Fully-integrated 86 mV–1V step-up converter for energy harvesting applications","authors":"M. B. Machado, M. C. Schneider, M. Sawan, C. Galup-Montoro","doi":"10.1109/NEWCAS.2014.6934080","DOIUrl":"https://doi.org/10.1109/NEWCAS.2014.6934080","url":null,"abstract":"In this paper, we present a fully-integrated step-up converter for energy-harvesting applications able to operate from supply voltages below 4kT/q ≅ 100 mV. Expressions for the operation of the main blocks of the topology, the enhanced swing ring oscillator and the Dickson charge pump operating at ultra-low-voltages, are derived. A fully-integrated converter design implemented in a 130 nm CMOS technology confirmed the ultra-low-voltage operation of the converter, generating a DC output of 1V at a current consumption of 1 μA from an input voltage of 86 mV.","PeriodicalId":216848,"journal":{"name":"2014 IEEE 12th International New Circuits and Systems Conference (NEWCAS)","volume":"81 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-06-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125233685","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 10
Two reconstructors for m-channel time-interleaved ADCs with missing samples 缺少采样的m通道时间交错adc的两个重构器
2014 IEEE 12th International New Circuits and Systems Conference (NEWCAS) Pub Date : 2014-06-22 DOI: 10.1109/NEWCAS.2014.6933980
A. K. M. Pillai, H. Johansson
{"title":"Two reconstructors for m-channel time-interleaved ADCs with missing samples","authors":"A. K. M. Pillai, H. Johansson","doi":"10.1109/NEWCAS.2014.6933980","DOIUrl":"https://doi.org/10.1109/NEWCAS.2014.6933980","url":null,"abstract":"In this paper, we explore two nonrecursive reconstructors which recover the uniform-grid samples from the output of a time-interleaved analog-to-digital converter (TI-ADC) that uses some of the sampling instants for estimating the mismatches in the TI-ADC. Nonuniform sampling occurs due to timing mismatches between the individual channel ADCs and also due to missing input samples. Compared to a previous solution, the reconstructors presented here offer substantially lower computational complexity.","PeriodicalId":216848,"journal":{"name":"2014 IEEE 12th International New Circuits and Systems Conference (NEWCAS)","volume":"25 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-06-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125935414","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Accurate, wide range analog sine shaping circuits 精确，宽范围模拟正弦整形电路
2014 IEEE 12th International New Circuits and Systems Conference (NEWCAS) Pub Date : 2014-06-22 DOI: 10.1109/NEWCAS.2014.6934038
Tsung-Hsueh Lee, P. Abshire
{"title":"Accurate, wide range analog sine shaping circuits","authors":"Tsung-Hsueh Lee, P. Abshire","doi":"10.1109/NEWCAS.2014.6934038","DOIUrl":"https://doi.org/10.1109/NEWCAS.2014.6934038","url":null,"abstract":"Sine shaping functionality is important in many applications. Existing circuit implementations are typically restricted in input voltage or input angular range, limiting their usefulness in real-world applications. In this contribution we introduce resistive source degeneration and transconductance attenuation so that sine shaping circuits can accept an arbitrary input range and achieve high accuracy. We present detailed analysis including accuracy and efficiency of the circuits using approximation with the sum of multiple hyperbolic tangent like functions. We also describe a design methodology that satisfies specific requirements for a sine shaping circuit. The design was verified with two examples in simulation using a BSIM3.3 model and nearly perfect sine function circuit was demonstrated. The applicability of this circuit for a triangle-to-sine converter was also verified using Monte Carlo simulation. Compared to other sine waveform generators this circuit has an extended frequency range and requires the lowest power.","PeriodicalId":216848,"journal":{"name":"2014 IEEE 12th International New Circuits and Systems Conference (NEWCAS)","volume":"51 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-06-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132755633","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
On the performance of a hybrid memristor/MOS π-attenuator circuit 忆阻器/MOS π衰减器混合电路的性能研究
2014 IEEE 12th International New Circuits and Systems Conference (NEWCAS) Pub Date : 2014-06-22 DOI: 10.1109/NEWCAS.2014.6934059
T. Wey, W. Jemison
{"title":"On the performance of a hybrid memristor/MOS π-attenuator circuit","authors":"T. Wey, W. Jemison","doi":"10.1109/NEWCAS.2014.6934059","DOIUrl":"https://doi.org/10.1109/NEWCAS.2014.6934059","url":null,"abstract":"This paper describes a new embodiment of a variable n-attenuator circuit that uses MOS transistors as the shunt elements and a TiO2 memristor as the pass element. By taking advantage of the unique frequency response of the memristor, the architecture offers the potential of improved linearity over recent all MOS transistor design. Spice simulations using 0.13um CMOS BSIM3v3 transistor models and a SPICE model for the Hewlett Packard TiO2 memristor show that the memristor-based π-attenuator exhibits the expected linearity improvement compared to a monolithic CMOS π-attenuator circuit.","PeriodicalId":216848,"journal":{"name":"2014 IEEE 12th International New Circuits and Systems Conference (NEWCAS)","volume":"2123 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-06-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130116744","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Survey on device-to-device communications: Challenges and design issues 设备对设备通信的调查:挑战和设计问题
2014 IEEE 12th International New Circuits and Systems Conference (NEWCAS) Pub Date : 2014-06-22 DOI: 10.1109/NEWCAS.2014.6934057
R. Alkurd, R. Shubair, I. Abualhaol
{"title":"Survey on device-to-device communications: Challenges and design issues","authors":"R. Alkurd, R. Shubair, I. Abualhaol","doi":"10.1109/NEWCAS.2014.6934057","DOIUrl":"https://doi.org/10.1109/NEWCAS.2014.6934057","url":null,"abstract":"Device-to-Device (D2D) communications has been proposed to cellular networks in order to optimize spectrum efficiency and resources utilization. In D2D-assisted networks, the traditional cellular communication techniques are not applicable but rather need to be redesigned to fulfill new requirements. Therefore, new communication techniques are proposed to take the advantages of the D2D connectivity in the network. In this paper, we describe the concept of D2D communications. Then, we review the main challenges and design issues of D2D-assisted networks. This survey focuses on cooperative communications in D2D-assisted networks and addresses challenges which limit the performance of the cooperative D2D-assisted networks such as relay selection, power consumption and multi-casting. Moreover, design issues and approaches to overcome these limitations are explained.","PeriodicalId":216848,"journal":{"name":"2014 IEEE 12th International New Circuits and Systems Conference (NEWCAS)","volume":"445 2","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-06-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131578603","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 54
Collision avoidance improvement using a risky area 使用危险区域进行防撞改进
2014 IEEE 12th International New Circuits and Systems Conference (NEWCAS) Pub Date : 2014-06-22 DOI: 10.1109/NEWCAS.2014.6934041
A. A. Maranga, H. Zhu, D. Gingras, D. Gruyer
{"title":"Collision avoidance improvement using a risky area","authors":"A. A. Maranga, H. Zhu, D. Gingras, D. Gruyer","doi":"10.1109/NEWCAS.2014.6934041","DOIUrl":"https://doi.org/10.1109/NEWCAS.2014.6934041","url":null,"abstract":"The approach presented in this paper deals with the safety while driving. Keeping a headway distance between two vehicles is mandatory in order to avoid a collision. It is also important to take into account the length of the concerned vehicle mainly if a sudden break occurs. The idea of zone of collision is therefore useful. An estimate of vehicles location and their respective uncertainty is first computed then area of collision is performed using the length of the vehicles and the probability density function of their position. Other ADAS application such as ACC, collision avoidance, lane change assistance... can be improved. Thank to this concept a driver can react immediately once getting close to the estimated risky zone.","PeriodicalId":216848,"journal":{"name":"2014 IEEE 12th International New Circuits and Systems Conference (NEWCAS)","volume":"22 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-06-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131983809","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A contour preserving FPGA architecture for PAL to XGA format conversion PAL到XGA格式转换的轮廓保持FPGA架构
2014 IEEE 12th International New Circuits and Systems Conference (NEWCAS) Pub Date : 2014-06-22 DOI: 10.1109/NEWCAS.2014.6934019
F. Amiel, Boubacar Barry, M. Trocan
{"title":"A contour preserving FPGA architecture for PAL to XGA format conversion","authors":"F. Amiel, Boubacar Barry, M. Trocan","doi":"10.1109/NEWCAS.2014.6934019","DOIUrl":"https://doi.org/10.1109/NEWCAS.2014.6934019","url":null,"abstract":"Frame format conversion represents a key part of video display systems, as usually the transmission video stream resolution is different from the screen resolution of the digital display. In this paper a contour-preserving approach for video up-scaling is proposed, along with a low-cost, efficient FPGA architecture for one of the most used format conversions, namely PAL to XGA. The algorithm first checks for edges existence within the region around the pixel to be interpolated and adapts the scaling method following the contour direction. This adaptive system keeps the edges sharp and provides good quality scaled video sequences when compared with other scaling methods. Moreover, we propose an FPGA implementation for handling the algorithm reload, very efficient in terms of resources and complexity.","PeriodicalId":216848,"journal":{"name":"2014 IEEE 12th International New Circuits and Systems Conference (NEWCAS)","volume":"13 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-06-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114299254","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
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