2022 30th Euromicro International Conference on Parallel, Distributed and Network-based Processing (PDP)最新文献

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A Parallel Implementation of the Triangular Shepard Interpolation Method 三角Shepard插值法的并行实现
F. Dell’Accio, F. D. Tommaso, Andrea Giordano, R. Rongo, W. Spataro
{"title":"A Parallel Implementation of the Triangular Shepard Interpolation Method","authors":"F. Dell’Accio, F. D. Tommaso, Andrea Giordano, R. Rongo, W. Spataro","doi":"10.1109/pdp55904.2022.00044","DOIUrl":"https://doi.org/10.1109/pdp55904.2022.00044","url":null,"abstract":"The triangular Shepard interpolation method is an extension of the well-known bivariate Shepard’s method for interpolating large sets of scattered data. In particular, the classical point-based weight functions are substituted by basis functions built upon triangulation of the scattered points. As shown in the literature, this method exhibits advantages with respect to other interpolation methods for interpolating scattered bivariate data. Nevertheless, as the size of the data set increases, an efficient implementation of the method becomes more and more necessary. In this paper, we present a parallel implementation of the triangular Shepard interpolation method that beside exploiting benefits due to the parallelization itself, introduces a novel approach for the triangulation of the scattered data.","PeriodicalId":210759,"journal":{"name":"2022 30th Euromicro International Conference on Parallel, Distributed and Network-based Processing (PDP)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2022-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123481391","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Using High Performance Approaches to Covid-19 Vaccines Sentiment Analysis 基于高性能方法的Covid-19疫苗情绪分析
Areeba Umair, E. Masciari
{"title":"Using High Performance Approaches to Covid-19 Vaccines Sentiment Analysis","authors":"Areeba Umair, E. Masciari","doi":"10.1109/pdp55904.2022.00038","DOIUrl":"https://doi.org/10.1109/pdp55904.2022.00038","url":null,"abstract":"Coronavirus has emerged as challenge for the whole mankind causing illness worldwide. To eradicate the disease, global efforts are put increasing to develop its vaccine. In order to achieve the immunity against the virus, wide provision of vaccine is necessary. To make sure the distribution of vaccines, the sentiments of people for vaccines must be analyzed. Now-a-days, people share their thoughts, feelings and feedback about anything they experience on social media platforms. In this study, high performance approaches have been used for the analysis of the sentiments of people about vaccines. In this study, we have used the freely available data and applied pre-processing over it. We found out the polarity values of the tweets using TextBlob() function of Python and drew the wordclouds for positive, negative and neutral tweets. We used BERT model for understanding the people’s feelings and feedback about vaccines. The model evaluation was performed using precision, recall and F measure. The BERT model achieved achieved 55 % & 54 % precision, 69 % & 85 % recall and 58 % & 64 % F score for positive class and negative class respectively. Therefore, the use of artificial intelligence in social media analysis produce fruitful results while determining the people’s attitude towards ant new trend, topic and any emergency situation. These methods helps to grow the vaccines campaigns timely by solving the people’s concerns about vaccines.","PeriodicalId":210759,"journal":{"name":"2022 30th Euromicro International Conference on Parallel, Distributed and Network-based Processing (PDP)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2022-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127438100","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Analysis of the Interactions Between ILP and TLP With Hardware Transactional Memory 基于硬件事务性内存的ILP和TLP交互分析
Victor Nicolas-Conesa, J. Gil, Ricardo Fernández Pascual, Alberto Ros, M. Acacio
{"title":"Analysis of the Interactions Between ILP and TLP With Hardware Transactional Memory","authors":"Victor Nicolas-Conesa, J. Gil, Ricardo Fernández Pascual, Alberto Ros, M. Acacio","doi":"10.1109/pdp55904.2022.00032","DOIUrl":"https://doi.org/10.1109/pdp55904.2022.00032","url":null,"abstract":"Hardware Transactional Memory (HTM) allows the use of transactions by programmers, making parallel programming easier and theoretically obtaining the performance of fine-grained locks. However, transactions can abort for a variety of reasons, resulting in the squash of speculatively executed instructions and the consequent loss in both performance and energy efficiency. Among the different sources of abort, conflicting concurrent accesses to the same shared memory locations from different transactions are often the prevalent cause.In this work, we characterize, for the first time to the best of our knowledge, how the aggressiveness of the cores in terms of exploiting instruction-level parallelism can interact with thread-level speculation support brought by HTM systems. We observe that altering the size of the structures that support out-of-order and speculative execution changes the number of aborts produced in the execution of transactional workloads on a best-effort HTM implementation. Our results show that a small number of powerful cores is more suitable for high-contention scenarios, whereas under low contention it is preferable to use a larger number of less aggressive cores. In addition, an aggressive core can lead to performance loss in medium-contention scenarios due to an increase in the number of aborts. We conclude that depending on contention, a careful choice over processor aggressiveness can reduce abort ratios.","PeriodicalId":210759,"journal":{"name":"2022 30th Euromicro International Conference on Parallel, Distributed and Network-based Processing (PDP)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2022-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123107285","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Towards Resilient and Efficient Big Data Storage: Evaluating a SIEM Repository Based on HDFS 迈向弹性高效的大数据存储:基于HDFS的SIEM存储库评估
I. Saenko, Igor Kotenko
{"title":"Towards Resilient and Efficient Big Data Storage: Evaluating a SIEM Repository Based on HDFS","authors":"I. Saenko, Igor Kotenko","doi":"10.1109/pdp55904.2022.00051","DOIUrl":"https://doi.org/10.1109/pdp55904.2022.00051","url":null,"abstract":"Building an efficient, scalable, distributed storage system is challenging in a variety of industries. Currently, the most promising and efficient way to organize this method of data storage is using the Hadoop Distributed File System (HDFS). It is of interest to develop an approach to optimize the distribution of replicas across storage nodes, which allows one to provide the required resilience and efficiency of storing big data in distributed systems based on HDFS. The analysis showed that in the well-known works on processing big data, the issues of simultaneous provision of resilient and efficient data storage are practically not raised. The paper proposes an approach based on the application of the developed probabilistic models for assessing the resilience and efficiency of data storage. The models take into account the random and deterministic modes of distribution of data blocks across the network nodes and allow one to solve the task of providing resilient and efficient big data storage in three kinds of criteria: resilience maximization, efficiency maximization, and restrictions of resilience and efficiency. The objective of the experiment was to optimize the variables of the the security information and event management (SIEM) system. Experiments have confirmed the effectiveness of the proposed approach and the possibility of solving with its help the assigned tasks to satisfy the three selected species. At the same time, genetic algorithms (GAs) were used for the deterministic mode, in which some improvements were introduced regarding the construction of chromosomes and types of fitness functions.","PeriodicalId":210759,"journal":{"name":"2022 30th Euromicro International Conference on Parallel, Distributed and Network-based Processing (PDP)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2022-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"120897323","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
ESCA: Effective System Call Aggregation for Event-Driven Servers ESCA:事件驱动服务器的有效系统调用聚合
Y. Cheng, C. Huang, Chia-Heng Tu
{"title":"ESCA: Effective System Call Aggregation for Event-Driven Servers","authors":"Y. Cheng, C. Huang, Chia-Heng Tu","doi":"10.1109/pdp55904.2022.00012","DOIUrl":"https://doi.org/10.1109/pdp55904.2022.00012","url":null,"abstract":"The switches between a non-privileged application and the OS kernel running in the CPU’s supervisor mode have been inducing performance costs despite manufacturer efforts to provide special instructions for such transition. Software that heavily interacts with the underlying OS (e.g., I/O intensive and event-driven applications) suffers from system call overhead. To deteriorate this situation, security vulnerabilities in modern processors have prompted kernel mitigations that further increase the transition overhead. Particularly system-call-heavy applications have been reported to be slowed down by up to 30% with kernel page-table isolation (KPTI), the widely deployed mitigation for the Meltdown vulnerability. To decouple system calls from mode transitions, we revisit an old idea known as system-call batching or multi-calls: the bundling of system calls into a combined call, which only incurs the mode-transition costs of a single one. And then, we have implemented ESCA scheme to adapt system-call batching to Linux-based servers in the light of Meltdown and Spectre, effectively eliminating the slowdown of KPTI-affected applications. Our evaluation shows that the throughputs of real-world applications, benefiting from ESCA, can be improved with only 2 lines of code changed respectively: Nginx by up to 12%, lighttpd by up to 23%, and Redis by 4%. Meanwhile, using aggregated transitions, our approach allows faster system calls interleaved with full compatibility but without requiring Linux kernel patches.","PeriodicalId":210759,"journal":{"name":"2022 30th Euromicro International Conference on Parallel, Distributed and Network-based Processing (PDP)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2022-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116039915","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Towards Parallel Data Stream Processing on System-on-Chip CPU+GPU Devices 片上系统CPU+GPU设备的并行数据流处理
G. Mencagli, Dalvan Griebler, M. Danelutto
{"title":"Towards Parallel Data Stream Processing on System-on-Chip CPU+GPU Devices","authors":"G. Mencagli, Dalvan Griebler, M. Danelutto","doi":"10.1109/pdp55904.2022.00014","DOIUrl":"https://doi.org/10.1109/pdp55904.2022.00014","url":null,"abstract":"Data Stream Processing is a pervasive computing paradigm with a wide spectrum of applications. Traditional streaming systems exploit the processing capabilities provided by homogeneous Clusters and Clouds. Due to the transition to streaming systems suitable for IoT/Edge environments, there has been the urgent need of new streaming frameworks and tools tailored for embedded platforms, often available as System-onChips composed of a small multicore CPU and an integrated onchip GPU. Exploiting this hybrid hardware requires special care in the runtime system design. In this paper, we discuss the support provided by the WindFlow library, showing its design principles and its effectiveness on the NVIDIA Jetson Nano board.","PeriodicalId":210759,"journal":{"name":"2022 30th Euromicro International Conference on Parallel, Distributed and Network-based Processing (PDP)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2022-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134108749","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Predicting the Soft Error Vulnerability of GPGPU Applications GPGPU应用软件软错误漏洞预测
Burak Topçu, Işıl Öz
{"title":"Predicting the Soft Error Vulnerability of GPGPU Applications","authors":"Burak Topçu, Işıl Öz","doi":"10.1109/pdp55904.2022.00025","DOIUrl":"https://doi.org/10.1109/pdp55904.2022.00025","url":null,"abstract":"As Graphics Processing Units (GPUs) have evolved to deliver performance increases for general-purpose computations as well as graphics and multimedia applications, soft error reliability becomes an important concern. The soft error vulnerability of the applications is evaluated via fault injection experiments. Since performing fault injection takes impractical times to cover the fault locations in complex GPU hardware structures, prediction-based techniques have been proposed to evaluate the soft error vulnerability of General-Purpose GPU (GPGPU) programs based on the hardware performance characteristics.In this work, we propose ML-based prediction models for the soft error vulnerability evaluation of GPGPU programs. We consider both program characteristics and hardware performance metrics collected from either the simulation or the profiling tools. While we utilize regression models for the prediction of the masked fault rates, we build classification models to specify the vulnerability level of the programs based on their silent data corruption (SDC) and crash rates. Our prediction models achieve maximum prediction accuracy rates of 96.6%, 82.6%, and 87% for masked fault rates, SDCs, and crashes, respectively.","PeriodicalId":210759,"journal":{"name":"2022 30th Euromicro International Conference on Parallel, Distributed and Network-based Processing (PDP)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2022-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131580557","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
An Adaptive Cooperative Coevolutionary Algorithm for Parallel Feature Selection in High-Dimensional Datasets 高维数据集并行特征选择的自适应协同进化算法
Marjan Firouznia, G. Trunfio
{"title":"An Adaptive Cooperative Coevolutionary Algorithm for Parallel Feature Selection in High-Dimensional Datasets","authors":"Marjan Firouznia, G. Trunfio","doi":"10.1109/pdp55904.2022.00040","DOIUrl":"https://doi.org/10.1109/pdp55904.2022.00040","url":null,"abstract":"Nowadays, it is common in many disciplines and application fields to collect large volumes of data characterized by a high number of features. Such datasets are at the basis of modern applications of supervised Machine Learning, where the goal is to create a classifier for newly presented data. However, it is well known that the presence of irrelevant features in the dataset can lead to a harder learning phase and, above all, can produce suboptimal classifiers. For this reason, the ability to select an appropriate subset of the available features is becoming increasingly important. Traditionally, optimization metaheuristics have been used with success in the task of feature selection. However, many of the approaches presented in the literature are not applicable to datasets with thousands of features since common optimization algorithms often suffer from poor scalability with respect to the size of the search space. In this paper, the problem of feature subset optimization is successfully addressed by a cooperative coevolutionary algorithm based on Differential Evolution. In the proposed algorithm, parallelized for multi-threaded execution on shared-memory architectures, a suitable strategy for reducing the dimensionality of the search space and adapting the population size during the optimization results in a significant performance. A numerical investigation on some high-dimensional datasets show that, in most cases, the proposed approach can achieve smaller feature subsets and higher classification performance than other state-of-the-art methods.","PeriodicalId":210759,"journal":{"name":"2022 30th Euromicro International Conference on Parallel, Distributed and Network-based Processing (PDP)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2022-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121843158","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Evaluating Micro-batch and Data Frequency for Stream Processing Applications on Multi-cores 多核流处理应用的微批处理和数据频率评估
A. Garcia, Dalvan Griebler, C. Schepke, L. G. Fernandes
{"title":"Evaluating Micro-batch and Data Frequency for Stream Processing Applications on Multi-cores","authors":"A. Garcia, Dalvan Griebler, C. Schepke, L. G. Fernandes","doi":"10.1109/pdp55904.2022.00011","DOIUrl":"https://doi.org/10.1109/pdp55904.2022.00011","url":null,"abstract":"In stream processing, data arrives constantly and is often unpredictable. It can show large fluctuations in arrival frequency, size, complexity, and other factors. These fluctuations can strongly impact application latency and throughput, which are critical factors in this domain. Therefore, there is a significant amount of research on self-adaptive techniques involving elasticity or micro-batching as a way to mitigate this impact. However, there is a lack of benchmarks and tools for helping researchers to investigate micro-batching and data stream frequency implications. In this paper, we extend a benchmarking framework to support dynamic micro-batching and data stream frequency management. We used it to create custom benchmarks and compare latency and throughput aspects from two different parallel libraries. We validate our solution through an extensive analysis of the impact of micro-batching and data stream frequency on stream processing applications using Intel TBB and FastFlow, which are two libraries that leverage stream parallelism on multi-core architectures. Our results demonstrated up to 33% throughput gain over latency using micro-batches. Additionally, while TBB ensures lower latency, FastFlow ensures higher throughput in the parallel applications for different data stream frequency configurations.","PeriodicalId":210759,"journal":{"name":"2022 30th Euromicro International Conference on Parallel, Distributed and Network-based Processing (PDP)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2022-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131077208","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
dsODENet: Neural ODE and Depthwise Separable Convolution for Domain Adaptation on FPGAs 基于深度可分离卷积的fpga域自适应研究
Hiroki Kawakami, Hirohisa Watanabe, K. Sugiura, Hiroki Matsutani
{"title":"dsODENet: Neural ODE and Depthwise Separable Convolution for Domain Adaptation on FPGAs","authors":"Hiroki Kawakami, Hirohisa Watanabe, K. Sugiura, Hiroki Matsutani","doi":"10.1109/pdp55904.2022.00031","DOIUrl":"https://doi.org/10.1109/pdp55904.2022.00031","url":null,"abstract":"High-performance deep neural network (DNN)-based systems are in high demand in edge environments. Due to its high computational complexity, it is challenging to deploy DNNs on edge devices with strict limitations on computational resources. In this paper, we derive a compact while highly-accurate DNN model, termed dsODENet, by combining recently-proposed parameter reduction techniques: Neural ODE (Ordinary Differential Equation) and DSC (Depthwise Separable Convolution). Neural ODE exploits a similarity between ResNet and ODE, and shares most of weight parameters among multiple layers, which greatly reduces the memory consumption. We apply dsODENet to a domain adaptation as a practical use case with image classification datasets. We also propose a resource-efficient FPGA-based design for dsODENet, where all the parameters and feature maps except for pre- and post-processing layers can be mapped onto onchip memories. It is implemented on Xilinx ZCU104 board and evaluated in terms of domain adaptation accuracy, training speed, FPGA resource utilization, and speedup rate compared to a software counterpart. The results demonstrate that dsODENet achieves comparable or slightly better domain adaptation accuracy compared to our baseline Neural ODE implementation, while the total parameter size without pre- and post-processing layers is reduced by 54.2% to 79.8%. Our FPGA implementation accelerates the inference speed by 27.9 times.","PeriodicalId":210759,"journal":{"name":"2022 30th Euromicro International Conference on Parallel, Distributed and Network-based Processing (PDP)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2022-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126677288","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
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