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2019 26th IEEE International Conference on Electronics, Circuits and Systems (ICECS)最新文献

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Integrated Airborne Particle Matter Detector 集成空气粒子物质探测器
2019 26th IEEE International Conference on Electronics, Circuits and Systems (ICECS) Pub Date : 2019-11-01 DOI: 10.1109/ICECS46596.2019.8964927
Umberto Ferlito, A. D. Grasso, M. Vaiana, G. Bruno
{"title":"Integrated Airborne Particle Matter Detector","authors":"Umberto Ferlito, A. D. Grasso, M. Vaiana, G. Bruno","doi":"10.1109/ICECS46596.2019.8964927","DOIUrl":"https://doi.org/10.1109/ICECS46596.2019.8964927","url":null,"abstract":"This paper describes the first results of a research project that aims to the development of a miniaturized atmospheric particulate matter sensor. The detector relies on a gravimetric selection of the particle size and on an integrated capacitive sensing interface. In this communication, in particular, preliminary results regarding the electronic readout are presented.","PeriodicalId":209054,"journal":{"name":"2019 26th IEEE International Conference on Electronics, Circuits and Systems (ICECS)","volume":"14 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127195947","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 5
A Python-Verilog Toolbox for Modeling of a Hadamard Gate Based on Position-Based CMOS Qubits 基于位置CMOS量子比特的Hadamard门的Python-Verilog工具箱建模
2019 26th IEEE International Conference on Electronics, Circuits and Systems (ICECS) Pub Date : 2019-11-01 DOI: 10.1109/ICECS46596.2019.8965149
P. Giounanlis, E. Blokhina, Imran Bashir, Dirk R. Leipold, Mike Asker, R. Staszewski
{"title":"A Python-Verilog Toolbox for Modeling of a Hadamard Gate Based on Position-Based CMOS Qubits","authors":"P. Giounanlis, E. Blokhina, Imran Bashir, Dirk R. Leipold, Mike Asker, R. Staszewski","doi":"10.1109/ICECS46596.2019.8965149","DOIUrl":"https://doi.org/10.1109/ICECS46596.2019.8965149","url":null,"abstract":"Quantum operation based on CMOS technology has suddenly become popular. Among key challenges for the design and optimization of such structures operating in the quantum regime are the ability to simulate the quantum behavior and to integrate the quantum core with the rest of surrounding (classical) circuity. In this paper, we develop a quantum library for semiconductor position-based qubits and further discuss the appropriate physical formalism and methodology. The resulting toolbox implements a Hadamard quantum gate established through a Python-Verilog interface.","PeriodicalId":209054,"journal":{"name":"2019 26th IEEE International Conference on Electronics, Circuits and Systems (ICECS)","volume":"31 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126365181","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Optimal Input-Dependent Edge-Cloud Partitioning for RNN Inference RNN推理的最优输入相关边缘云划分
2019 26th IEEE International Conference on Electronics, Circuits and Systems (ICECS) Pub Date : 2019-11-01 DOI: 10.1109/ICECS46596.2019.8965079
D. J. Pagliari, R. Chiaro, Yukai Chen, E. Macii, M. Poncino
{"title":"Optimal Input-Dependent Edge-Cloud Partitioning for RNN Inference","authors":"D. J. Pagliari, R. Chiaro, Yukai Chen, E. Macii, M. Poncino","doi":"10.1109/ICECS46596.2019.8965079","DOIUrl":"https://doi.org/10.1109/ICECS46596.2019.8965079","url":null,"abstract":"Recurrent Neural Networks (RNNs) such as those based on the Long-Short Term Memory (LSTM) architecture are state-of-the-art deep learning models for sequence analysis. Given the complexity of RNN-based inference, IoT devices typically offload this task to a cloud server. However, the complexity of RNN inference strongly depends on the length of the processed input sequence. Therefore, when communication time is taken into account, it may be more convenient to process short input sequences locally and only offload long ones to the cloud. In this paper, we propose a low-overhead runtime tool that performs this decision automatically. Results based on performance profiling of real edge and cloud devices show that our method is able to reduce the total execution time of the system by up to 20% compared to solutions that execute the RNN inference fully locally or fully in the cloud.","PeriodicalId":209054,"journal":{"name":"2019 26th IEEE International Conference on Electronics, Circuits and Systems (ICECS)","volume":"5 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121847695","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
A 70 GHz Small-signal Bandwidth 40 GS/s Track-and-Hold Amplifier in 130 nm SiGe BiCMOS Technology 一种基于130nm SiGe BiCMOS技术的70ghz小信号带宽40gs /s跟踪保持放大器
2019 26th IEEE International Conference on Electronics, Circuits and Systems (ICECS) Pub Date : 2019-11-01 DOI: 10.1109/ICECS46596.2019.8965046
Liang Wu, Maxim Weizel, C. Scheytt
{"title":"A 70 GHz Small-signal Bandwidth 40 GS/s Track-and-Hold Amplifier in 130 nm SiGe BiCMOS Technology","authors":"Liang Wu, Maxim Weizel, C. Scheytt","doi":"10.1109/ICECS46596.2019.8965046","DOIUrl":"https://doi.org/10.1109/ICECS46596.2019.8965046","url":null,"abstract":"This paper presents a broadband track-and-hold amplifier (THA) based on switched-emitter-follower (SEF) topology. The THA exhibits a record 3dB small-signal bandwidth of 70 GHz. With the high sampling rate of 40 GS/s, it achieves an effective number of bits (ENOB) of 7.5 bit at 1 GHz input frequency and an ENOB of >5 bit up to 15 GHz input frequency. The chip was fabricated in a 130 nm SiGe BiCMOS technology from IHP (SG13G2). It draws 110 mA from a −4 V supply voltage, dissipating 440 mW.","PeriodicalId":209054,"journal":{"name":"2019 26th IEEE International Conference on Electronics, Circuits and Systems (ICECS)","volume":"84 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124961442","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
Analog-Mixed-Signal Simulation of DC-DC Boost-Based MPPT System Taking into Account Weather Conditions Variations 考虑天气条件变化的DC-DC升压MPPT系统模拟混合信号仿真
2019 26th IEEE International Conference on Electronics, Circuits and Systems (ICECS) Pub Date : 2019-11-01 DOI: 10.1109/ICECS46596.2019.8964815
F. Bizzarri, A. Brambilla, A. E. Aroudi
{"title":"Analog-Mixed-Signal Simulation of DC-DC Boost-Based MPPT System Taking into Account Weather Conditions Variations","authors":"F. Bizzarri, A. Brambilla, A. E. Aroudi","doi":"10.1109/ICECS46596.2019.8964815","DOIUrl":"https://doi.org/10.1109/ICECS46596.2019.8964815","url":null,"abstract":"DC-DC converters are widely used as interfaces between photovoltaic (PV) sources and loads in different applications. These devices use inductors as energy storage elements for controlling the power flow from the PV source to the load. These systems are usually designed using conventional linear small-signal approaches in the vicinity of an operating point. However, the operating point of a PV system is highly dependent on the environmental conditions such as the irradiance and the temperature. Irradiance and temperature changes make the system work at different power and current levels. The inductance of a nonlinear real inductor strongly depends on the operating current. In this paper, a study of a boost converter used for maximum power point tracking is presented by taking into account the inductor nonlinearity till saturation and the variation of its inductance with the weather conditions. To this end analog-mixed-signal circuit simulations are used to show the effects of the weather conditions on the dynamical behavior of the overall PV system.","PeriodicalId":209054,"journal":{"name":"2019 26th IEEE International Conference on Electronics, Circuits and Systems (ICECS)","volume":"38 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123568891","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Digital Signal Processing Accelerator for RISC-V RISC-V数字信号处理加速器
2019 26th IEEE International Conference on Electronics, Circuits and Systems (ICECS) Pub Date : 2019-11-01 DOI: 10.1109/ICECS46596.2019.8964670
L. Calicchia, V. Ciotoli, G. Cardarilli, L. Nunzio, R. Fazzolari, A. Nannarelli, M. Re
{"title":"Digital Signal Processing Accelerator for RISC-V","authors":"L. Calicchia, V. Ciotoli, G. Cardarilli, L. Nunzio, R. Fazzolari, A. Nannarelli, M. Re","doi":"10.1109/ICECS46596.2019.8964670","DOIUrl":"https://doi.org/10.1109/ICECS46596.2019.8964670","url":null,"abstract":"In this work, we present a configurable accelerator for the RISC-V processor oriented to digital signal processing applications for energy efficient Internet-of-Things devices. The supported operations in the accelerator are addition, multiplication, and linear combination. The accelerator can support different applications: mono-dimensional and bi-dimensional filtering and pattern matching. The results show that the configurable accelerator offers better performance and lower energy consumption when compared to the software execution of the same application on the RISC-V.","PeriodicalId":209054,"journal":{"name":"2019 26th IEEE International Conference on Electronics, Circuits and Systems (ICECS)","volume":"43 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131521729","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 8
Quality Tunable Approximate Adder for Low Energy Image Processing Applications 低能量图像处理应用的质量可调近似加法器
2019 26th IEEE International Conference on Electronics, Circuits and Systems (ICECS) Pub Date : 2019-11-01 DOI: 10.1109/ICECS46596.2019.8965205
C. Jha, Ankita Nandi, Joycee Mekie
{"title":"Quality Tunable Approximate Adder for Low Energy Image Processing Applications","authors":"C. Jha, Ankita Nandi, Joycee Mekie","doi":"10.1109/ICECS46596.2019.8965205","DOIUrl":"https://doi.org/10.1109/ICECS46596.2019.8965205","url":null,"abstract":"In this paper, we present energy-efficient Tunable Approximate Adders (TAAs) based on power-gating. We propose two TAA designs: TAA1 and TAA2. TAAs are runtime configurable and are bit-tunable to support varying degrees of approximation with maximum bounded error. TAA designs have been implemented using UMC 65nm technology. On average, a single-bit TAA1 and TAA2 consume 15% and 47% lesser energy as compared to a single-bit exact mirror adder respectively. TAA1 is relatively lesser erroneous but consumes more energy as compared to TAA2. We also applied TAA1 and TAA2 on image processing applications: image addition, mean filtering and Laplacian filtering on multiple images. We have studied the trade-off between energy consumption and output quality by varying the number of approximate bits for the aforementioned applications. For TAA1 at 4-bit approximation, the average PSNR and average SSIM were 32.79 and 0.875 respectively with an energy saving of 6.67%. For TAA2 at 4-bit approximation, the average PSNR and average SSIM were 28.37 and 0.88 respectively with an energy saving of 28.9%.","PeriodicalId":209054,"journal":{"name":"2019 26th IEEE International Conference on Electronics, Circuits and Systems (ICECS)","volume":"57 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131939256","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 7
Variable-Rate FEC Decoder VLSI Architecture for 400G Rate-Adaptive Optical Communication 用于400G速率自适应光通信的可变速率FEC解码器VLSI结构
2019 26th IEEE International Conference on Electronics, Circuits and Systems (ICECS) Pub Date : 2019-11-01 DOI: 10.1109/ICECS46596.2019.8964930
V. Jain, C. Fougstedt, P. Larsson-Edefors
{"title":"Variable-Rate FEC Decoder VLSI Architecture for 400G Rate-Adaptive Optical Communication","authors":"V. Jain, C. Fougstedt, P. Larsson-Edefors","doi":"10.1109/ICECS46596.2019.8964930","DOIUrl":"https://doi.org/10.1109/ICECS46596.2019.8964930","url":null,"abstract":"Optical communication systems rely on forward error correction (FEC) to decrease the error rate of the received data. Since the properties of the optical channel will vary over time, a variable FEC coding gain would be useful. For example, if the channel conditions are benign, lower code overhead can be used, effectively increasing the code rate. We introduce a variable-rate FEC decoder architecture that can operate in several different modes, where each mode is linked to code rate and decoding iterations. We demonstrate a decoder implementation that provides a net coding gain range of 9.96–10.38 dB at a post-FEC bit-error rate of 10−15. For this range, a decoder implemented in a 28-nm process technology offers throughputs in excess of 400 Gbps, decoding latencies below 53 ns and a power dissipation of less than 0.95 W (or 1.3 pJ/information bit).","PeriodicalId":209054,"journal":{"name":"2019 26th IEEE International Conference on Electronics, Circuits and Systems (ICECS)","volume":"314 3","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131850203","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
A low-power class-AB Gm-C biquad stage in CMOS 40nm technology 采用CMOS 40nm技术的低功耗ab类Gm-C双级级
2019 26th IEEE International Conference on Electronics, Circuits and Systems (ICECS) Pub Date : 2019-11-01 DOI: 10.1109/ICECS46596.2019.8965124
F. Centurelli, P. Monsurrò, A. Trifiletti
{"title":"A low-power class-AB Gm-C biquad stage in CMOS 40nm technology","authors":"F. Centurelli, P. Monsurrò, A. Trifiletti","doi":"10.1109/ICECS46596.2019.8965124","DOIUrl":"https://doi.org/10.1109/ICECS46596.2019.8965124","url":null,"abstract":"A low-power class-AB Gm-C biquad stage has been designed using a voltage buffer based on error amplifiers and a push-pull current mirror. The class-AB architecture allows good power efficiency by lowering the required bias current. The biquad stage consumes $250boldsymbol{mu} mathbf{A}$ from a 1.2V supply, and achieves a resonance frequency of 2.2MHz with a Q of 2. The SFDR (spurious-free dynamic range) with a two-tone test is 48dB and the SNR (signal-to-noise ratio) is 44.4dB, with a 400mVpp differential input signal. A pseudo-differential architecture allows large bandwidth and lower power consumption in the transconductance stages. The stage can be used to synthetize lowpass and bandpass filters composed of low-Q stages.","PeriodicalId":209054,"journal":{"name":"2019 26th IEEE International Conference on Electronics, Circuits and Systems (ICECS)","volume":"34 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114980919","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Embedded Linear Model Predictive Control Through Mesh Adaptive Direct Search Algorithm 基于网格自适应直接搜索算法的嵌入式线性模型预测控制
2019 26th IEEE International Conference on Electronics, Circuits and Systems (ICECS) Pub Date : 2019-11-01 DOI: 10.1109/ICECS46596.2019.8964821
Alessandro Ravera, A. Oliveri, M. Lodi, M. Storace
{"title":"Embedded Linear Model Predictive Control Through Mesh Adaptive Direct Search Algorithm","authors":"Alessandro Ravera, A. Oliveri, M. Lodi, M. Storace","doi":"10.1109/ICECS46596.2019.8964821","DOIUrl":"https://doi.org/10.1109/ICECS46596.2019.8964821","url":null,"abstract":"In this paper we apply the derivative-free mesh adaptive direct search (MADS) algorithm to find the minimum of a constrained optimization problem, resulting from model predictive control (MPC). MPC requires indeed to solve an optimization problem online, at each sampling time of the system to regulate. A progressive barrier approach is used in MADS, in order to cope with the possibly infeasible initial point for the algorithm. Hardware-in-the-loop simulations are performed where the MADS-based MPC regulator is implemented on a microcontroller and a double integrator system is simulated on a PC. Control performances and circuit latency are assessed with respect to the number of MADS iterations.","PeriodicalId":209054,"journal":{"name":"2019 26th IEEE International Conference on Electronics, Circuits and Systems (ICECS)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130664014","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
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