{"title":"Fault set partition for efficient width compression","authors":"Emil Gizdarski, H. Fujiwara","doi":"10.1109/ATS.2002.1181710","DOIUrl":"https://doi.org/10.1109/ATS.2002.1181710","url":null,"abstract":"In this paper, we present a technique for reducing the test length of counter-based pseudo-exhaustive built-in self-testing (BIST) using a width compression method and a divide-and-conquer strategy. More formally, the target faults are divided into K groups such that a binary counter can generate a test set for each group. By selecting the size of the binary counter, this technique allows a trade-off between test application time and area overhead. The experimental results for the ISCAS'85 and ISCAS'89 benchmark circuits demonstrate the efficiency of the proposed technique. In all cases, this low-overhead BIST technique achieves complete fault coverage of the stuck-at faults in reasonable test application time.","PeriodicalId":199542,"journal":{"name":"Proceedings of the 11th Asian Test Symposium, 2002. (ATS '02).","volume":"87 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2001-02-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121940856","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}