Proceedings 35th Annual Simulation Symposium. SS 2002最新文献

A modular client-server discrete event simulator for networked computers 用于联网计算机的模块化客户机-服务器离散事件模拟器

Proceedings 35th Annual Simulation Symposium. SS 2002 Pub Date : 2002-04-14 DOI: 10.1109/SIMSYM.2002.1000138

David Wangerin, Christopher DeCoro, L. M. Campos, Hugo Coyote, I. Scherson

引用次数: 10

A comprehensive 3G link level simulator 一个全面的3G链路级模拟器

Proceedings 35th Annual Simulation Symposium. SS 2002 Pub Date : 2002-04-14 DOI: 10.1109/SIMSYM.2002.1000175

Ernesto Luiz Andrade Neto, M. Yacoub, A. Shinoda, M. Pellenz

引用次数: 2

Dynamic load-balancing for BSP Time Warp BSP时间扭曲的动态负载平衡

Proceedings 35th Annual Simulation Symposium. SS 2002 Pub Date : 2002-04-14 DOI: 10.1109/SIMSYM.2002.1000163

M. Low

引用次数: 38

Simulation-based VV&A methodology for HLA federations: an example from the Aerospace industry HLA联盟基于仿真的VV&A方法:来自航空航天工业的一个例子

Proceedings 35th Annual Simulation Symposium. SS 2002 Pub Date : 2002-04-14 DOI: 10.1109/SIMSYM.2002.1000090

A. Bruzzone, R. Mosca, A. Orsoni, R. Revetria

引用次数: 20

A statistical mechanical approach to a framework for modeling irregular programs on distributed or cluster computers 一种用于在分布式或集群计算机上对不规则程序建模的框架的统计力学方法

Proceedings 35th Annual Simulation Symposium. SS 2002 Pub Date : 2002-04-14 DOI: 10.1109/SIMSYM.2002.1000096

Shean T. McMahon, I. Scherson

引用次数: 2

Controlling buffer usage in critical channel traversing 控制关键通道遍历中的缓冲区使用

Proceedings 35th Annual Simulation Symposium. SS 2002 Pub Date : 2002-04-14 DOI: 10.1109/SIMSYM.2002.1000084

R. Simmonds, C. Kiddle, K. Wong, B. Unger

引用次数: 5

Performance evaluation and analysis of protocols for IP mobility support: a quantitative study IP移动支持协议的性能评估与分析:一项定量研究

Proceedings 35th Annual Simulation Symposium. SS 2002 Pub Date : 2002-04-14 DOI: 10.1109/SIMSYM.2002.1000157

Peng Sun, S. Sung, Zhaojun Li, S. Huang

引用次数: 3

Developing an Object Exchange Model Template for GRIDS distributed supply chain simulations 面向网格分布式供应链仿真的对象交换模型模板的开发

Proceedings 35th Annual Simulation Symposium. SS 2002 Pub Date : 2002-04-14 DOI: 10.1109/SIMSYM.2002.1000162

Gary S. H. Tan, Wee Ngee Ng, Simon J. E. Taylor

{"title":"Developing an Object Exchange Model Template for GRIDS distributed supply chain simulations","authors":"Gary S. H. Tan, Wee Ngee Ng, Simon J. E. Taylor","doi":"10.1109/SIMSYM.2002.1000162","DOIUrl":"https://doi.org/10.1109/SIMSYM.2002.1000162","url":null,"abstract":"Supply chain management (SCM) is a series of activities, usually sequential, that an organisation, or a network of organisations, uses to deliver products and/or services to customers. With the globalisation of commercial markets, distributed supply chain (DSQ) simulation, connecting organisations from various parts of the world, has gained significance in supply chain management decision support. DSC simulation requires that information be transferred between individual simulations (interoperability) in a timely and consistent manner. In this work GRIDS (Generic Runtime Infrastructure for Distributed Simulation), an extensible, service-based RTI, is used to successfully transfer timely information between simulations. However, the question of what format this information should take still remains. This paper presents the development of an Object Exchange Model Template (OEMT), for DSC simulation in GRIDS. These are templates for standard object creation within a DSC simulation, so as to facilitate standard object transfers between the various simulations that compose a DSC simulation. The templates are stored in an Object Exchange Model Repository (OEMR) for easy access by all simulation builders intending to build a DSC simulation using GRIDS. The OEMT facilitates interoperability by providing a common \"language\" that can be used to share information (objects) between simulations. This approach can also facilitate data distribution management (DDM) services. The OEMT is intended to extend and complement the OMT of the High Level Architecture.","PeriodicalId":198576,"journal":{"name":"Proceedings 35th Annual Simulation Symposium. SS 2002","volume":"71 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2002-04-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122089613","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 2

Breaking the memory bottleneck with an optical data path 用光数据路径打破内存瓶颈

Proceedings 35th Annual Simulation Symposium. SS 2002 Pub Date : 2002-04-14 DOI: 10.1109/SIMSYM.2002.1000173

Jason E. Fritts, R. Chamberlain

{"title":"Breaking the memory bottleneck with an optical data path","authors":"Jason E. Fritts, R. Chamberlain","doi":"10.1109/SIMSYM.2002.1000173","DOIUrl":"https://doi.org/10.1109/SIMSYM.2002.1000173","url":null,"abstract":"We demonstrate the capability of optical buses in enabling orders of magnitude greater bandwidth between the processor and off-chip memory in a uniprocessor computer system. Through a simulation-based performance analysis of a 1 GHz processor model, we provide a preliminary evaluation of the benefits of an optical processor-to-memory bus in both eliminating the bandwidth bottleneck and in reducing the impact of the increasing processor-to-memory latency gap. The optical technology is constructed of two-dimensional arrays of lasers and detectors bonded to silicon that provide high-speed optical I/O on and off chip. These chip-to-chip light paths may be designed using either rigid free-space optics or flexible fiber image guides. Utilizing the optical data path between the processor and memory provides significantly greater bandwidth with no appreciable latency penalty. We assess the performance impact of this architecture enhancement on a number of media applications. Overall we found that the increased bandwidth nearly eliminates the transfer time between processor and memory, effectively reducing degradation from off-chip memory latency by 50% on average. Additionally, substantial extra bandwidth remains for more bandwidth-intensive architectural options like aggressive latency hiding techniques and single-chip multiprocessors.","PeriodicalId":198576,"journal":{"name":"Proceedings 35th Annual Simulation Symposium. SS 2002","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2002-04-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130568715","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 8

Using simulation to facilitate effective workflow adaptation 使用仿真来促进有效的工作流适应

Proceedings 35th Annual Simulation Symposium. SS 2002 Pub Date : 2002-04-14 DOI: 10.1109/SIMSYM.2002.1000151

J. Miller, J. Cardoso, Gregory A. Silver

引用次数: 41