International Symposium on Code Generation and Optimization (CGO'06)最新文献_第2页

Using machine learning to focus iterative optimization 利用机器学习聚焦迭代优化

International Symposium on Code Generation and Optimization (CGO'06) Pub Date : 2006-03-26 DOI: 10.1109/CGO.2006.37

F. Agakov, Edwin V. Bonilla, John Cavazos, Björn Franke, G. Fursin, M. O’Boyle, John Thomson, M. Toussaint, Christopher K. I. Williams

{"title":"Using machine learning to focus iterative optimization","authors":"F. Agakov, Edwin V. Bonilla, John Cavazos, Björn Franke, G. Fursin, M. O’Boyle, John Thomson, M. Toussaint, Christopher K. I. Williams","doi":"10.1109/CGO.2006.37","DOIUrl":"https://doi.org/10.1109/CGO.2006.37","url":null,"abstract":"Iterative compiler optimization has been shown to outperform static approaches. This, however, is at the cost of large numbers of evaluations of the program. This paper develops a new methodology to reduce this number and hence speed up iterative optimization. It uses predictive modelling from the domain of machine learning to automatically focus search on those areas likely to give greatest performance. This approach is independent of search algorithm, search space or compiler infrastructure and scales gracefully with the compiler optimization space size. Off-line, a training set of programs is iteratively evaluated and the shape of the spaces and program features are modelled. These models are learnt and used to focus the iterative optimization of a new program. We evaluate two learnt models, an independent and Markov model, and evaluate their worth on two embedded platforms, the Texas Instrument C67I3 and the AMD Au1500. We show that such learnt models can speed up iterative search on large spaces by an order of magnitude. This translates into an average speedup of 1.22 on the TI C6713 and 1.27 on the AMD Au1500 in just 2 evaluations.","PeriodicalId":196640,"journal":{"name":"International Symposium on Code Generation and Optimization (CGO'06)","volume":"83 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-03-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133001478","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 457

Thread-shared software code caches 线程共享软件代码缓存

International Symposium on Code Generation and Optimization (CGO'06) Pub Date : 2006-03-26 DOI: 10.1109/CGO.2006.36

Derek Bruening, Vladimir Kiriansky, Timothy Garnett, S. Banerji

{"title":"Thread-shared software code caches","authors":"Derek Bruening, Vladimir Kiriansky, Timothy Garnett, S. Banerji","doi":"10.1109/CGO.2006.36","DOIUrl":"https://doi.org/10.1109/CGO.2006.36","url":null,"abstract":"Software code caches are increasingly being used to amortize the runtime overhead of dynamic optimizers, simulators, emulators, dynamic translators, dynamic compilers, and other tools. Despite the now-wide spread use of code caches, techniques for efficiently sharing them across multiple threads have not been fully explored. Some systems simply do not support threads, while others resort to thread-private code caches. Although thread-private caches are much simpler to manage, synchronize, and provide scratch space for, they simply do not scale when applied to many-threaded programs. Thread-shared code caches are needed to target server applications, which employ hundreds of worker threads all performing similar tasks. Yet, those systems that do share their code caches often have brute-force, inefficient solutions to the challenges of concurrent code cache access: a single global lock on runtime system code and suspension of all threads for any cache management action. This limits the possibilities for cache design and has performance problems with applications that require frequent cache invalidations to maintain cache consistency. In this paper, we discuss the design choices when building thread-shared code caches and enumerate the difficulties of thread-local storage, synchronization, trace building, in-cache lookup tables, and cache eviction. We present efficient solutions to these problems that both scale well and do not require thread suspension. We evaluate our results in DynamoRIO, an industrial-strength dynamic binary translation system, on real-world server applications. On these applications our thread-shared caches use an order of magnitude less memory and improve throughput by up to four times compared to thread-private caches.","PeriodicalId":196640,"journal":{"name":"International Symposium on Code Generation and Optimization (CGO'06)","volume":"21 4 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-03-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132595483","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 30

Selecting software phase markers with code structure analysis 通过代码结构分析选择软件阶段标记

International Symposium on Code Generation and Optimization (CGO'06) Pub Date : 2006-03-26 DOI: 10.1109/CGO.2006.32

Jeremy Lau, Erez Perelman, B. Calder

{"title":"Selecting software phase markers with code structure analysis","authors":"Jeremy Lau, Erez Perelman, B. Calder","doi":"10.1109/CGO.2006.32","DOIUrl":"https://doi.org/10.1109/CGO.2006.32","url":null,"abstract":"Most programs are repetitive, where similar behavior can be seen at different execution times. Algorithms have been proposed that automatically group similar portions of a program's execution into phases, where samples of execution in the same phase have homogeneous behavior and similar resource requirements. In this paper, we present an automated profiling approach to identify code locations whose executions correlate with phase changes. These ''software phase markers\" can be used to easily detect phase changes across different inputs to a program without hardware support. Our approach builds a combined hierarchical procedure call and loop graph to represent a program's execution, where each edge also tracks the max, average, and standard deviation in hierarchical execution variability on paths from that edge. We search this annotated call-loop graph for instructions in the binary that accurately identify the start of unique stable behaviors across different inputs. We show that our phase markers can be used to accurately partition execution into units of repeating homogeneous behavior by counting execution cycles and data cache hits. We also compare the use of our software markers to prior work on guiding data cache reconfiguration using data-reuse markers. Finally, we show that the phase markers can be used to partition the program's execution at code transitions to pick accurately simulation points for SimPoint. When simulation points are defined in terms of phase markers, they can potentially be re-used across inputs, compiler optimizations, and different instruction set architectures for the same source code.","PeriodicalId":196640,"journal":{"name":"International Symposium on Code Generation and Optimization (CGO'06)","volume":"43 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-03-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128460170","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 73

Tailoring graph-coloring register allocation for runtime compilation 为运行时编译定制图形着色寄存器分配

International Symposium on Code Generation and Optimization (CGO'06) Pub Date : 2006-03-26 DOI: 10.1109/CGO.2006.35

K. Cooper, A. Dasgupta

引用次数: 17

Online phase detection algorithms 在线相位检测算法

International Symposium on Code Generation and Optimization (CGO'06) Pub Date : 2006-03-26 DOI: 10.1109/CGO.2006.26

P. Nagpurkar, C. Krintz, M. Hind, P. Sweeney, V. T. Rajan

{"title":"Online phase detection algorithms","authors":"P. Nagpurkar, C. Krintz, M. Hind, P. Sweeney, V. T. Rajan","doi":"10.1109/CGO.2006.26","DOIUrl":"https://doi.org/10.1109/CGO.2006.26","url":null,"abstract":"Today's virtual machines (VMs) dynamically optimize an application as it is executing, often employing optimizations that are specialized for the current execution profile. An online phase detector determines when an executing program is in a stable period of program execution (a phase) or is in transition. A VM using an online phase detector can apply specialized optimizations during a phase or reconsider optimization decisions between phases. Unfortunately, extant approaches to detecting phase behavior rely on either offline profiling, hardware support, or are targeted toward a particular optimization. In this work, we focus on the enabling technology of online phase detection. More specifically, we contribute (a) a novel framework for online phase detection, (b) multiple instantiations of the framework that produce novel online phase detection algorithms, (c) a novel client- and machine-independent baseline methodology for evaluating the accuracy of an online phase detector, (d) a metric to compare online detectors to this baseline, and (e) a detailed empirical evaluation, using Java applications, of the accuracy of the numerous phase detectors.","PeriodicalId":196640,"journal":{"name":"International Symposium on Code Generation and Optimization (CGO'06)","volume":"291 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-03-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134581805","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 84

Profiling over adaptive ranges 自适应范围分析

International Symposium on Code Generation and Optimization (CGO'06) Pub Date : 2006-03-26 DOI: 10.1109/CGO.2006.30

Shashidhar Mysore, B. Agrawal, T. Sherwood, Nisheeth Shrivastava, S. Suri

{"title":"Profiling over adaptive ranges","authors":"Shashidhar Mysore, B. Agrawal, T. Sherwood, Nisheeth Shrivastava, S. Suri","doi":"10.1109/CGO.2006.30","DOIUrl":"https://doi.org/10.1109/CGO.2006.30","url":null,"abstract":"Modern computer systems are called on to deal with billions of events every second, whether they are instructions executed, memory locations accessed, or packets forwarded. This presents a serious challenge to those who seek to quantify, analyze, or optimize such systems, because important trends and behaviors may easily be lost in a sea of data. We present range adaptive profiling (RAP) as a new and general purpose profiling method capable of hierarchically classifying streams of data efficiently in hardware. Through the use of RAP, events in an input stream are dynamically classified into increasingly precise categories based on the frequency with which they occur. The more important a class, or range of events, the more precisely it is quantified. Despite the dynamic nature of our technique, we build upon tight theoretic bounds covering both worst-case error as well as the required memory. In the limit, it is known that error and the memory bounds can be independent of the stream size, and grow only linearly with the level of precision desired. Significantly, we expose the critical constants in these algorithms and through careful engineering, algorithm re-design, and use of heuristics, we show how a high performance profile system can be implemented for range adaptive profiling. RAP can be used on various profiles such as PCs, load values, and memory addresses, and has a broad range of uses, from hot-region profiling to quantifying cache miss value locality. We propose two methods of implementation, one in software and the other with specialized hardware, and we show that with just 8k bytes of memory range profiles can be gathered with an average accuracy of 98%.","PeriodicalId":196640,"journal":{"name":"International Symposium on Code Generation and Optimization (CGO'06)","volume":"208 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-03-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116143111","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 12

Experiences with multi-threading and dynamic class loading in a Java just-in-time compiler 在Java即时编译器中使用多线程和动态类加载的经验

International Symposium on Code Generation and Optimization (CGO'06) Pub Date : 2006-03-26 DOI: 10.1109/CGO.2006.16

V. Sundaresan, Daryl Maier, Pramod Ramarao, Mark G. Stoodley

{"title":"Experiences with multi-threading and dynamic class loading in a Java just-in-time compiler","authors":"V. Sundaresan, Daryl Maier, Pramod Ramarao, Mark G. Stoodley","doi":"10.1109/CGO.2006.16","DOIUrl":"https://doi.org/10.1109/CGO.2006.16","url":null,"abstract":"In this paper, we describe the techniques that have been implemented in the IBM TestaRossa (TR) just-in-time (JIT) compiler to safely perform aggressive code patching and collect accurate profiles in the context of a Java application employing multiple threads and dynamic class loading and unloading. Previous work in these areas either did not account for the synchronization cost of safety or dynamic class loading/unloading effects in a heavily multithreaded program or did not consider how different patching techniques may be required for different platforms where instruction cache coherence guarantees vary. We evaluate the space and time overhead to make our profiling framework correct, showing that privatizing the profiling variables to achieve correctness impacts execution time only minimally but it can grow the stack frames for profiled methods by less than 15% on average for the SPECjvm98 and SPECjbb2000 benchmarks. Since methods are profiled for only a brief time and the stack frames themselves are not large, we do not consider this growth to be prohibitive. The techniques reported in this paper are implemented in the 1.5.0 release of the IBM Developer Kit for Java targeting 12 different processor-operating system platforms.","PeriodicalId":196640,"journal":{"name":"International Symposium on Code Generation and Optimization (CGO'06)","volume":"178 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-03-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126026180","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 52

A self-repairing prefetcher in an event-driven dynamic optimization framework 事件驱动动态优化框架中的自修复预取器

International Symposium on Code Generation and Optimization (CGO'06) Pub Date : 2006-03-26 DOI: 10.1109/CGO.2006.4

Weifeng Zhang, B. Calder, D. Tullsen

{"title":"A self-repairing prefetcher in an event-driven dynamic optimization framework","authors":"Weifeng Zhang, B. Calder, D. Tullsen","doi":"10.1109/CGO.2006.4","DOIUrl":"https://doi.org/10.1109/CGO.2006.4","url":null,"abstract":"Software prefetching has been demonstrated as a powerful technique to tolerate long load latencies. However, to be effective, prefetching must target the most critical (frequently missing) loads, and prefetch them sufficiently far in advance. This is difficult to do correctly with a static optimizer, because locality characteristics and cache latencies vary across data inputs and across different machines. This paper presents a mechanism that dynamically inserts prefetch instructions into frequently executed hot traces. Hot traces are dynamically analyzed to identify delinquent loads and the appropriate prefetch distance for those loads. Those prefetches are then inserted into the hot trace. The low overhead of the event-driven dynamic optimization system allows the optimizer to continuously monitor the performance of the software prefetches. This is done to find an accurate and stable prefetch distance and to adapt to changes in program behavior using what we call self-repairing prefetching. Relative to the baseline hardware stride prefetching, we find a total 23% improvement when we use the self-repairing mechanism to adoptively discover the best prefetch distance for each load, which is 12% better performance than dynamic prefetching techniques without adaptive repairing.","PeriodicalId":196640,"journal":{"name":"International Symposium on Code Generation and Optimization (CGO'06)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-03-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128296062","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 34

Compiling for EDGE architectures 为 EDGE 架构编译

International Symposium on Code Generation and Optimization (CGO'06) Pub Date : 2006-03-26 DOI: 10.1109/CGO.2006.10

Aaron Smith, Jon Gibson, Bertrand A. Maher, N. Nethercote, B. Yoder, D. Burger, K. McKinley, J. Burrill

{"title":"Compiling for EDGE architectures","authors":"Aaron Smith, Jon Gibson, Bertrand A. Maher, N. Nethercote, B. Yoder, D. Burger, K. McKinley, J. Burrill","doi":"10.1109/CGO.2006.10","DOIUrl":"https://doi.org/10.1109/CGO.2006.10","url":null,"abstract":"Explicit data graph execution (EDGE) architectures offer the possibility of high instruction-level parallelism with energy efficiency. In EDGE architectures, the compiler breaks a program into a sequence of structured blocks that the hardware executes atomically. The instructions within each block communicate directly, instead of communicating through shared registers. The TRIPS EDGE architecture imposes restrictions on its blocks to simplify the microarchitecture: each TRIPS block has at most 128 instructions, issues at most 32 loads and/or stores, and executes at most 32 register bank reads and 32 writes. To detect block completion, each TRIPS block must produce a constant number of outputs (stores and register writes) and a branch decision. The goal of the TRIPS compiler is to produce TRIPS blocks full of useful instructions while enforcing these constraints. This paper describes a set of compiler algorithms that meet these sometimes conflicting goals, including an algorithm that assigns load and store identifiers to maximize the number of loads and stores within a block. We demonstrate the correctness of these algorithms in simulation on SPEC2000, EEMBC, and microbenchmarks extracted from SPEC2000 and others. We measure speedup in cycles over an Alpha 21264 on microbenchmarks.","PeriodicalId":196640,"journal":{"name":"International Symposium on Code Generation and Optimization (CGO'06)","volume":"31 2 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-03-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128490585","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 98

Fast and effective orchestration of compiler optimizations for automatic performance tuning 快速有效地编排编译器优化，以实现自动性能调优

International Symposium on Code Generation and Optimization (CGO'06) Pub Date : 2006-03-26 DOI: 10.1109/CGO.2006.38

Zhelong Pan, R. Eigenmann

{"title":"Fast and effective orchestration of compiler optimizations for automatic performance tuning","authors":"Zhelong Pan, R. Eigenmann","doi":"10.1109/CGO.2006.38","DOIUrl":"https://doi.org/10.1109/CGO.2006.38","url":null,"abstract":"Although compile-time optimizations generally improve program performance, degradations caused by individual techniques are to be expected. One promising research direction to overcome this problem is the development of dynamic, feedback-directed optimization orchestration algorithms, which automatically search for the combination of optimization techniques that achieves the best program performance. The challenge is to develop an orchestration algorithm that finds, in an exponential search space, a solution that is close to the best, in acceptable time. In this paper, we build such a fast and effective algorithm, called combined elimination (CE). The key advance of CE over existing techniques is that it takes the least tuning time (57% of the closest alternative), while achieving the same program performance. We conduct the experiments on both a Pentium IV machine and a SPARC II machine, by measuring performance of SPEC CPU2000 benchmarks under a large set of 38 GCC compiler options. Furthermore, through orchestrating a small set of optimizations causing the most degradation, we show that the performance achieved by CE is close to the upper bound obtained by an exhaustive search algorithm. The gap is less than 0.2% on average.","PeriodicalId":196640,"journal":{"name":"International Symposium on Code Generation and Optimization (CGO'06)","volume":"8 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-03-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128929915","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 176