{"title":"An approach to provide ride-through for ASD systems with supercapacitors","authors":"L. Palma, P. Enjeti, E. Aeloiza","doi":"10.1109/CIEP.2002.1216657","DOIUrl":"https://doi.org/10.1109/CIEP.2002.1216657","url":null,"abstract":"Voltage sags are one of the most common occurrences in industrial power distribution systems. Although typical sags may last for 5-20 cycles and their voltage magnitude is usually lower than 20% of its rated value, this disturbance can trip the protections of an adjustable speed drive (ASD). Such nuisance tripping of a continuous industrial process can be very costly. In this paper the use of super-capacitors to provide ride-through for voltage sags and short term voltage interruptions is explored, and a compensator topology is evaluated analytically and experimentally.","PeriodicalId":191010,"journal":{"name":"VIII IEEE International Power Electronics Congress, 2002. Technical Proceedings. CIEP 2002.","volume":"19 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2002-10-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133536865","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Nonpermanent excitation of piezoelectric transformers","authors":"T. Hanisch, I. Kartashev, H. Guldner, K. Lehnert","doi":"10.1109/CIEP.2002.1216666","DOIUrl":"https://doi.org/10.1109/CIEP.2002.1216666","url":null,"abstract":"The work describes and investigates nonpermanent (pulsed) excitation of piezoelectric transformers (PT). Background of the investigations was the requirement of a higher peak power for a PT. Driven nonpermanently, a FT can be overloaded up to a certain level. Some technical applications require a high power for a finite time, transferred by a relatively small transformer. An example is the ignition of gas discharge lamps as one task for electronic ballast systems. Some of these lamps have a very high ignition voltage, so that the use of a separate piezoelectric transformer for ignition may be useful.","PeriodicalId":191010,"journal":{"name":"VIII IEEE International Power Electronics Congress, 2002. Technical Proceedings. CIEP 2002.","volume":"4 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2002-10-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131608813","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"A PWM strategy for the modular structured multilevel inverter suitable for digital implementation","authors":"J. Aziz, Z. Salam","doi":"10.1109/CIEP.2002.1216653","DOIUrl":"https://doi.org/10.1109/CIEP.2002.1216653","url":null,"abstract":"A single carrier PWM strategy for a modular structured multilevel voltage source inverter is discussed in this paper. Using symmetric regular sampling technique, a multilevel modulation strategy is established to define the switching angles of the inverter switches. Mathematical equations for the PWM scheme suitable for digital implementation are derived. Finally simulation and hardware results are presented.","PeriodicalId":191010,"journal":{"name":"VIII IEEE International Power Electronics Congress, 2002. Technical Proceedings. CIEP 2002.","volume":"28 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2002-10-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131908230","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Modeling of low power metal-halide and HPS lamps operated at high frequency","authors":"J. Correa, M. Ponce, J. Arau, J. Alonso","doi":"10.1109/CIEP.2002.1216665","DOIUrl":"https://doi.org/10.1109/CIEP.2002.1216665","url":null,"abstract":"In this paper electrical models of low power metal halide and high pressure sodium lamps are presented, which are compatible with the Pspice program. By means of an exhaustive characterization of several lamps of different manufacturers and powers, operated at high frequency, simple expressions are obtained in order to simplify the lamp modeling. Experimental and simulation results are presented in order to verify the models presented for their application in electronic ballast design for these kind of lamps.","PeriodicalId":191010,"journal":{"name":"VIII IEEE International Power Electronics Congress, 2002. Technical Proceedings. CIEP 2002.","volume":"36 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2002-10-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124941023","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
A. Calleja, J. Alonso, J. Ribas, E. López, J. Cardesín, J. Garcia, M. Rico-Secades
{"title":"Integrated forward half-bridge resonant inverter as a high-power-factor electronic ballast","authors":"A. Calleja, J. Alonso, J. Ribas, E. López, J. Cardesín, J. Garcia, M. Rico-Secades","doi":"10.1109/CIEP.2002.1216662","DOIUrl":"https://doi.org/10.1109/CIEP.2002.1216662","url":null,"abstract":"A novel single-stage high-power-factor electronic ballast obtained from the integration of a forward DC-to-DC converter and a half-bridge resonant inverter is evaluated in this paper. The forward converter is operated in discontinuous conduction mode and constant frequency providing an input power factor high enough to satisfy present standard requirements. The operation of the proposed ballast is also investigated in detail in this paper. A ballast prototype for a 36 W fluorescent lamp has been both simulated and implemented at the laboratory.","PeriodicalId":191010,"journal":{"name":"VIII IEEE International Power Electronics Congress, 2002. Technical Proceedings. CIEP 2002.","volume":"89 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2002-10-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122296192","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Electric generator based on solar cells","authors":"M. Zuñiga, V. Cardenas, H. Calleja, A. Ibañez","doi":"10.1109/CIEP.2002.1216673","DOIUrl":"https://doi.org/10.1109/CIEP.2002.1216673","url":null,"abstract":"In this paper the design of an electric generator based on solar cells is described. From a photovoltaic system, DC energy is converted to AC energy through an inverter in order to generate a high quality waveform with a low distortion current. The output current is synchronized with the electric system voltage and the maximum output power is 1.5 kW. The photovoltaic array supplies directly a DC voltage higher than the V/sub peak/ of the AC mains.","PeriodicalId":191010,"journal":{"name":"VIII IEEE International Power Electronics Congress, 2002. Technical Proceedings. CIEP 2002.","volume":"56 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2002-10-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114573746","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
R. Echavarría, V. Sanchez, M. Ponce, M. Cotorogea, A. Claudio
{"title":"Analysis of parameters variation of a quasi-resonant fast on-load tap changing regulator","authors":"R. Echavarría, V. Sanchez, M. Ponce, M. Cotorogea, A. Claudio","doi":"10.1109/CIEP.2002.1216640","DOIUrl":"https://doi.org/10.1109/CIEP.2002.1216640","url":null,"abstract":"The main function of the on-load tap changing (OLTC) regulators consists in maintaining a constant voltage in order to feed critical loads despite the load changes or voltage changes in the AC mains. The traditional regulators are still used nowadays, but present several disadvantages, like a slow response, which reaches from 100 ms to several seconds. These drawbacks can be overcome if the OLTC regulators would have shorter response time, commuting several times every cycle of the mains. There are two basic topologies for fast OLTC regulators, the first one consists of several taps and uses hard switching. The second one consists of two main switches commuting at high frequency, using soft-switching in order to reduce the power losses. The present topology is of the second type. This paper presents a mathematical model of the power stage of the proposed regulator. It includes the parasitic resistances and the leakage inductances in order to obtain a better comprehension of the regulator operation. A parametric analysis has been done in order to observe the influence of the parasitic elements in the performance of the main parameters of the topology.","PeriodicalId":191010,"journal":{"name":"VIII IEEE International Power Electronics Congress, 2002. Technical Proceedings. CIEP 2002.","volume":"28 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2002-10-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"117172309","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
J. Ribas, J. Alonso, A. Calleja, E. López, J. Cardesín, J. Garcia, M. Rico
{"title":"Single-stage high-power-factor self-oscillating electronic ballast for fluorescent lamps with rapid start","authors":"J. Ribas, J. Alonso, A. Calleja, E. López, J. Cardesín, J. Garcia, M. Rico","doi":"10.1109/CIEP.2002.1216630","DOIUrl":"https://doi.org/10.1109/CIEP.2002.1216630","url":null,"abstract":"In this paper a new solution to implement and control a low-cost single-stage electronic ballast based on the integration of a buck-boost power factor correction stage and a half bridge resonant inverter is presented The control signals are obtained using the resonant current by means of a saturable transformer. Core saturation is used to control the required dead time between the control pulses on both switches. The turn-on time of one of the inverter switches is controlled to provide proper cathode preheating during the lamp ignition process. No special integrated circuits are required to control the ballast and the total number of components is minimized Analysis and basic design guidelines are presented in the paper together with experimental results obtained from a laboratory prototype.","PeriodicalId":191010,"journal":{"name":"VIII IEEE International Power Electronics Congress, 2002. Technical Proceedings. CIEP 2002.","volume":"41 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2002-10-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132523595","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Comparative analysis of SJ-MOSFET and conventional MOSFET by electrical measurements","authors":"A. Claudio, M. Cotorogea, J. Macedonio","doi":"10.1109/CIEP.2002.1216643","DOIUrl":"https://doi.org/10.1109/CIEP.2002.1216643","url":null,"abstract":"A new type of power MOSFET called super junction MOSFET has been introduced. This new power MOSFET presents an interesting behavior in terms of a R/sub DS(on)/ reduction for the same silicon area allowing fabrication of high voltage devices. Additionally, a reduction in the parasitic capacitances, improving the commutation characteristics, have been observed. Thus, this new power MOSFET could replace the traditional device in different power converter applications like power supplies (SMPS) or power factor correction applications. The objective of this paper is to explore the switching characteristics and to present a comparison of this new device SJ-MOSFET with the conventional power MOSFET under different operating conditions using special test circuits.","PeriodicalId":191010,"journal":{"name":"VIII IEEE International Power Electronics Congress, 2002. Technical Proceedings. CIEP 2002.","volume":"53 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2002-10-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134369109","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Sliding mode design of distributed central limit control strategy for parallel-connected inverters","authors":"R. Ramos, D. Biel, F. Guinjoan, E. Fossas","doi":"10.1109/CIEP.2002.1216659","DOIUrl":"https://doi.org/10.1109/CIEP.2002.1216659","url":null,"abstract":"This work is devoted to the central-limit control (CLC) sliding-mode design of a modular system composed by N parallel-connected inverters. AC output voltage regulation and balanced current-sharing among the single inverters is achieved by means of a set of switching surfaces and the corresponding sliding control laws. On the other hand, a set of design restrictions is established in terms of the inverter parameters and the AC output signal amplitude and frequency, this facilitating the subsequent design procedure. Simulation and experimental results for three parallel-connected inverters are provided to illustrate the application of the method.","PeriodicalId":191010,"journal":{"name":"VIII IEEE International Power Electronics Congress, 2002. Technical Proceedings. CIEP 2002.","volume":"16 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2002-10-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125084828","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}