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Mining TCP packets to detect stepping-stone intrusion (non-reviewed) 挖掘TCP报文检测踏脚石入侵(未审查)
IEEE SoutheastCon 2008 Pub Date : 2008-04-03 DOI: 10.1109/SECON.2008.4494298
Long Ni, Jianhua Yang, D. Y. Song
{"title":"Mining TCP packets to detect stepping-stone intrusion (non-reviewed)","authors":"Long Ni, Jianhua Yang, D. Y. Song","doi":"10.1109/SECON.2008.4494298","DOIUrl":"https://doi.org/10.1109/SECON.2008.4494298","url":null,"abstract":"There have been many approaches proposed to detect stepping-stone Intrusion. Besides having the problem of being vulnerable to intruder's time and chaff perturbation, those approaches have high false alarm because they predict an intrusion based on detecting stepping-stone. Being a stepping-stone does not necessarily mean an intrusion because some applications using stepping-stones are legitimate. One better way to detect stepping-stone intrusion is to estimate the length of a connection chain from a host where our monitor program resides to the victim site. This length is measured in connections. Based on our observation, we found that even though some applications (users) need to use stepping-stone, but it is highly suspicious to access a host via more than three computers. The problem of detecting stepping-stone intrusion is reduced to estimating the length of an interactive session; this length is called downstream length from the monitoring host. In this paper, we propose an algorithm to estimate the downstream length by a clustering method.","PeriodicalId":188817,"journal":{"name":"IEEE SoutheastCon 2008","volume":"11 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-04-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131396219","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A contention-free Radix-2 8k-point fast Fourier transform engine using single port SRAMs 基于单端口sram的无争用Radix-2 8k点快速傅立叶变换引擎
IEEE SoutheastCon 2008 Pub Date : 2008-04-03 DOI: 10.1109/SECON.2008.4494345
H. Saleh, E. Swartzlander
{"title":"A contention-free Radix-2 8k-point fast Fourier transform engine using single port SRAMs","authors":"H. Saleh, E. Swartzlander","doi":"10.1109/SECON.2008.4494345","DOIUrl":"https://doi.org/10.1109/SECON.2008.4494345","url":null,"abstract":"This paper presents a Radix-2 decimation in frequency fast Fourier transform engine that is based on a switch based architecture. The architecture interconnects M processing elements with 2*M memories. An algorithm to eliminate memory access contention is presented. The implementation of an 8192-point FFT with 2 processing elements is presented, including timing and place-and-route results. The length of the FFT can be easily changed to integer powers of 2 from 64 to 8192 points. The switch based architecture provides a factor of M speedup over a single processing element realization. The architecture uses single-port memories and achieves a throughput of roughly 1 GSPS (66% of the throughput of dual-ported SRAM based implementations).","PeriodicalId":188817,"journal":{"name":"IEEE SoutheastCon 2008","volume":"15 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-04-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131706292","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
Modeling of shielded, suspended and inverted, microstrip lines 屏蔽、悬浮和反转微带线的建模
IEEE SoutheastCon 2008 Pub Date : 2008-04-03 DOI: 10.1109/SECON.2008.4494310
S. Musa, M. Sadiku
{"title":"Modeling of shielded, suspended and inverted, microstrip lines","authors":"S. Musa, M. Sadiku","doi":"10.1109/SECON.2008.4494310","DOIUrl":"https://doi.org/10.1109/SECON.2008.4494310","url":null,"abstract":"Electromagnetic simulation and modeling of suspended-substrate microstrip lines have an important role in designing microwave and millimeter- wave integrated circuits. Suspended- substrate microstrip lines are sometimes manufactured and placed in a shield to reduce performance degradation from external influences. In this paper, we will illustrate modeling of shielded, suspended-substrate, microstrip lines using the finite element method(FEM). We specifically determine the capacitance per unit length, inductance per unit length, and characteristic impedance of shielded, suspended, microstrip lines. We compared our results with those obtained by other methods and found them to be in agreement. We extended the modeling by designing our own model of shielded, inverted, microstrip lines and compared it with shielded, suspended, microstrip lines. We found them to be very close.","PeriodicalId":188817,"journal":{"name":"IEEE SoutheastCon 2008","volume":"127 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-04-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132875194","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 6
Scientific computation through a GPU 通过GPU进行科学计算
IEEE SoutheastCon 2008 Pub Date : 2008-04-03 DOI: 10.1109/SECON.2008.4494293
Genna Cummins, Rob Adams, Theodore Newell
{"title":"Scientific computation through a GPU","authors":"Genna Cummins, Rob Adams, Theodore Newell","doi":"10.1109/SECON.2008.4494293","DOIUrl":"https://doi.org/10.1109/SECON.2008.4494293","url":null,"abstract":"A personal computer's graphics processing unit, or GPU, has been the seed of a growing interest in the academic and research communities of recent months. This paper investigates current technology that enables a GPU to process and solve linear algebra computations, in particular, matrix operations. Matrix operations of linear algebra are the basis of scientific computation, often used in modeling data and describing the forces of the universe. The author wished to compare the speed of the computation through the CPU and the GPU. Utilizing NVIDIA's CUDA technology, they demonstrated that calculations are preformed considerably faster through the GPU than through the CPU. The authors concluded that all computation in the research community has the potential to run significantly faster than current CPU's allow.","PeriodicalId":188817,"journal":{"name":"IEEE SoutheastCon 2008","volume":"25 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-04-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133670274","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 12
Advances in quantum computing : Nuclear magnetic resonance (non reviewed) 量子计算的进展:核磁共振(未评论)
IEEE SoutheastCon 2008 Pub Date : 2008-04-03 DOI: 10.1109/SECON.2008.4494252
J. Govil, A. Nandra
{"title":"Advances in quantum computing : Nuclear magnetic resonance (non reviewed)","authors":"J. Govil, A. Nandra","doi":"10.1109/SECON.2008.4494252","DOIUrl":"https://doi.org/10.1109/SECON.2008.4494252","url":null,"abstract":"Presently quantum computer seems to be a science fiction, but it will be a reality very soon, as silicon electronics are a staple of the computing industry, but researchers are now exploring other techniques to deliver powerful computers. This poster paper highlights the advances in quantum computing.","PeriodicalId":188817,"journal":{"name":"IEEE SoutheastCon 2008","volume":"20 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-04-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114786795","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Reconfigurable computer application design considerations 可重构计算机应用程序设计考虑因素
IEEE SoutheastCon 2008 Pub Date : 2008-04-03 DOI: 10.1109/SECON.2008.4494292
J. L. Rice, K. Pace, M. Gates, G. R. Morris, K. Abed
{"title":"Reconfigurable computer application design considerations","authors":"J. L. Rice, K. Pace, M. Gates, G. R. Morris, K. Abed","doi":"10.1109/SECON.2008.4494292","DOIUrl":"https://doi.org/10.1109/SECON.2008.4494292","url":null,"abstract":"The notion of a reconfigurable computer (RC) is nearly 50 years old. However, practical RCs, which were made possible by the advent of large capacity field programmable gate arrays (FPGAs), have only been available for about a decade and have been primarily used for integer and fixed-point applications. The jury is still out on whether RCs will become part of mainstream high performance computing. One of the primary roadblocks is the relative difficulty of mapping floating-point scientific applications onto reconfigurable platforms. This paper deals with some important high performance reconfigurable computer application design considerations. In particular, it takes a detailed look at \";the three p's,\"; which addresses the crucial relationship among performance, pipelining, and parallelism. It also expands upon \";the FPGA design boundary,\"; which addresses some of the heuristics that allow developers to determine which application modules can be mapped onto the FPGAs. Finally, it looks at some of the RC design observations made by other researchers. By way of a few simple examples, these ideas are illustrated and then tied back to some recent research efforts to speedup applications using RCs.","PeriodicalId":188817,"journal":{"name":"IEEE SoutheastCon 2008","volume":"22 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-04-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123582649","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
Optimization of satellite link design 卫星链路优化设计
IEEE SoutheastCon 2008 Pub Date : 2008-04-03 DOI: 10.1109/SECON.2008.4494275
A. Nandra, J. Govil, J. Govil
{"title":"Optimization of satellite link design","authors":"A. Nandra, J. Govil, J. Govil","doi":"10.1109/SECON.2008.4494275","DOIUrl":"https://doi.org/10.1109/SECON.2008.4494275","url":null,"abstract":"The design of satellite communication system is a complex process requiring compromises between many factors to achieve the best performance at an acceptable cost. In the present world GEO satellites carry the vast majority of the world's satellite traffic, therefore it becomes utmost for the link designer to design with a optimum utilization of space segment as well as transponder downlink EIRP. We (authors) has performed the experiments by varying some of the entities which play a vital role in the link budget and observed the complete physical changes affecting the overall link budget profile. Using such results based upon our work, we performed a theoretical predictions on some of the major problems experienced by the satellite users which includes losses, and attenuation by rain or by equipments, outage of the system etc. Results of these theoretical predictions, acted as an impetus in knowing that the mismanagement of the link budget calculation lead to vital problems such as interference, cross polarization of the antenna and rising of the noise floor of transponder etc.","PeriodicalId":188817,"journal":{"name":"IEEE SoutheastCon 2008","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-04-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129403653","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 6
Development of software for localization of stationary wireless sensor nodes (non-reviewed) 静止无线传感器节点定位软件开发(未审核)
IEEE SoutheastCon 2008 Pub Date : 2008-04-03 DOI: 10.1109/SECON.2008.4494279
V. Elangovan, S. Zein-Sabatto
{"title":"Development of software for localization of stationary wireless sensor nodes (non-reviewed)","authors":"V. Elangovan, S. Zein-Sabatto","doi":"10.1109/SECON.2008.4494279","DOIUrl":"https://doi.org/10.1109/SECON.2008.4494279","url":null,"abstract":"Summary form only given. Localization is the process of finding the geometric location of a wireless sensor node according to some real or virtual coordinate system. Localization is an important task when direct measurements of the wireless sensor locations are not available. Effective localization algorithms can use available information from wireless sensors to infer position of individual node. Various techniques have been evolved in localizing sensor nodes. In this work, passive localization algorithms are developed and tested. The algorithms perform region based localization of stationary wireless sensors with respect to a frame of reference using received signal strength of the sensors. The reported work is conducted in two phases, theoretical development then hardware testing. In the first phase, localization algorithms to predict the location of wireless sensor nodes were developed. We categorized localization of sensors in three different scenarios.","PeriodicalId":188817,"journal":{"name":"IEEE SoutheastCon 2008","volume":"22 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-04-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128340022","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Flat-top / distortionless tunable filters based on liquid crystal multi cavities for DWDM applications 用于DWDM应用的基于液晶多腔的平顶/无失真可调滤波器
IEEE SoutheastCon 2008 Pub Date : 2008-04-03 DOI: 10.1109/SECON.2008.4494270
S. Alboon, R. Lindquist
{"title":"Flat-top / distortionless tunable filters based on liquid crystal multi cavities for DWDM applications","authors":"S. Alboon, R. Lindquist","doi":"10.1109/SECON.2008.4494270","DOIUrl":"https://doi.org/10.1109/SECON.2008.4494270","url":null,"abstract":"Tunable Alters are one of the essential components in the DWDM systems. In this paper two types of tunable Alters are discussed. First the multi cavities coupled Fabry-Perot band pass Alters using liquid crystal are investigated to achieve tunable Aat top Altering performance across the C and L bands with a ripple less than 0.01 dB, and wide overall tuning range of 172 nm. Several designs are shown with comparable performance to the commercial Axed single channel Alters. The second one is the tunable liquid crystal optical interleaver Alter based on the combined Michelson interferometer (MI) and the Gires-Tournois interferometer (GTI). Liquid crystal is used to achieve the center wavelength shift of the interleaver Alter with less than 0.1 dB ripples in the pass band.","PeriodicalId":188817,"journal":{"name":"IEEE SoutheastCon 2008","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-04-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128510618","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 6
An FPGA architecture for low density parity check codes 低密度奇偶校验码的FPGA架构
IEEE SoutheastCon 2008 Pub Date : 2008-04-03 DOI: 10.1109/SECON.2008.4494283
O. Hernandez, N.F. Blythe
{"title":"An FPGA architecture for low density parity check codes","authors":"O. Hernandez, N.F. Blythe","doi":"10.1109/SECON.2008.4494283","DOIUrl":"https://doi.org/10.1109/SECON.2008.4494283","url":null,"abstract":"Low density parity check (LDPC) codes are a family of linear block codes that can approach the Shannon limit to within less than a hundredth of a decibel, and along with Turbo codes are the codes of choice for all next- generation high-noise, high-rate communication systems. A generalized architecture is cost-prohibitive, and code- specific ASICs are not flexible enough for channels with dynamic noise parameters. In this paper we describe a field programmable gate array (FPGA) architecture for LDPC coding that allows for code-specific architectures while providing dynamic code selection. Gate and LUT counts in the encoder are examined for various codes, and size and timing results for different decoder parameters are compared.","PeriodicalId":188817,"journal":{"name":"IEEE SoutheastCon 2008","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-04-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130731236","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
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