{"title":"A New Approach for Limited Preemptive Scheduling in Systems with Preemption Overhead","authors":"M. Nasri, Geoffrey Nelissen, G. Fohler","doi":"10.1109/ECRTS.2016.15","DOIUrl":"https://doi.org/10.1109/ECRTS.2016.15","url":null,"abstract":"This paper considers the problem of reducing the number of preemptions in a system with periodic tasks and preemption overhead. The proposed solution is based on the key observation that for periodic task sets, the task with the smallest period plays an important role in determining the maximum interval of time during which a lower priority task can be executed without being preempted. We use this property to build a new limited preemptive scheduling algorithm, named RS-LP, based on fixed-priority scheduling. In RS-LP, the length of each task's non-preemptive region is varying during the system execution so as to keep the preemptions aligned with the releases of the highest priority task. This simple mechanism allows us to reduce the overall number of preemptions. The proposed algorithm, decides whether or not to preempt the currently executing task based on the maximum blocking tolerance of the higher priority tasks. In any case, the preemptions are authorized only at release instants of the task with the smallest period, thereby limiting the maximum number of preemptions to the number of releases of the highest priority task. Moreover, in this paper, we provide two different preemption overhead aware schedulability tests for periodic and loose-harmonic task sets (i.e., where each period is an integer multiple of the smallest period), together with a lower bound on the maximum number of preemptions. To conclude, extensive experiments comparing RS-LP with the state of the art limited preemptive scheduling algorithms are finally presented.","PeriodicalId":178974,"journal":{"name":"2016 28th Euromicro Conference on Real-Time Systems (ECRTS)","volume":"36 2 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-07-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116617585","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Anomaly Detection Using Inter-Arrival Curves for Real-Time Systems","authors":"Mahmoud Salem, Mark Crowley, S. Fischmeister","doi":"10.1109/ECRTS.2016.22","DOIUrl":"https://doi.org/10.1109/ECRTS.2016.22","url":null,"abstract":"Real-time embedded systems are a significant class of applications, poised to grow even further as automated vehicles and the Internet of Things become a reality. An important problem for these systems is to detect anomalies during operation. Anomaly detection is a form of classification, which can be driven by data collected from the system at execution time. We propose inter-arrival curves as a novel analytic modelling technique for discrete event traces. Our approach relates to the existing technique of arrival curves and expands the technique to anomaly detection. Inter-arrival curves analyze the behaviour of events within a trace by providing upper and lower bounds to their inter-arrival occurrence. We exploit inter-arrival curves in a classification framework that detects deviations within these bounds for anomaly detection. Also, we show how inter-arrival curves act as good features to extract recurrent behaviour that these systems often exhibit. We demonstrate the feasibility and viability of the fully implemented approach with an industrial automotive case study (CAN traces) as well as a deployed aerospace case study (RTOS kernel traces).","PeriodicalId":178974,"journal":{"name":"2016 28th Euromicro Conference on Real-Time Systems (ECRTS)","volume":"12 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-07-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128303550","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Sanjoy Baruah, V. Bonifaci, R. Bruni, A. Marchetti-Spaccamela
{"title":"ILP-Based Approaches to Partitioning Recurrent Workloads Upon Heterogeneous Multiprocessors","authors":"Sanjoy Baruah, V. Bonifaci, R. Bruni, A. Marchetti-Spaccamela","doi":"10.1109/ECRTS.2016.10","DOIUrl":"https://doi.org/10.1109/ECRTS.2016.10","url":null,"abstract":"The problem of partitioning systems of independent constrained-deadline sporadic tasks upon heterogeneous multiprocessor platforms is considered. Several different integer linear program (ILP) formulations of this problem, offering different tradeoffs between effectiveness (as quantified by speedup bound) and running time efficiency, are presented.","PeriodicalId":178974,"journal":{"name":"2016 28th Euromicro Conference on Real-Time Systems (ECRTS)","volume":"16 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-07-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121631470","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Efficient Worst-Case Execution Time Analysis of Dynamic Branch Prediction","authors":"Wolfgang Puffitsch","doi":"10.1109/ECRTS.2016.23","DOIUrl":"https://doi.org/10.1109/ECRTS.2016.23","url":null,"abstract":"Dynamic branch prediction is commonly found in modern processors, but notoriously difficult to model for worst-case execution time analysis. This is particularly true for global dynamic branch predictors, where predictions are influenced by the global branch history. Prior research in this area has concluded that modeling of global branch prediction is too costly for practical use. This paper presents an approach to model global branch prediction while keeping the analysis effort reasonably low. The approach separates the branch history analysis from the integer linear programming formulation of the worst-case execution time problem. Consequently, the proposed approach scales to longer branch history lengths than previous approaches.","PeriodicalId":178974,"journal":{"name":"2016 28th Euromicro Conference on Real-Time Systems (ECRTS)","volume":"27 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-07-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115448859","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"A Unifying Response Time Analysis Framework for Dynamic Self-Suspending Tasks","authors":"Jian-Jia Chen, Geoffrey Nelissen, Wen-Hung Huang","doi":"10.1109/ECRTS.2016.31","DOIUrl":"https://doi.org/10.1109/ECRTS.2016.31","url":null,"abstract":"For real-time embedded systems, self-suspending behaviors can cause substantial performance/schedulability degradations. In this paper, we focus on preemptive fixed-priority scheduling for the dynamic self-suspension task model on uniprocessor. This model assumes that a job of a task can dynamically suspend itself during its execution (for instance, to wait for shared resources or access co-processors or external devices). The total suspension time of a job is upper-bounded, but this dynamic behavior drastically influences the interference generated by this task on lower-priority tasks. The state-of-the-art results for this task model can be classified into three categories (i) modeling suspension as computation, (ii) modeling suspension as release jitter, and (iii) modeling suspension as a blocking term. However, several results associated to the release jitter approach have been recently proven to be erroneous, and the concept of modeling suspension as blocking was never formally proven correct. This paper presents a unifying response time analysis framework for the dynamic self-suspending task model. We provide a rigorous proof and show that the existing analyses pertaining to the three categories mentioned above are analytically dominated by our proposed solution. Therefore, all those techniques are in fact correct, but they are inferior to the proposed response time analysis in this paper. The evaluation results show that our analysis framework can generate huge improvements (an increase of up to 50% of the number of task sets deemed schedulable) over these state-of-the-art analyses.","PeriodicalId":178974,"journal":{"name":"2016 28th Euromicro Conference on Real-Time Systems (ECRTS)","volume":"37 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-07-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129359762","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Lightweight Real-Time Synchronization under P-EDF on Symmetric and Asymmetric Multiprocessors","authors":"Alessandro Biondi, Björn B. Brandenburg","doi":"10.1109/ECRTS.2016.30","DOIUrl":"https://doi.org/10.1109/ECRTS.2016.30","url":null,"abstract":"This paper revisits lightweight synchronization under partitioned earliest-deadline first (P-EDF) scheduling. Four different lightweight synchronization mechanisms - namely preemptive and non-preemptive lock-free synchronization, as well as preemptive and non-preemptive FIFO spin locks - are studied by developing a new inflation-free schedulability test, jointly with matching bounds on worst-case synchronization delays. The synchronization approaches are compared in terms of schedulability in a large-scale empirical study considering both symmetric and asymmetric multiprocessors. While non-preemptive FIFO spin locks were found to generally perform best, lock-free synchronization was observed to offer significant advantages on asymmetric platforms.","PeriodicalId":178974,"journal":{"name":"2016 28th Euromicro Conference on Real-Time Systems (ECRTS)","volume":"4 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-07-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128051440","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
A. Blin, Cédric Courtaud, Julien Sopena, J. Lawall, Gilles Muller
{"title":"Maximizing Parallelism without Exploding Deadlines in a Mixed Criticality Embedded System","authors":"A. Blin, Cédric Courtaud, Julien Sopena, J. Lawall, Gilles Muller","doi":"10.1109/ECRTS.2016.18","DOIUrl":"https://doi.org/10.1109/ECRTS.2016.18","url":null,"abstract":"Complex embedded systems today commonly involve a mix of real-time and best-effort applications. The recent emergence of low-cost multicore processors raises the possibility of running both kinds of applications on a single machine, with virtualization ensuring isolation. Nevertheless, memory contention can introduce other sources of delay, that can lead to missed deadlines. In this paper, we present a combined offline/online memory bandwidth monitoring approach. Our approach estimates and limits the impact of the memory contention incurred by the best-effort applications on the execution time of the real-time application. We show that our approach is compatible with the hardware counters provided by current small commodity multicore processors. Using our approach, the system designer can limit the overhead on the real-time application to under 5% of its expected execution time, while still enabling progress of the best-effort applications.","PeriodicalId":178974,"journal":{"name":"2016 28th Euromicro Conference on Real-Time Systems (ECRTS)","volume":"52 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-07-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134034036","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Urgency-Based Scheduler for Time-Sensitive Switched Ethernet Networks","authors":"Johannes Specht, Soheil Samii","doi":"10.1109/ECRTS.2016.27","DOIUrl":"https://doi.org/10.1109/ECRTS.2016.27","url":null,"abstract":"Due to increasing bandwidth requirements, Ethernet technology is emerging in embedded systems application areas such as automotive, avionics, and industrial control. In the automotive domain, Ethernet enables integration of cameras, radars, and fusion to build active safety and automated driving systems. While Ethernet provides the necessary communication bandwidth, solutions are needed to satisfy stringent dependability and temporal requirements of such safety-critical systems. This paper introduces an asynchronous traffic scheduling algorithm, which gives low delay guarantees in a switched Ethernet network, while maintaining a low implementation complexity. We present a timing analysis and demonstrate the tightness of the delay bounds by extensive simulation experiments.","PeriodicalId":178974,"journal":{"name":"2016 28th Euromicro Conference on Real-Time Systems (ECRTS)","volume":"126 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-07-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132109051","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Scheduling Mixed-Criticality Systems to Guarantee Some Service under All Non-erroneous Behaviors","authors":"Sanjoy Baruah, A. Burns, Zhishan Guo","doi":"10.1109/ECRTS.2016.12","DOIUrl":"https://doi.org/10.1109/ECRTS.2016.12","url":null,"abstract":"Many reactive systems must be designed and analyzed prior to deployment in the presence of considerable epistemic uncertainty: the precise nature of the external environment the system will encounter, as well as the run-time behavior of the platform upon which it is implemented, cannot be predicted with complete certainty prior to deployment. The widely-studied Vestal model for mixed-criticality workloads addresses uncertainties in estimating the worst-case execution time (WCET) of real-time code. Different estimations, at different levels of assurance, are made about these WCET values, it is required that all functionalities execute correctly if the less conservative assumptions hold, while only the more critical functionalities are required to execute correctly in the (presumably less likely) event that the less conservative assumptions fail to hold but the more conservative assumptions do. A generalization of the Vestal model is considered here, in which a degraded (but non-zero) level of service is required for the less critical functionalities even in the event of only the more conservative assumptions holding. An algorithm is derived for scheduling dual-criticality implicit-deadline sporadic task systems specified in this more general model upon preemptive uniprocessor platforms, and proved to be speedup-optimal.","PeriodicalId":178974,"journal":{"name":"2016 28th Euromicro Conference on Real-Time Systems (ECRTS)","volume":"59 2 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-07-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133439220","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Reducing the Contention Experienced by Real-Time Core-to-I/O Flows over a Tilera-Like Network on Chip","authors":"Laure Abdallah, M. Jan, Jérôme Ermont, C. Fraboul","doi":"10.1109/ECRTS.2016.9","DOIUrl":"https://doi.org/10.1109/ECRTS.2016.9","url":null,"abstract":"Many-core architectures are promising hardware to design real-time systems. However, the worst-case behavior of the Network-on-Chip (NoC) for both core-to-core and core-to-Input/Output (I/O) communications of critical applications must be established. The mapping over the NoC of both critical and non-critical applications has an impact on the network contention these critical communications exhibit. So far, all existing mapping strategies have focused on core-to-core communications. However, many-cores in embedded real-time systems will be integrated within backbone Ethernet networks, as they mostly provide Ethernet controllers as I/O interfaces. In a previous work we have shown that Ethernet packets can be dropped due to an internal congestion in a Tilera-like NoC. In this work, we describe and evaluate a mapping strategy for such Tilera-like NoCs that minimizes the contention of core-to-I/O critical flows in order to solve this problem. Experimental results on real avionics applications show significant improvements of core-to-IO flows transmission delays, without significantly impacting transmission delays of core-to-core flows.","PeriodicalId":178974,"journal":{"name":"2016 28th Euromicro Conference on Real-Time Systems (ECRTS)","volume":"150 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-07-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123236931","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}