2018 Forum on Specification & Design Languages (FDL)最新文献

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SmaCoNat: Smart Contracts in Natural Language SmaCoNat:自然语言中的智能合约
2018 Forum on Specification & Design Languages (FDL) Pub Date : 2018-09-01 DOI: 10.1109/FDL.2018.8524068
Emanuel Regnath, S. Steinhorst
{"title":"SmaCoNat: Smart Contracts in Natural Language","authors":"Emanuel Regnath, S. Steinhorst","doi":"10.1109/FDL.2018.8524068","DOIUrl":"https://doi.org/10.1109/FDL.2018.8524068","url":null,"abstract":"Smart contracts enable autonomous decentralized organizations (DADs) in large, trustless and open trading networks by specifying conditions for automated transactions of cryptographically secured data. This data could represent cryptocurrencies but also sensor data or commands to Cyber-Physical Systems (CPS) connected to the Internet. To provide reliability, the contract code is enforced by consensus and the transactions it triggers are nonrevertible, even if they were not intended by the programmer, which could lead to dangerous system behavior. In this paper, we conduct a survey over existing smart contract platforms and languages to determine requirements for the design of a safer contract language. Subsequently we propose concepts that enhance the understanding of code by limiting confusing language constructs, such as nesting, arbitrary naming of operations, and unreadable hash identifiers. This enables human reasoning about the contract semantics on a much higher abstraction layer, because a common understanding can be derived from the language specification itself. We implement these concepts in a new domain specific language called SmaCoNat to illustrate the feasibility and show that our concepts are barely covered by existing languages but significantly enhance readability and safety without violating deterministic parsability.","PeriodicalId":177164,"journal":{"name":"2018 Forum on Specification & Design Languages (FDL)","volume":"64 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"120975193","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 21
Symbolic Simulation of SystemC AMS Without Yet Another Compiler 没有其他编译器的SystemC AMS符号模拟
2018 Forum on Specification & Design Languages (FDL) Pub Date : 2018-09-01 DOI: 10.1109/FDL.2018.8524061
Carna Zivkovic, C. Grimm
{"title":"Symbolic Simulation of SystemC AMS Without Yet Another Compiler","authors":"Carna Zivkovic, C. Grimm","doi":"10.1109/FDL.2018.8524061","DOIUrl":"https://doi.org/10.1109/FDL.2018.8524061","url":null,"abstract":"Modeling languages first of all support simulation that is considered as reference by designers. Formal verification and synthesis share the same languages. However, they usually require a separate, dedicated compiler. As modeling languages such as SystemC have reached a high complexity, it is very hard to support reasonably large language subsets, and to guarantee consistency with simulation semantics. This paper shows a way to use the simulator itself to generate a formal model of the complete dynamic behavior. Compared with using yet another compiler, this permits to improve consistency with simulation semantics, and to combine simulation with other use-cases. We concretely focus on symbolic simulation of SystemC AMS ([1], [2], IEEE Std 1666.1-2016), for which we generate AADD and BDD for symbolic simulation.","PeriodicalId":177164,"journal":{"name":"2018 Forum on Specification & Design Languages (FDL)","volume":"83 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124878401","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Time in SCCharts scc图表中的时间
2018 Forum on Specification & Design Languages (FDL) Pub Date : 2018-09-01 DOI: 10.1109/FDL.2018.8524111
Alexander Schulz-Rosengarten, R. V. Hanxleden, F. Mallet, R. Simone, Julien Deantoni
{"title":"Time in SCCharts","authors":"Alexander Schulz-Rosengarten, R. V. Hanxleden, F. Mallet, R. Simone, Julien Deantoni","doi":"10.1109/FDL.2018.8524111","DOIUrl":"https://doi.org/10.1109/FDL.2018.8524111","url":null,"abstract":"Synchronous languages, such as the recently proposed SCCharts language, have been designed for the rigorous specification of real-time systems. Their sound semantics, which builds on an abstraction from physical execution time, make these languages appealing, in particular for safety-critical systems. However, they traditionally lack built-in support for physical time. This makes it rather cumbersome to express things like time-outs or periodic executions within the language. We here propose several mechanisms to reconcile the synchronous paradigm with physical time. Specifically, we propose extensions to the SCCharts language to express clocks and execution periods within the model. We draw on several sources, in particular timed automata, the Clock Constraint Specification Language, and the recently proposed concept of dynamic ticks. We illustrate how these extensions can be mapped to the SCChart language core, with minimal requirements on the run-time system, and we argue that the same concepts could be applied to other synchronous languages such as Esterel, Lustre or SCADE.","PeriodicalId":177164,"journal":{"name":"2018 Forum on Specification & Design Languages (FDL)","volume":"19 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125191227","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 7
Transaction-level Functional Mockup Units for Cyber-Physical Virtual Platforms 网络物理虚拟平台的事务级功能模型单元
2018 Forum on Specification & Design Languages (FDL) Pub Date : 2018-09-01 DOI: 10.1109/FDL.2018.8524083
Stefano Centomo, M. Lora, F. Fummi
{"title":"Transaction-level Functional Mockup Units for Cyber-Physical Virtual Platforms","authors":"Stefano Centomo, M. Lora, F. Fummi","doi":"10.1109/FDL.2018.8524083","DOIUrl":"https://doi.org/10.1109/FDL.2018.8524083","url":null,"abstract":"The modelling process of Cyber-physical Systems aggregates semantics and languages tailored to different specific domains. The simulation of these complex systems involves different tools and their coupling requires computational effort. In the last few years both Academy and Industry worked toward the definition of standard interfaces able to overcome such issues. The Functional Mock-up Interface (FMI) standard emerged as one of the most promising tool to easily export and integrate heterogeneous models. However, the standard still shows some weaknesses, particularly when dealing with Functional Mock-up Units (FMUs) describing discrete-event systems. This paper explore the features of the standard to find its shortcomings when dealing with discrete models. Then, it proposes a systematic approach to fully exploit the features of the current standards to overcome such limitations. The solution is based on two concepts: (1) exposing the internal time of the FMUs, and (2) exploits the newly exposed information to implement temporal decoupling. The combination of these two concepts allows to optimize the FMUs coordination algorithms. It reduces the number synchronization points and move the simulation from cycle-accurate to transaction-accurate. The impact of these optimizations is measured on a set of benchmarks having different tread-offs of computation and control.","PeriodicalId":177164,"journal":{"name":"2018 Forum on Specification & Design Languages (FDL)","volume":"2 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131076358","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
A New Ageing-Aware Approach Via Path Isolation 一种新的基于路径隔离的老化感知方法
2018 Forum on Specification & Design Languages (FDL) Pub Date : 2018-09-01 DOI: 10.1109/FDL.2018.8524033
Yue Lu, Shengyu Duan, T. Kazmierski
{"title":"A New Ageing-Aware Approach Via Path Isolation","authors":"Yue Lu, Shengyu Duan, T. Kazmierski","doi":"10.1109/FDL.2018.8524033","DOIUrl":"https://doi.org/10.1109/FDL.2018.8524033","url":null,"abstract":"NBTI is becoming one of the major circuit reliability issues in nano-scale technologies. BTI can cause a threshold voltage shift in CMOS devices and consequently increase circuit delay. This paper proposed a novel ageing aware approach to improve circuit's lifetime. The vulnerable circuit paths against ageing effects are isolated. In addition, minimum area overhead is consumed by adopting proposed synthesis algorithm. The simulation results show that the proposed approach can save up to 67.7% area compared with the conventional over-design technique.","PeriodicalId":177164,"journal":{"name":"2018 Forum on Specification & Design Languages (FDL)","volume":"94 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129605249","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Dynamic Inside-Out Verification Using Inverse Transactions in TLM TLM中基于逆事务的动态内外验证
2018 Forum on Specification & Design Languages (FDL) Pub Date : 2018-09-01 DOI: 10.1109/FDL.2018.8524048
Tobias Strauch
{"title":"Dynamic Inside-Out Verification Using Inverse Transactions in TLM","authors":"Tobias Strauch","doi":"10.1109/FDL.2018.8524048","DOIUrl":"https://doi.org/10.1109/FDL.2018.8524048","url":null,"abstract":"With growing design complexity, the reuse of module and subsystem level verification knowledge on electronic system level (ESL) becomes more and more challenging. The “Portable Stimulus Specification Working Group” intends to offer solutions such as stimuli reuse for today's verification challenges. This paper proposes a novel Inside-Out Verification (IOV) methodology, which makes module level dynamic verification knowledge highly reusable on system level by using transactions and inverse transactions. IOV can be combined with System Verilog based UVM. The examples in this paper are based on PDVL (a super-sub-set of SystemVerilog) and SystemC.","PeriodicalId":177164,"journal":{"name":"2018 Forum on Specification & Design Languages (FDL)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114922696","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Using SysML for Modelling and Code Generation for Smart Sensor ASICs 用SysML进行智能传感器asic的建模和代码生成
2018 Forum on Specification & Design Languages (FDL) Pub Date : 2018-09-01 DOI: 10.1109/FDL.2018.8524051
Aljoscha Kirchner, Jan-Hendrik Oetjens, O. Bringmann
{"title":"Using SysML for Modelling and Code Generation for Smart Sensor ASICs","authors":"Aljoscha Kirchner, Jan-Hendrik Oetjens, O. Bringmann","doi":"10.1109/FDL.2018.8524051","DOIUrl":"https://doi.org/10.1109/FDL.2018.8524051","url":null,"abstract":"The latest developments in networking and the rapidly increasing demand for IoT devices lead to higher demands on time-to-market and production costs. In addition, the complexity of the development processes for smart sensor ASICs is constantly increasing and new methods for automation and code generation are particularly needed in development. This paper describes a new methodology that formalizes functional specification based on SysML and enables automation of Virtual Prototype (VP) development. The virtual prototype is an established approach for early embedded software development. The presented methodology translates natural language written specifications into a modeled and formalized functional specification and enables the generation of behavior descriptions in SystemC that are used for the creation of VP. Furthermore, it enables the connection of the IP-XACT-centric generation of the register interface description, as well as the description of the signal processing parts by MATLAB® Simulink®, with the SysML-based generated functional description.","PeriodicalId":177164,"journal":{"name":"2018 Forum on Specification & Design Languages (FDL)","volume":"88 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127867621","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
Cyber-Physical System for Industrial Control Automation Based on the Holonic Approach and the IEC 61499 Standard 基于全息方法和IEC 61499标准的工业控制自动化信息物理系统
2018 Forum on Specification & Design Languages (FDL) Pub Date : 2018-09-01 DOI: 10.1109/FDL.2018.8524082
Luis Alberto Cruz Salazar, Jaime H. Carvajal, Oscar A. Rojas, E. Ramírez
{"title":"Cyber-Physical System for Industrial Control Automation Based on the Holonic Approach and the IEC 61499 Standard","authors":"Luis Alberto Cruz Salazar, Jaime H. Carvajal, Oscar A. Rojas, E. Ramírez","doi":"10.1109/FDL.2018.8524082","DOIUrl":"https://doi.org/10.1109/FDL.2018.8524082","url":null,"abstract":"In recent years, new control automation schemes resulted from the complex needs of the manufacturing systems. The dynamism of the current market is not covered by traditional hierarchical structures yet. Thus, innovative models facing the demands of industrial requirements are now based on intelligent entities. These modern paradigms are realized by evolved programming techniques to implement flexible and distributed control systems (non-hierarchical), e.g. a Cyber-Physical System (CPS). CPS is described as an innovative model that involves transdisciplinary engineering. In fact, CPS defines a modern term that integrates additional information (e.g. real-time data) and modern communication technology (ICT) into the physical world. CPS is often associated with the Industry 4.0 (I4.0) perspective and its specific implementation could be defined by holons, a software built by autonomous and intelligent entities. A holon present in a CPS may contain a physical resource that is linked to the software system by distributable and suitable communication protocols (e.g. based on the IEC 61499 standard). The results of this paper show that both paradigms-holonic and CPS-are a complementary way for manufacturing control automation. The goal of this research is sustained by an overview of UML models, and the application of industrial Ethernet-based protocol (Profinet), to satisfy a distributed CPS with real-time characteristics.","PeriodicalId":177164,"journal":{"name":"2018 Forum on Specification & Design Languages (FDL)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128780281","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 7
Proceedings ofthe 2018 Forum on Specification & Design Languages 2018规范与设计语言论坛论文集
2018 Forum on Specification & Design Languages (FDL) Pub Date : 2018-09-01 DOI: 10.1109/fdl.2018.8524064
{"title":"Proceedings ofthe 2018 Forum on Specification & Design Languages","authors":"","doi":"10.1109/fdl.2018.8524064","DOIUrl":"https://doi.org/10.1109/fdl.2018.8524064","url":null,"abstract":"","PeriodicalId":177164,"journal":{"name":"2018 Forum on Specification & Design Languages (FDL)","volume":"44 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126153782","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Sequential Behavioral Modeling for Scalable IoT Devices and Systems 可扩展物联网设备和系统的顺序行为建模
2018 Forum on Specification & Design Languages (FDL) Pub Date : 2018-09-01 DOI: 10.1109/FDL.2018.8524065
Ege Korkan, Sebastian Käbisch, Matthias Kovatsch, S. Steinhorst
{"title":"Sequential Behavioral Modeling for Scalable IoT Devices and Systems","authors":"Ege Korkan, Sebastian Käbisch, Matthias Kovatsch, S. Steinhorst","doi":"10.1109/FDL.2018.8524065","DOIUrl":"https://doi.org/10.1109/FDL.2018.8524065","url":null,"abstract":"The Internet of Things (IoT) enables connectivity between devices, thereby allowing them to interact with each other. A recurring problem is the emergence of siloed IoT platforms due to proprietary standards. Recently, the World Wide Web Consortium (W3C) proposed a human-readable and machine- understandable format called Thing Description (TD). It allows to uniformly describe device and service interfaces of different IoT standards with syntactic and semantic information, and hence enables semantic interoperability. However, describing sequential behavior of devices, which is essential for many cyber-physical systems, is not covered. In this paper, we propose a systematic way to describe such sequential behavior as an extension within TDs, thereby increasing their semantic expressiveness through possible, valid state transitions. This enables safe and desired operation of devices as well as scalability by modeling systems as sequential compositions of Things. We show in a case study that previously unmodelable behavior can now be expressed and the overall manual intervention requirements of state-of-the-art implementations can be significantly reduced.","PeriodicalId":177164,"journal":{"name":"2018 Forum on Specification & Design Languages (FDL)","volume":"54 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124798990","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 7
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