Dynamic Inside-Out Verification Using Inverse Transactions in TLM

Abstract

With growing design complexity, the reuse of module and subsystem level verification knowledge on electronic system level (ESL) becomes more and more challenging. The “Portable Stimulus Specification Working Group” intends to offer solutions such as stimuli reuse for today's verification challenges. This paper proposes a novel Inside-Out Verification (IOV) methodology, which makes module level dynamic verification knowledge highly reusable on system level by using transactions and inverse transactions. IOV can be combined with System Verilog based UVM. The examples in this paper are based on PDVL (a super-sub-set of SystemVerilog) and SystemC.