ACM '58最新文献

{"title":"Some remarks on abstract machines","authors":"S. Ginsburg","doi":"10.1145/610937.610994","DOIUrl":"https://doi.org/10.1145/610937.610994","url":null,"abstract":"Introduction. In 1954 the mathematical entity called a (sequential) machine was found to be a valuable tool in designing sequential switching circuits [2; 8; 9]. Since then there has been considerable mathematical activity by mathematicians and nonmathematicians relating to the analysis and the synthesis of these machines. As was to be expected of a topic which arose because of an engineering need, most of these results have appeared in engineering and computing journals. Recently though, some of the papers have appeared in mathematical journals [3; 4; 5; 6; 10]. Also, much of the recent literature has dealt with questions almost exclusively of mathematical, as contrasted with engineering, interest [1; 3; 4; 5; 6; 10; 12]. The present paper is written in that spirit. The Moore-Mealy (complete, sequential) machine is defined [8; 9] as a nonempty set K (of \"states\"), a nonempty set D (of 'inputs\"), a nonempty set F (of \"outputs\"), and two functions a (the \"next state\" function), and X (the \"output\" function), 5 mapping KXD into K and X mapping KXD into F. Then 5 and X are extended to sequences of inputs I1 ... Ik (written without commas) by","PeriodicalId":174899,"journal":{"name":"ACM '58","volume":"81 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1958-06-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116514651","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Test routines based on symbolic logical statements","authors":"Richard D. Eldred","doi":"10.1145/610937.610995","DOIUrl":"https://doi.org/10.1145/610937.610995","url":null,"abstract":"A method for selecting the minimum number of test conditions necessary to determine whether all tubes and diodes within a gating struction are operating properly is presented here. External iterns~ such as auxiliary amplifiers, delay circuits, etc. ~ may in all cases be tested by the tube diode tests for the gating structures with which they are associated. It is required to test (a) that each input buffer diode conducts when activated, (b) that each 'and' leg diode inhibits when not activated, (c) that the output of the gating structure is not lost when traveling via output equipment, and (d) that the output equipment does not provide a signal when the input conditions are inappropriate. The method may be illustrated for the function X = (A v B) • (C v D): A B C D J 1 X To t e s t (a) apply s o m e c o m b i n a t i o n such as A-C, which should a c t i v a t e the p a c k a g e and check f o r output at X. T h i s also c h e c k s condition (c), if s a t i s f i e d , and c h e c k s (a) for the s i g n a l s A and C. Now shift to a d i f f e r e n t c o m b i n a t i o n of input v a r i a b l e s , changing the a c t i v e inputs at e v e r y \"and\" leg w h e r e it i s p o s s i b l e to do so but k e e p i n g one, and only one, input v a r i a b l e active to e a c h \"and\" leg. To t e s t (b), it is n e c e s s a r y to a c t i v a t e in t u r n all \"and\" l e g inputs e x c e p t one, so that e a c h \" a n d \" l e g in turn has the sole r e …","PeriodicalId":174899,"journal":{"name":"ACM '58","volume":"2004 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1958-06-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127318397","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Magnacard sorting techniques","authors":"R. M. Hayes","doi":"10.1145/610937.610978","DOIUrl":"https://doi.org/10.1145/610937.610978","url":null,"abstract":"The Magnavox Company has recently announced Magnacard, bases on the storage of information on magnetic cards, each with a capacity of 5,000 bits. These cards can be sorted and collated at speeds up to 100 cards per second and can be read at rates up to 60,000 alpha-numeric characters per second. This paper is concerned with a procedure for efficiently using such a system in sorting a group of items each of which is much smaller than the capacity of a card. The procedure is applicable to any storage medium with a fixed block length. It is based upon combining the high-speed card sorting capability of Magnacard with the high-speed computing capability of a central processor. The sorting procedure involves storage of multiple items to a card. These cards are then sorted into chains on the basis of the sorting fields of a single item on each card. The items on the resulting sets of cards then are merged by the central processor into completely sorted chains. By an alternation of such card sorts and data sorts, a completely sorted sequence is produced. Time savings over either solely computer performed sorts or solely card performed sorts are significant.","PeriodicalId":174899,"journal":{"name":"ACM '58","volume":"23 25 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1958-06-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128442355","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"The role of isomorphism in programming","authors":"S. Kaplan","doi":"10.1145/610937.610969","DOIUrl":"https://doi.org/10.1145/610937.610969","url":null,"abstract":"Data processing on high speed electronic computers as contrastea with the solution of mathematicml problems on such equipment can be stated to have received its initial attention and impetus in the early part of this decade. One ca~1 mention pioneering efforts of the Logistics Research Project and of the Office of the Comptroller of the Army. The latter effectively demonstrated in 1952 the capability of the UNIVAC -the only high speed machine then available -to determining various military requirements~","PeriodicalId":174899,"journal":{"name":"ACM '58","volume":"51 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1958-06-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122583878","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"The C.M.T. (Code Matching Technique) mechanical translation process","authors":"Ariadne Lukjanow","doi":"10.1145/610937.610991","DOIUrl":"https://doi.org/10.1145/610937.610991","url":null,"abstract":"In mechanical translation the following components are crucial in the process of language transfer from source to target language: lo the transfer of grammatical forms, 2o the transfer of meaning and 3~ the rearrangement problem (syntax)° All of these components and the entire analysis has to center on the most important problem, the transfer process. In arriving at a solution the grammatical categories of all languages involved have to be analyzed, and the synthesis of the analysis that will permit the transfer process will result in a common grammar that has all the pertinent problems of all languages after a process of reducing the synthesis. The synthesis is carried out by analyzing each of the languages involved, that is of the individual parts of speech of the same. Then a comparison is made oi\" the results of the analysis in terms of the transfer problem; Ikmctional parts of speech are devised that are common to the two specific languages to be translated, as well as establishing other grammatical categories such s s cases, tenses, genders, etc. The synthesis is then a bilingual grammar where the normal nomenclature of the conventional grammar is being used, but where the components are not merely the identical components as in conventional grammar of any one specific language taken separately. It also contains new categories not existing in either language, and the old components may have an entirely di±ferent meaning. In order to make this bilingual grammar available to the machine process, the categories are reduced to a code that can be accepted by a machine. From now on, a machine does not have to analyze the various forms,but it can merely use the code that already contains the answer to the problem of transfering grammatical categories. At the same time as the categories have been devised their interrelationship has been established in order to permit an intelligent breaking up of the text to be translated into meaningful segments by grammati cal boundarles. In the process of meaning transfer one for one equivalents have to be determined for every possible situation and variation. This in turn leads to establishing certain classes of meaning pertaining to every part of soeech of the above mentioned bilin~al grammar. So far, slightly more than 300 of such classes have been established. The classes have been reduced to a three digit code and Rave been incorporated into the overall code. Those codes for the classes provide the specific meaning of any member by a purely numerical comparison in the process of translation, rather than try to attempt a meaning analysis by the machine.","PeriodicalId":174899,"journal":{"name":"ACM '58","volume":"118 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1958-06-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122453084","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Binary arithmetic for discretely variable word length in a serial computer","authors":"P. Ercoli, R. Vacca","doi":"10.1145/610937.610961","DOIUrl":"https://doi.org/10.1145/610937.610961","url":null,"abstract":"The serial computer FINAC, a Ferranti l~lark I machine installed at the Consiglio Nazionale delle Ricerche in Rome, has been frequently used for the solution of systems of algebraic linear equations and in general of problems of linear algebra. As the size and the number of ill-conditioned systems to be solved had a tendency to increase the problem arose of performing the computation with a greater accuracy, in order not to lose all of the approximation during the execution of the programs. It was decided that efficient programs could be written using only the machine fixed point instructions, that is, without pro-grassing the machine for floating point operation, if the maximum length of 40 bits of the numbers employed could be doubled. This could be done by programme, but in this case the machine would be slowed down to a considerable extent. Two different possibilities were open : that of increasing the speed of multiplication on numbers of 40 bits by doubling the parallelism of the series-parallel multiplication circuit ,ioe° using the multiplier's digits in groups of two and staticising the whole multiplier in a single step, and that of installing an arithmetic unit operating on 40 or 80 bits words. In the first case fixed-point 80-bits operation would always have been possible by programming every single arithmetic operation, in the second case 80-bit instructions would have been available in the machine order code. Of course an increase in the speed of multiplication would have had also favourable effects on machine speed when operating in fixed-point on 40 bits numbers. The speed on FINAC measured in Gills for operation on 40-bit numbers is 12,96 ms and would be 12 ms with a fast multiplier.","PeriodicalId":174899,"journal":{"name":"ACM '58","volume":"232 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1958-06-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128809060","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"The origin of the abacus and its development","authors":"Shu-Tien Li","doi":"10.1145/610937.610987","DOIUrl":"https://doi.org/10.1145/610937.610987","url":null,"abstract":"Since appearance of electric calculating machines and electronic computers, the abacus has been very frequently referred to in contemporary writings in the western world. Unfortunately, different authors in their fragmentary statements have attributed the development of the abacus to diverse origins, none being free from historical speculation. This paper presents the authentic origin of the abacus and its development.","PeriodicalId":174899,"journal":{"name":"ACM '58","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1958-06-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129094557","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Simulation and display of four inter-related vehicular traffic intersections","authors":"H. H. Goode, Wendell C. True","doi":"10.1145/610937.610997","DOIUrl":"https://doi.org/10.1145/610937.610997","url":null,"abstract":"A traffic engineer is able to handle single intersections with a reasonable assurance of success. However, if he is concerned with the relationship among two or more intersections he is without an adequate tool for the solution of the problem. This paper concerns the development of such a computational tool. Reference 1 described the development of a \"reasonable\" mathematical model of a single intersection , programming of the model for a digital computer, and subsequent runs on a computer to test it for consistency. This paper extends this one intersection model to a model containing four intersections. In the cross block there are four incoming lanes. Each lane consists of 35 possible car positions. With each lane is associated four paths within the intersection and one \"exit\" position. One of the four paths lying within the intersection is followed by right-turning cars, one by cars going straight ahead, and two by cars turning left. There is an exit box in each \"straight ahead\" path out of the cross block. This exit box consists of the first two points that are attained by a car leaving the intersection on the straight ahead path. Right and left turners into the exit box are also deposited in it as they leave the intersection. These exit boxes allow the programming of the computer to arrange for the connection of any given cross block with any other cross blocks. For each cross block there now corresponds a storage register to each lane, to each intersection path, and to each exit box-24 in all, since there are four lanes, sixteen paths, and four exit boxes. Four cross blocks, interconnected, make up the model. When a car reaches point one of any lane, the light is checked. If it is rea or in the last ten quarterseconds of the amber period, the car remains at point one. If it is green or in the first 15 quarterseconds of the amber period, the computer examines the turn register. If a right turn is indicated , the right turn path is considered. If it is empty, the car proceeds; otherwise the car remains at point one. If a left turn is indicated, the left turn path is examined. If it is empty, the car proceeds; otherwise it remains at point one. The same procedure is followed if a straight path is indicated. The rules of this model are applied …","PeriodicalId":174899,"journal":{"name":"ACM '58","volume":"17 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1958-06-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126813906","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"S.E.A. general purpose computers CAB","authors":"P. Namian, F. Raymond","doi":"10.1145/610937.610988","DOIUrl":"https://doi.org/10.1145/610937.610988","url":null,"abstract":"In France, the development of new means concerning electronic computa~ tion has not been left aside~ As early as 1948, the design and manufacture of a high speed computer was in hand at SoEoA. The first computer, in 1950, was a fixed program calculator intended for the restitution of high speed missile trajectories. After the first step, the technical staff of our firm oriented towards research and study on new computation circuits° The chief aims were to increase stability and reliability in so far as operation was concerned and to sim~ plify manufacturing in order to make maintenance easier, to reduce cost prices and to obtain smaller dimension if possibles Our endeavour lead us to an homogenous computing system whose main features follow-All the computation circuits are built up using semiconductors (germanium diodes) associated with pulse regenerators and transformers.-A magnetic drum is used as high capacity recording memory~-Matrix magnetic core arrays are used as fast access memories in conjunction with the magnetic drum° The cor~s are square hysteresis loop ferrites.-Fast input and output devices were fit to suit computer requirements.-Every function is carried out by means of standard plug in printed units. These units are easily substituted for maintenance or repair° While this technological research work was carried out, an exhaustive study of machine organization according to its various uses and required facilities lead us in 1954/1955 to the development of an internal computer structure which was called CAB 2022-(in French language Calculatrice Arith-mgtique binaire)-binary arithmetical computer.","PeriodicalId":174899,"journal":{"name":"ACM '58","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1958-06-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124930935","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Numerical solution of the boundary layer equations without similarity assumptions","authors":"R. Kramer, H. Lieberstein, M. Sweeney","doi":"10.1145/610937.610945","DOIUrl":"https://doi.org/10.1145/610937.610945","url":null,"abstract":"The Crocco transformation combined with a Mangier transformation is used to carry the boundary-layer problem for axially symmetric blunt bodies into a form suitable for direct numerical computation without introduction of similarity assumptions. Conditions which in the original problem appear a t infinity now are brought to a finite straight line, and the body is transformed to a parallel line. Data can be generated on the stagnation line (perpendicular to the body) to serve as initial values, and since the equations are a parabolic system of two second-order equations, the boundary-value problem is analogous to the slab problem for the heat equation. An implicit difference equation is used to reduce stability difficulties. Special techniques in forming the difference equation result in a linear system of algebraic equations to be solved on any given line of integration, and these solutions are computed from recursion relations generated by back substitution. For bluntnosed bodies with approach flow Mach Numbers greater than 8 (approximately), large temperature gradients occur across a thin boundary la}^er of dissociated gas, and it is necessary to use real-gas effects, approximated here by certain fits to the gas tables. A case is computed, however, for a lower Mach Number approach flow using perfect-gas theory to provide a standard against which similarity solutions may be tested.","PeriodicalId":174899,"journal":{"name":"ACM '58","volume":"72 2 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1958-06-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133695785","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}