Binary arithmetic for discretely variable word length in a serial computer

Abstract

The serial computer FINAC, a Ferranti l~lark I machine installed at the Consiglio Nazionale delle Ricerche in Rome, has been frequently used for the solution of systems of algebraic linear equations and in general of problems of linear algebra. As the size and the number of ill-conditioned systems to be solved had a tendency to increase the problem arose of performing the computation with a greater accuracy, in order not to lose all of the approximation during the execution of the programs. It was decided that efficient programs could be written using only the machine fixed point instructions, that is, without pro-grassing the machine for floating point operation, if the maximum length of 40 bits of the numbers employed could be doubled. This could be done by programme, but in this case the machine would be slowed down to a considerable extent. Two different possibilities were open : that of increasing the speed of multiplication on numbers of 40 bits by doubling the parallelism of the series-parallel multiplication circuit ,ioe° using the multiplier's digits in groups of two and staticising the whole multiplier in a single step, and that of installing an arithmetic unit operating on 40 or 80 bits words. In the first case fixed-point 80-bits operation would always have been possible by programming every single arithmetic operation, in the second case 80-bit instructions would have been available in the machine order code. Of course an increase in the speed of multiplication would have had also favourable effects on machine speed when operating in fixed-point on 40 bits numbers. The speed on FINAC measured in Gills for operation on 40-bit numbers is 12,96 ms and would be 12 ms with a fast multiplier.